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1. 发明公开

EP3200230A4 THIN FILM TRANSISTOR COMPONENT, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE 审中-公开
公开(公告)号：EP3200230A4
公开(公告)日：2018-06-06
申请号：EP15763182
申请日：2015-02-27
申请人： BOE TECHNOLOGY GROUP CO LTD
发明人： SUN SHUANG , ZHANG FANGZHEN , NIU JING , LV ZHIJUN
IPC分类号： H01L29/786 , G02F1/1362 , G02F1/1368 , H01L27/12 , H01L29/417 , H01L29/66
CPC分类号： H01L29/78675 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/66757 , H01L29/78633 , H01L29/78696
摘要： The present disclosure discloses a thin film transistor assembly, an array substrate and a method of manufacturing the same, and a display device including the array substrate. The array substrate includes a substrate; a plurality of thin film transistors formed on the substrate; and a plurality of light shielding layers, each of the light shielding layers being arranged between a source electrode and a drain electrode of the thin film transistor and configured to block light from the exterior from illuminating an active layer of the thin film transistor. The light shielding layer and the source electrode and the drain electrode of the thin film transistor are formed in the same layer on the substrate. As the light shielding layer, the source electrode and the drain electrode of the thin film transistor and a data line may be formed on the substrate by using the same material layer through a single patterning process, times of performing patterning processes and the number of masks used may be reduced and thus manufacturing process and cost of the array substrate may be decreased.

2. 发明公开

EP3185305A4 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE 审中-公开
公开(公告)号：EP3185305A4
公开(公告)日：2018-04-11
申请号：EP14882777
申请日：2014-12-17
申请人： BOE TECHNOLOGY GROUP CO LTD
发明人： LONG CHUNPING , LIANG YINAN
IPC分类号： H01L29/786 , H01L21/3213 , H01L27/12 , H01L27/32 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/66
CPC分类号： H01L29/78675 , H01L21/02532 , H01L21/02595 , H01L21/0273 , H01L21/26513 , H01L21/283 , H01L21/3065 , H01L21/32139 , H01L23/3171 , H01L27/12 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1288 , H01L27/3262 , H01L27/3276 , H01L29/41733 , H01L29/42384 , H01L29/458 , H01L29/4908 , H01L29/4958 , H01L29/66757 , H01L29/786 , H01L29/78618 , H01L29/78633 , H01L2227/323
摘要： A thin film transistor and its manufacturing method, an array substrate and its manufacturing method, and a display device are provided. The thin film transistor includes a gate electrode (7), a source electrode (9), a drain electrode (10), an active layer (4) and a gate insulation layer (6). The gate insulation layer (6) is provided above the active layer (4), the gate (7), the source electrode (9) and the drain electrode (10) are provided on a same layer above the gate insulation layer (6), the active layer (4) and the source electrode (9) are connected through a first connection electrode (12b), and the active layer and the drain electrode are connected through a second connection electrode (12c). The thin film transistor can be formed by three times of patterning processes, by which the process time period is shortened, the process yield is improved, and the process cost is reduced, and so on.

3. 发明公开

EP3267468A1 PREPARATION METHOD FOR LOW TEMPERATURE POLYSILICON THIN FILM AND THIN FILM TRANSISTOR, THIN FILM TRANSISTOR , DISPLAY PANEL AND DISPLAY DEVICE 审中-公开
标题翻译：低温多晶硅薄膜和薄膜晶体管，薄膜晶体管，显示面板和显示装置的制备方法
公开(公告)号：EP3267468A1
公开(公告)日：2018-01-10
申请号：EP15883770.8
申请日：2015-07-16
申请人： BOE Technology Group Co., Ltd.
发明人： NIU, Yanan , LIU, Chao , HE, Zengsheng , CHEN, Lei , ZHANG, Yujun
IPC分类号： H01L21/02 , H01L21/20 , H01L29/786
CPC分类号： H01L21/02675 , H01L21/02057 , H01L21/02532 , H01L21/02592 , H01L21/02686 , H01L21/3085 , H01L21/3086 , H01L27/1222 , H01L27/1274 , H01L27/1281 , H01L27/1285 , H01L27/1288 , H01L29/66757 , H01L29/786 , H01L29/78675
摘要： Provided are a preparation method for a low temperature polysilicon thin film and a thin film transistor, a thin film transistor, a display panel and a display device. The method comprises forming an amorphous silicon thin film (01) on a substrate (1), forming a pattern of a silicon oxide thin film (02) covered the amorphous silicon thin film (01), wherein the thickness of the silicon oxide thin film (02) in the default region is thicker than that of the silicon oxide thin film (02) located in the other regions except the default region, and a quasi-molecule laser is irradiated over the silicon oxide thin film (02) to make the amorphous silicon thin film (01) to be an initial polycrystalline silicon thin film (04), the initial polycrystalline silicon thin film (04) in the default region is a target low temperature polysilicon thin film (05), so that the grain size of the polysilicon of the polycrystalline silicon thin film are formed more uniformly.
摘要翻译：本发明提供一种低温多晶硅薄膜及薄膜晶体管，薄膜晶体管，显示面板及显示装置的制备方法。该方法包括在衬底（1）上形成非晶硅薄膜（01），形成覆盖非晶硅薄膜（01）的氧化硅薄膜（02）的图案，其中氧化硅薄膜（02）的厚度比位于除默认区域之外的其他区域中的氧化硅薄膜（02）厚，并且在氧化硅薄膜（02）上照射准分子激光以制成非晶硅薄膜（01）为初始多晶硅薄膜（04），初始区域的初始多晶硅薄膜（04）为目标低温多晶硅薄膜（05），晶粒尺寸为多晶硅薄膜的多晶硅更均匀地形成。

4. 发明授权

EP2105966B1 Display device 有权
标题翻译：显示设备
公开(公告)号：EP2105966B1
公开(公告)日：2017-08-23
申请号：EP09006485.8
申请日：2000-05-11
申请人： Semiconductor Energy Laboratory Co, Ltd.
发明人： Kokubo, Chiho , Yamagata, Hirokazu , Yamazaki, Shunpei
IPC分类号： H01L27/12 , H01L29/786 , H01L29/66 , H01L21/20 , G02F1/1345 , G09G3/3225 , G09G3/3233 , H01L29/04 , G09G3/30 , G09G3/36 , H01L27/32
CPC分类号： H01L21/02672 , G02F1/13454 , G09G3/30 , G09G3/3225 , G09G3/3233 , G09G3/3648 , G09G2300/0842 , G09G2300/0861 , H01L21/02532 , H01L21/2022 , H01L27/12 , H01L27/1248 , H01L27/1255 , H01L27/1277 , H01L27/3244 , H01L29/04 , H01L29/66757 , H01L29/78624 , H01L29/78645 , H01L29/78675
摘要： There is disclosed a semiconductor device and a method of fabricating the semiconductor device in which a heat treatment time required for crystal growth is shortened and a process is simplified. Two catalytic element introduction regions are arranged at both sides of one active layer and crystallization is made. A boundary portion where crystal growth from one catalytic element introduction region meets crystal growth from the other catalytic element introduction region is formed in a region which becomes a source region or drain region.
摘要翻译：公开了一种半导体器件和制造半导体器件的方法，其中晶体生长所需的热处理时间缩短并且工艺简化。两个催化元素引入区布置在一个有源层的两侧并进行结晶化。在成为源极区域或漏极区域的区域形成来自一个催化剂元素导入区域的晶体生长与来自另一个催化剂元素导入区域的晶体生长的边界部分。

5. 发明公开

EP2500941A3 Semiconductor device and manufacturing method thereof 审中-公开
标题翻译： Halbleiterbauelement und Herstellungsverfahrendafür
公开(公告)号：EP2500941A3
公开(公告)日：2017-05-10
申请号：EP12172007.2
申请日：2000-05-31
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yamazaki, Shunpei , Suzawa, Hideomi , Yamagata, Hirokazu
IPC分类号： H01L29/786 , H01L29/66 , H01L29/45 , H01L29/49
CPC分类号： H01L29/78621 , G02F1/13454 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/3244 , H01L29/458 , H01L29/4908 , H01L29/66757 , H01L29/66765 , H01L29/78645 , H01L29/78675 , H01L29/78678 , H01L2924/0002 , H01L2924/00
摘要： The invention provides a semiconductor device comprising a transistor; a first interlayer insulating film over the transistor; a second interlayer insulating film over the first interlayer insulating film; and a conductive layer over the second interlayer insulating film, wherein the second interlayer insulating film covers a gate electrode of the transistor, and is selectively removed over a contact portion between a semiconductor layer of the transistor and the conductive layer, wherein the conductive layer is electrically connected to the semiconductor layer through a hole opened in the first interlayer insulating film, and wherein the conductive layer partly or entirely overlaps the gate electrode with the first interlayer insulating film and the second interlayer insulating film interposed therebetween.
摘要翻译：为了增加孔径比，使与像素TFT的沟道形成区域（213,214）重叠的栅电极的一部分或全部与第二布线（源极线或漏极线）（154,157）重叠）。此外，第一层间绝缘膜（149）和第二层间绝缘膜（150c）设置在栅电极和第二布线（154,157）之间，以便降低寄生电容。

6. 发明公开

EP1709573A4 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：EP1709573A4
公开(公告)日：2014-05-07
申请号：EP05704285
申请日：2005-01-24
申请人： SEMICONDUCTOR ENERGY LAB
发明人： KATO KIYOSHI
IPC分类号： G06K19/00 , G11C5/14 , H01L21/20 , H01L27/04 , H01L27/10 , H01L27/12 , H01L27/13 , H01L29/786
CPC分类号： H01L27/13 , G11C5/142 , H01L21/2007 , H01L27/12 , H01L29/78675
摘要： A semiconductor device capable of stabilizing power supply by suppressing power consumption as much as possible. The semiconductor device of the invention includes a central processing unit having a plurality of units and a control circuit, and an antenna. The control circuit includes a means for outputting, based on a power supply signal including data on power supply from an antenna (through an antenna) or a load signal obtained by an event signal supplied from each of the units, one or more of a first control signal for stopping power supply to one or more of the units, a second control signal for varying a power supply potential supplied to one or more of the units, and a third control signal for stopping supplying a clock signal to one or more of the units.

7. 发明公开

EP2259292A2 Electronic equipment having display device 有权
标题翻译： ElektronischeAusrüstungmit Anzeigevorrichtung
公开(公告)号：EP2259292A2
公开(公告)日：2010-12-08
申请号：EP10178860.2
申请日：1999-11-16
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Yamazaki, Shunpei
IPC分类号： H01L21/336 , H01L21/84 , H01L21/28 , H01L29/786 , H01L29/423
CPC分类号： H01L27/3262 , H01L21/28114 , H01L27/12 , H01L27/1214 , H01L27/1222 , H01L27/3244 , H01L27/3248 , H01L29/42384 , H01L29/66492 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78675 , H01L29/78696 , H01L51/5256 , H01L2029/7863 , H01L2227/32
摘要： An electronic equipment having a display device comprising: a pixel portion which includes a pixel TFT over a substrate and is configured to display a picture; a driving circuit over the substrate; an interlayer insulating film; and a pixel electrode, wherein the driving circuit is located outside the pixel portion, characterized in that the pixel TFT comprises: a first semiconductor island including at least a first channel formation region, a second channel formation region, lightly doped regions and source and drain regions; a first gate insulating film formed over the first semiconductor island; a first gate electrode formed over the first channel formation region with the first gate insulating film interposed therebetween; and a second gate electrode formed over the second channel formation region with the first gate insulating film interposed therebetween, wherein the driving circuit comprises a thin film transistor, the thin film transistor comprising: a second semiconductor island including at least a third channel formation region; and a third gate electrode formed over the third channel formation region with a second gate insulating film interposed therebetween, wherein the interlayer insulating film covers the first gate electrode, the second gate electrode, the third gate electrode, the first semiconductor island, and the second semiconductor island, wherein the pixel electrode is formed over the interlayer insulating film and electrically connected to one of the source and drain regions of the first semiconductor island, and wherein at least one of the first gate electrode, the second gate electrode, and the third gate electrode has tapered edges with a taper angle in a range of 3° to 60°.
摘要翻译：一种具有显示装置的电子设备，包括：像素部分，其在基板上包括像素TFT，并且被配置为显示图像; 衬底上的驱动电路; 层间绝缘膜; 以及像素电极，其中所述驱动电路位于所述像素部分的外部，其特征在于，所述像素TFT包括：第一半导体岛，包括至少第一沟道形成区，第二沟道形成区，轻掺杂区和源极和漏极区域; 形成在所述第一半导体岛上的第一栅极绝缘膜; 形成在所述第一沟道形成区域上的第一栅极电极，所述第一栅极绝缘膜插入其间; 以及形成在所述第二沟道形成区域上的第二栅电极，其中所述第一栅极绝缘膜介于其间，其中所述驱动电路包括薄膜晶体管，所述薄膜晶体管包括：至少第三沟道形成区域的第二半导体岛; 以及在所述第三沟道形成区域上形成有第二栅极绝缘膜的第三栅电极，其中所述层间绝缘膜覆盖所述第一栅电极，所述第二栅电极，所述第三栅电极，所述第一半导体岛和所述第二栅极电极半导体岛，其中所述像素电极形成在所述层间绝缘膜上并电连接到所述第一半导体岛的源极和漏极区之一，并且其中所述第一栅电极，所述第二栅电极和所述第三栅电极中的至少一个栅电极具有锥形边缘，其锥角在3°至60°的范围内。

8. 发明公开

EP1033755A3 Semiconductor device and manufacturing method thereof 审中-公开
标题翻译： Halbleiterbauelement和dessen Herstellungsverfahren
公开(公告)号：EP1033755A3
公开(公告)日：2009-09-23
申请号：EP00104686.1
申请日：2000-03-03
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Ohtani, Hisashi, Semicond. Energy. Lab. Co., Ltd.
IPC分类号： H01L27/12 , H01L21/77
CPC分类号： H01L27/1214 , G02F1/13454 , H01L27/127 , H01L27/3244 , H01L29/66757 , H01L29/66772 , H01L29/78621 , H01L29/78627 , H01L29/78633 , H01L29/78654 , H01L29/78675 , H01L51/5284
摘要： In a manufacturing method of an active matrix type liquid crystal display device, a semiconductor device having good TFT characteristics is realized. LDD regions of a driver circuit NTFT and LDD regions of a pixel section NTFT are given different impurity concentration. An impurity is doped at differing concentrations using a mask. Thus a liquid crystal display device provided with a driver circuit having high speed operation and a pixel section with high reliability can be obtained.
摘要翻译：在有源矩阵型液晶显示装置的制造方法中，实现具有良好的TFT特性的半导体装置。对像素部NTFT的驱动电路NTFT和LDD区域的LDD区域赋予不同的杂质浓度。使用掩模以不同的浓度掺杂杂质。因此，可以获得具有高速运转的驱动电路和高可靠性的像素部的液晶显示装置。

9. 发明公开

EP1028469A3 Semiconductor device and method of manufacturing the same 审中-公开
公开(公告)号：EP1028469A3
公开(公告)日：2009-04-15
申请号：EP00102887.7
申请日：2000-02-11
申请人： SEL SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Yamazaki, Shunpei, c/o Semiconductor Energy , Tanaka, Yukio, c/o Semiconductor Energy , Koyama, Jun, c/o Semiconductor Energy , Osame, Mitsuaki, c/o Semiconductor Energy , Murakami, Satoshi, c/o Semiconductor Energy , Ohnuma, Hideto, c/o Semiconductor Energy , Fujimoto, Etsuko, c/o Semiconductor Energy , Kitakado, Hidehito, c/o Semiconductor Energy
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： G02F1/13454 , G02F1/136209 , G02F1/136213 , H01L27/1255 , H01L27/3244 , H01L27/3248 , H01L27/3265 , H01L27/3272 , H01L29/66757 , H01L29/78621 , H01L29/78624 , H01L29/78627 , H01L29/78633 , H01L29/78645 , H01L29/78675 , H01L51/5246 , H01L51/5284 , H01L2227/323
摘要： A semiconductor device in which TFTs of suitable structures are arranged depending upon the performances of the circuits, and storage capacitors are formed occupying small areas, the semiconductor device featuring high performance and bright image. The thickness of the gate-insulating film is differed depending upon a circuit that gives importance to the operation speed and a circuit that gives importance to the gate-insulating breakdown voltage, and the position for forming the LDD region is differed depending upon the TFT that gives importance to the countermeasure against the hot carriers and the TFT that gives importance to the countermeasure against the off current. This makes it possible to realize a semiconductor device of high performance. Further, the storage capacity is formed by a light-shielding film and an oxide thereof to minimize its area, and a semiconductor device capable of displaying a bright picture is realized.

10. 发明公开

EP0997950A3 Method of improving the crystallization of semiconductor films particularly for thin film transistors 失效
标题翻译：改善半导体膜的结晶化的用于薄膜晶体管的一种方法，特别是
公开(公告)号：EP0997950A3
公开(公告)日：2009-01-28
申请号：EP99124492.2
申请日：1994-02-02
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Takayama, Toru , Zhang, Hongyong , Yamazaki, Shunpei , Takemura, Yasuhiko
IPC分类号： H01L21/20 , H01L21/336 , H01L29/786
CPC分类号： H01L27/12 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02672 , H01L21/02675 , H01L27/1277 , H01L27/1285 , H01L29/66757 , H01L29/78654 , H01L29/78675
摘要： A method of manufacturing a semiconductor device including a thin film transistor, said method comprising the steps of forming an amorphous semiconductor film (904) on an insulating surface (902); providing a material being capable of promoting the crystallization of the amorphous semiconductor film into at least a part of the amorphous semiconductor film; crystallizing the amorphous semiconductor film by heating to form a crystalline semiconductor film; forming a gate insulating film in contact with the crystalline semiconductor film; forming a gate electrode adjacent to the crystalline semiconductor film with the gate insulating film therebetween; providing an impurity into the crystalline semiconductor film to a source region, a drain channel and a channel region between the source and drain regions of the thin film transistor.
The crystallization promoting material is one of Ni, Fe, Co, or Pt, and can be applied to the amorphous semiconductor film by using a spin-coated solution (907).

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