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1. 发明公开

EP3389090A1 POWER ELECTRONICS MODULE 无效
公开(公告)号：EP3389090A1
公开(公告)日：2018-10-17
申请号：EP17166088.9
申请日：2017-04-11
申请人： ABB Schweiz AG , Audi AG
发明人： Schuderer, Jürgen , Justin, Villard , Mohn, Fabian , Liu, Chunlei , Apelsmeier, Andreas , Asam, Johann
IPC分类号： H01L23/49 , H01L23/492 , H01L23/34 , H01L25/07 , H01L25/11
CPC分类号： H01L24/48 , H01L23/34 , H01L24/20 , H01L24/37 , H01L24/40 , H01L24/41 , H01L25/071 , H01L25/074 , H01L25/117 , H01L2223/6627 , H01L2224/29339 , H01L2224/32014 , H01L2224/37147 , H01L2224/40095 , H01L2224/41174 , H01L2224/4824 , H01L2224/4826 , H01L2224/48491 , H01L2224/83101 , H01L2224/83447 , H01L2224/83801 , H01L2224/83825 , H01L2224/8384 , H01L2224/84447 , H01L2224/8484 , H01L2924/00014 , H01L2924/09701 , H01L2924/10272 , H01L2924/1203 , H01L2924/13055 , H01L2924/13091 , H01L2924/19104 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A power electronics module (10) comprises a substrate (12) with a substrate metallization layer (14), which is separated into conducting areas (16, 18) for providing conducting paths for the power electronics module (10); a semiconductor switch chip (26) bonded with a first power electrode (28) to a first conducting area (18) of the substrate metallization layer (14); a conductor plate (34, 34') bonded to a second power electrode (30) of the semiconductor switch chip (26) opposite to the first power electrode (28); and a gate conductor (40, 40') bonded to a gate electrode (32) of the semiconductor switch chip (26) besides the second power electrode (30); wherein the conductor plate (34, 34') extends to a second conducting area (16) of the substrate metallization layer (14) and the gate conductor (40, 40') runs through an opening (38) in the conductor plate (34, 34') arranged above the gate electrode (32).

2. 发明公开

EP3349249A3 PARALLEL PLATE WAVEGUIDE FOR POWER CIRCUITS 有权
公开(公告)号：EP3349249A3
公开(公告)日：2018-09-26
申请号：EP17206878.5
申请日：2017-12-13
申请人： Infineon Technologies AG
发明人： BAYERER, Reinhold
IPC分类号： H01L25/07 , H01L23/367 , H01L23/538 , H01L23/64 , H02M7/00 , H05K1/02
CPC分类号： H01L21/76838 , H01L21/76877 , H01L23/367 , H01L23/5386 , H01L23/645 , H01L23/66 , H01L24/48 , H01L24/49 , H01L25/071 , H01L25/072 , H01L2223/6627 , H01L2224/05599 , H01L2224/48227 , H01L2924/00014 , H01L2924/19105 , H02M7/003 , H05K3/4608 , H05K3/4617 , H05K2201/10166 , H01L2224/45099
摘要： A power semiconductor package includes a first group of semiconductor dies attached to a first side of a substrate and evenly distributed over a width of the substrate and a second group of semiconductor dies attached to the first side of the substrate and evenly distributed over the substrate width. Each die in the first and second groups has all terminals at one side which is attached to the first side of the substrate and an insulated or isolated face at a side opposite the side with the terminals. A first intermediary metal layer of the substrate forms a first DC terminal. A second intermediary metal layer of the substrate forms a second DC terminal. These intermediary metal layers are insulated from one another and form a parallel plate waveguide. Additional power semiconductor package embodiments are described.

3. 发明授权

EP2654392B1 Anreihbares flüssigkeitsgekühltes Leistungshalbleitermodul und Anordnung hiermit 有权
标题翻译：可分级液冷功率半导体模块及其布置
公开(公告)号：EP2654392B1
公开(公告)日：2018-04-04
申请号：EP13154311.8
申请日：2013-02-07
申请人： SEMIKRON Elektronik GmbH & Co. KG
发明人： Beckedahl, Peter , Steger, Jürgen , Maul, Andreas , Knebel, Markus , Kalla, Susanne
IPC分类号： H05K7/20 , H01L23/473 , H01L25/07 , H01L25/11
CPC分类号： H05K7/20927 , H01H9/52 , H01L23/40 , H01L23/4012 , H01L23/473 , H01L25/071 , H01L25/072 , H01L25/117 , H01L2924/0002 , H01L2924/00

4. 发明公开

EP3252813A3 POWER MODULE 有权转让
标题翻译：电源模块
公开(公告)号：EP3252813A3
公开(公告)日：2017-12-27
申请号：EP17173570.7
申请日：2017-05-30
申请人： JTEKT CORPORATION
发明人： UCHIDA, Nobuhiro , NAKAI, Motoo
IPC分类号： H01L25/07 , H01L23/64 , H02M7/00 , H01L23/498
CPC分类号： H02M7/003 , H01L23/49844 , H01L23/645 , H01L25/071 , H02M1/44
摘要： A power module (3) includes a multilayer circuit board (30), and a first three-phase inverter (6) and a second three-phase inverter (7), which are mounted on the multilayer circuit board (30) so as to be stacked each other. A positive-electrode-side power source conductive trace (71) of the first three-phase inverter (6) and a negative-electrode-side power source conductive trace (102) of the second three-phase inverter (7) are disposed so as to at least partially face each other in a stacking direction of the multilayer circuit board (30), such that currents respectively flow through the power source conductive traces (71, 102) in opposite directions in a facing section. A negative-electrode-side power source conductive trace (72) of the first three-phase inverter (6) and a positive-electrode-side power source conductive trace (101) of the second three-phase inverter (7) are disposed so as to at least partially face each other in the stacking direction of the multilayer circuit board (30), such that currents respectively flow through the power source conductive traces (72, 101) in opposite directions in a facing section.
摘要翻译：功率模块（3）包括安装在多层电路板（30）上的多层电路板（30）以及第一三相逆变器（6）和第二三相逆变器（7）互相堆叠。第一三相逆变器（6）的正电极侧电源导电迹线（71）和第二三相逆变器（7）的负电极侧电源导电迹线（102）如此设置以便在多层电路板（30）的堆叠方向上至少部分地彼此面对，使得电流分别在相对部分中沿相反方向流过电源导电迹线（71,102）。第一三相逆变器（6）的负电极侧电源导电迹线（72）和第二三相逆变器（7）的正电极侧电源导电迹线（101）如此设置以便在多层电路板（30）的堆叠方向上至少部分地彼此面对，使得电流分别在面对部分中沿相反方向流过电源导电迹线（72,101）。

5. 发明公开

EP3163608A4 SEMICONDUCTOR MODULE AND PRODUCTION METHOD FOR SEMICONDUCTOR MODULE 审中-公开
公开(公告)号：EP3163608A4
公开(公告)日：2017-11-01
申请号：EP15860021
申请日：2015-04-28
申请人： SHINDENGEN ELECTRIC MFG
发明人： IKEDA KOSUKE
IPC分类号： H01L23/29 , H01L23/00 , H01L23/24 , H01L23/28 , H01L25/07 , H01L25/18
CPC分类号： H01L23/3675 , H01L21/4871 , H01L21/563 , H01L23/00 , H01L23/24 , H01L23/28 , H01L23/29 , H01L23/3121 , H01L24/33 , H01L25/07 , H01L25/071 , H01L25/18 , H01L25/50 , H01L2224/37599 , H01L2224/40 , H01L2924/00014 , H01L2224/37099
摘要： A semiconductor module (100) has a first insulating substrate (11) ; a first conductor layer (12) provided on a mounting surface of the first insulating substrate (11); a first electronic element (13) provided on the first conductor layer (12) ; a sealing resin (80), which covers an overall mounting region within the mounting surface of the first insulating substrate (11), the first conductor layer (12), and the first electronic element (13) ; and a frame body (70), which is made of metal and covers the overall sealing resin (80).

6. 发明公开

EP3005417A4 INTEGRATING MULTI-OUTPUT POWER CONVERTERS HAVING VERTICALLY STACKED SEMICONDUCTOR CHIPS 有权
标题翻译：整合VON LEISTUNGSWANDLERN麻省理工学院MEHREREN奥斯金根UND VERTIKAL GESTAPELTEN HALBLEITERCHIPS
公开(公告)号：EP3005417A4
公开(公告)日：2017-08-30
申请号：EP14782292
申请日：2014-04-11
申请人： TEXAS INSTRUMENTS INC
发明人： DENISON MARIE , CARPENTER BRIAN ASHLEY , LOPEZ OSVALDO JORGE , HERBSOMMER JUAN ALEJANDRO , NOQUIL JONATHAN
IPC分类号： H01L27/02 , H01L23/495 , H01L25/07 , H05K1/02
CPC分类号： H01L23/49575 , H01L21/50 , H01L21/561 , H01L23/49524 , H01L23/49562 , H01L23/49838 , H01L24/29 , H01L24/32 , H01L24/34 , H01L24/36 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/84 , H01L24/97 , H01L25/0657 , H01L25/071 , H01L25/072 , H01L25/16 , H01L25/18 , H01L25/50 , H01L2224/29101 , H01L2224/32245 , H01L2224/37147 , H01L2224/40095 , H01L2224/40137 , H01L2224/40139 , H01L2224/40145 , H01L2224/40245 , H01L2224/45014 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/83191 , H01L2224/84801 , H01L2224/8484 , H01L2224/8485 , H01L2924/00014 , H01L2924/10272 , H01L2924/10329 , H01L2924/1033 , H01L2924/1301 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/15724 , H01L2924/15747 , H01L2924/1576 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/01028 , H01L2924/014 , H01L2924/20752
摘要： A packaged multi-output converter (200) comprising a leadframe with a chip pad (201) as ground terminal and a plurality of leads (202) including the electrical input terminal (203); a first FET chip (sync chip, 220) with its source terminal affixed to the leadframe and on its opposite surface a first drain terminal (221) positioned adjacent to a second drain terminal (222), the drain terminals connected respectively by a first (241) and a second (242) metal clip to a first (204) and second (205) output lead; a second FET chip (control chip, 211), positioned vertically over the first drain terminal, with its source terminal attached onto the first clip; a third FET chip (control chip, 212), positioned vertically over the second drain terminal, with its source terminal attached onto the second clip; and the drain terminals (213, 214) of the second and third chips attached onto a third metal clip (260) connected to the input lead (203).
摘要翻译：一种封装多输出转换器（200），包括具有作为接地端子的芯片焊盘（201）的引线框和包括电输入端子（203）的多个引线（202）; 第一FET芯片（同步芯片220），其源极端子固定到引线框架并且在其相对表面上与第二漏极端子（222）相邻定位的第一漏极端子（221），漏极端子分别通过第一（第二）（204）和第二输出引线（205）;以及第二（242）金属夹到第一输出引线（204）和第二输出引线（205）第二FET芯片（控制芯片，211），其垂直地定位在第一漏极端子上方，其源极端子附接到第一夹子上; 第三FET芯片（控制芯片212），其垂直放置在第二漏极端子上方，其源极端子附接到第二夹子上; 和连接到与输入引线（203）连接的第三金属夹（260）上的第二和第三芯片的漏极端子（213,214）。

7. 发明公开

EP2993694A1 MODULE ÉLECTRONIQUE HAUTE PUISSANCE ET PROCÉDÉ DE FABRICATION D'UN TEL MODULE 有权
标题翻译： ELEKTRONISCHES HOCHLEISTUNGSMODUL UND HERSTELLUNGSVERFAHREN EINES SOLCHEN MODULS
公开(公告)号：EP2993694A1
公开(公告)日：2016-03-09
申请号：EP15183186.4
申请日：2015-08-31
申请人： Schneider Electric Industries SAS
发明人： WU, Cong Martin
IPC分类号： H01L25/07
CPC分类号： H05K7/1023 , H01L23/49811 , H01L23/49844 , H01L23/49861 , H01L24/10 , H01L25/071 , H01L2224/291 , H01L2224/33181 , H01L2924/0002 , H05K3/341 , H05K7/026 , H05K7/06 , H01L2924/00 , H01L2924/014
摘要： L'invention concerne un module (1) électronique de puissance comportant au moins une paire (30, 35, 40, 45) de composants (31, 32, 36, 37, 41, 42, 46, 47) électroniques de puissance, chaque paire (30, 35, 40, 45) comportant un premier et un deuxième composant (31, 36, 41, 46, 32, 37, 42, 47), chaque composant (31, 32, 36, 37, 41, 42, 46, 47) comportant une première face, destinée à être supportée sur un support (10, 20) et une deuxième face destinée à être connectée électriquement à un circuit électrique avec une surface de contact thermique inférieure à celle entre la première face (31a, 32a, 36a, 37a, 41a, 42a, 36a, 37a) et le support (10, 20), et un premier et un deuxième support (10, 20). Le premier composant (31, 36, 41, 46) de chaque paire est supporté par le premier support (10) et connecté à un deuxième circuit électrique du deuxième support (20) et le deuxième composant (32, 37, 42, 47) de chaque paire est supporté par le deuxième support (20) et connecté à un premier circuit électrique du premier support (10). L'invention concerne également un procédé de fabrication d'un tel module (1).
摘要翻译：一种功率电子模块，包括至少一对电力电子部件，每对包括第一和第二部件，每个部件包括被配置为支撑在支撑件上的第一面，以及构造成与电气电连接的第二面电路具有比第一面和支撑件之间的接触面积更小的热接触面积，以及第一和第二支撑件。每对中的第一部件由第一支撑件支撑并且连接到第二支撑件的第二电路，并且每对中的第二部件被支撑在第二支撑件上并连接到第一支撑件的第一电路。

8. 发明公开

EP2963683A1 MODULE, MODULE ASSEMBLY, AND MODULE MANUFACTURING METHOD 有权
标题翻译： MODUL，MODULANORDNUNG UND VERFAHREN ZUR HERSTELLUNG EINES MODULS
公开(公告)号：EP2963683A1
公开(公告)日：2016-01-06
申请号：EP13857664.0
申请日：2013-02-28
申请人： Shindengen Electric Manufacturing Co. Ltd.
发明人： IKEDA, Kosuke
IPC分类号： H01L25/07 , H01L25/18
CPC分类号： H05K1/18 , H01L23/49811 , H01L23/5385 , H01L25/071 , H01L2224/48137 , H01L2224/49111 , H01L2924/1305 , H02M7/003 , H05K13/0023 , Y10T29/49146 , H01L2924/00
摘要： A module comprises a first insulating-substrate-side member 10 that has a first insulating substrate 11, a first conductor layer 12 provided on an upper side of the first insulating substrate 11, and a first electronic element 31a, 32a provided on an upper side of the first conductor layer 12; a second insulating-substrate-side member 60 that has a second insulating substrate 61, a second conductor layer 62 provided on a lower side of the second insulating substrate 61, and a second electronic element 31b, 32b provided on a lower side of the second conductor layer 62; and a sealing member 80 that is provided between the first insulating substrate 11 and the second insulating substrate 61. The first electronic element 31a, 32a and the second electronic element 31b, 32b are opposingly disposed. The first electronic element 31a, 32a and the second electronic element 31b, 32b are connected by an element connecting conductor post 51 that has electric conductivity.
摘要翻译：模块包括第一绝缘基板侧构件10，其具有第一绝缘基板11，设置在第一绝缘基板11的上侧的第一导体层12和设置在第一绝缘基板11的上侧的第一电子元件31a，32a 的第一导体层12; 第二绝缘基板侧部件60具有第二绝缘基板61，设置在第二绝缘基板61的下侧的第二导体层62和设置在第二绝缘基板61的下侧的第二电子元件31b，32b。导体层62; 以及设置在第一绝缘基板11和第二绝缘基板61之间的密封构件80.第一电子元件31a，32a和第二电子元件31b，32b相对设置。第一电子元件31a，32a和第二电子元件31b，32b通过具有导电性的元件连接导体柱51连接。

9. 发明公开

EP2908339A1 Power semiconductor arrangement and method for protecting a power semiconductor module against failures 审中-公开
标题翻译：用于保护功率半导体模块对故障的功率半导体装置和方法
公开(公告)号：EP2908339A1
公开(公告)日：2015-08-19
申请号：EP14155438.6
申请日：2014-02-17
申请人： ABB Technology AG
发明人： Bianda, Enea , Heinemann, Alexander , Lüthi, Christian , Knapp, Gerold , Vemulapati, Umamaheswara
IPC分类号： H01L25/07 , H03K17/0412 , H03K17/06 , H02H3/08
CPC分类号： H01L25/071 , H01L25/072 , H01L25/073 , H01L2924/0002 , H03K17/08128 , H01L2924/00
摘要： The invention relates to a power semiconductor arrangement, comprising a power semiconductor module (1) and a control driving device (2), wherein the power semiconductor module (1) comprises a plurality of power semiconductor devices (3), a first main module contact (4), a first auxiliary contact (5), a second main module contact (6) and a control module contact (7), each power semiconductor device (3) comprises a first main device contact, a first auxiliary device contact, a second main device contact and a control device contact, whereby all first main device contacts are connected to the first main module contact (4), all first auxiliary device contacts are connected to the first auxiliary module contact (5), all second main device contacts are connected to the second main module contact (6), and all control main device contacts are connected to the control module contact (7), the control driving device (2) is configured for switching on the power semiconductor module (1) by applying a turn-on signal to the control module contact (7) and for switching off the power semiconductor module (1) by applying a turn-off signal to the control module contact (7).
摘要翻译：本发明涉及的功率半导体装置，包括功率半导体模块（1）和控制驱动装置（2），worin的功率半导体模块（1）包括功率半导体器件的多个（3），第一主模块接触（4），第一辅助触点（5），一个第二主模块触点（6）和控制模块（7）接触，每个功率半导体器件（3）包括一个第一主设备接触，第一辅助装置接触，一第二主装置接触和控制装置相接触，从而使所有第一主设备触点连接到所述第一主模块（4）接触，所有的第一辅助设备触点连接到第一辅助模块（5）接触，所有第二主装置触点被连接到所述第二主模块（6）接触，并且所有控制主设备触点连接到控制模块（7）接触时，控制驱动装置（2）被配置用于将功率半导体模块上的开关（1）通过applyin 克开启信号到控制模块（7）接触并用于通过将关断信号到控制模块（7）接触断开的功率半导体模块（1）。

10. 发明公开

EP2700097A1 FLIP-CHIP, FACE-UP AND FACE-DOWN WIREBOND COMBINATION PACKAGE 审中-公开
标题翻译：向上和向下看的WIRED KOMBINATIONSVERKAPSELUNG在倒装芯片设计
公开(公告)号：EP2700097A1
公开(公告)日：2014-02-26
申请号：EP12715768.3
申请日：2012-03-21
申请人： Tessera, Inc.
发明人： HABA, Belgacem , CRISP, Richard, Dewitt , ZOHNI, Wael
IPC分类号： H01L25/065 , H01L25/10 , H01L23/31 , H01L21/38
CPC分类号： H01L25/071 , H01L23/3128 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/06135 , H01L2224/06136 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/32145 , H01L2224/32225 , H01L2224/48095 , H01L2224/48227 , H01L2224/4824 , H01L2224/48247 , H01L2224/4826 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/06558 , H01L2225/06562 , H01L2924/01087 , H01L2924/09701 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2224/32245
摘要： A microelectronic assembly 10 can include a substrate 30 having an aperture 39 extending between first and second surfaces 34, 32 thereof, substrate contacts 41 at the first surface, and terminals 36 at the second surface. The microelectronic assembly 10 can include a first microelectronic element 12 having a front surface 16 facing the first surface 34, a second microelectronic element 14 having a front surface 22 facing the first microelectronic element, and leads 50 electrically connecting contacts 26 of the second microelectronic element with the terminals 36. The contacts 26 of the second microelectronic element 14 can be exposed at the front surface 22 beyond an edge 29 of the first microelectronic element 12. The first microelectronic element 12 can be configured to regenerate at least some signals received by the microelectronic assembly 10 at the terminals 36 and to transmit said signals to the second microelectronic element 14.

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