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1. 发明授权

EP0856593B1 A method and apparatus for enhancing sidewall coverage during sputtering in a chamber having an inductively coupled plasma 失效
标题翻译：对于在腔室中与电感耦合等离子溅射过程中改善的侧壁覆盖的方法和装置
公开(公告)号：EP0856593B1
公开(公告)日：2001-11-07
申请号：EP98101169.5
申请日：1998-01-23
申请人： Applied Materials, Inc.
发明人： Xu, Zheng , Yao, Gongda
IPC分类号： C23C14/22 , C23C16/44
CPC分类号： C23C14/345 , C23C14/046 , C23C14/165 , C23C14/35 , C23C14/358 , H01J37/321 , H01J37/34 , H01L21/76877

2. 发明公开

EP0836219A3 Active shield for generating a plasma for sputtering 失效
公开(公告)号：EP0836219A3
公开(公告)日：1998-09-16
申请号：EP97307875.1
申请日：1997-10-06
申请人： APPLIED MATERIALS, INC.
发明人： Yao, Gongda , Hofmann, Ralf , Tepman, Avi , Gopalraja, Praburam
IPC分类号： H01J37/34 , H01J37/32
CPC分类号： H01J37/321 , H01J37/34 , H01J37/3441 , H01J2237/3327
摘要： A plasma chamber (100) in a semiconductor fabrication system eliminates the need for magnetron sputtering. Referring first to Figs. 1-2, a plasma generator in accordance with an embodiment of the present invention comprises a substantially cylindrical plasma chamber (100) which is received in a vacuum (102) (Fig.2). The plasma chamber (100) of this embodiment has a single turn helical coil (104) which is carried internally of the vacuum chamber walls (108) (Fig.2) by a chamber shield (106). The chamber shield (106) protects the interior walls (108) (Fig.2) of the vacuum chamber (102) from the material being deposited within the interior of the plasma chamber (100). Radio frequency (RF) energy from an RF generator (404) is radiated from the coil (104) into the interior of the plasma chamber (100), which energizes a plasma within the plasma chamber (100). An ion flux strikes a negatively biased, magnetron-free target (110) positioned above the plasma chamber (100). No magnetron magnets are disposed above the magnetron-free target (110). The plasma ions eject material from the magnetron-free target (110) onto a substrate (112) which may be a wafer or other workpiece supported by a pedestal (114) at the bottom of the plasma chamber. It has been found that high density plasmas produce sufficient ionization to provide for a high deposition rate of target material onto a substrate, which allows for the elimination of magnetron magnetic fields and the attendant magnetron magnets. By eliminating the magnetron, the uniformity of the deposition of target material onto a workpiece can also be improved. In addition, the sidewall coverage of trench-like structures and contact holes and the like can also be increased. Furthermore, the rate of the deposition of target material onto a workpiece can be the same or better than that obtainable using magnetron sputtering.

3. 发明公开

EP1032032A3 Tailoring of a wetting/barrier layer to reduce electromigration in an aluminium interconnect 审中-公开
标题翻译：在铝互连降低电润湿/势垒层的设计
公开(公告)号：EP1032032A3
公开(公告)日：2001-07-11
申请号：EP00300855.4
申请日：2000-02-03
申请人： Applied Materials, Inc.
发明人： Su, Jingang , Yao, Gongda , Xu, Zhang , Chen, Fusen
IPC分类号： H01L21/768 , H01L23/532
CPC分类号： H01L21/76846 , H01L21/76843 , H01L21/76876 , H01L21/76877
摘要： A number of different wetting layer or wetting/barrier layer structures enables depositing of overlying aluminum interconnect layers having (111) texturing sufficient to provide a Rocking Curve FWHM angle θ of about 1° or less. These barrier layers include: 1) Ti alone, where the Ti is deposited using a high density plasma; 2) Ti/TiN, where both layers are deposited using a high density plasma; and, 3) Ti/TiN, where the Ti layer is deposited using a high density plasma and the TiN layer is deposited using standard sputtering techniques or collimated sputtering techniques. These barrier layers can be formed on a substrate in a single process chamber or in two process chambers, depending on the composition of the barrier layer and the features available in a given deposition chamber. When it is desired to use a tri-layer barrier layer (for reasons other than electromigration resistance), a Ti/TiN/TiN x tri-layer having at least the initial Ti layer formed in a high density plasma provides excellent electromigration resistance in an aluminum layer subsequently deposited thereover. This is true even when the aluminum deposition temperature is below about 350 °C, for interconnect applications. The application of bias to a substrate (to attract ions toward the substrate) during deposition of at least the initial Ti layer is beneficial in improving the (111) texturing of a subsequently-deposited aluminum layer up to a point, after which the (111) texturing decreases.

4. 发明公开

EP0818817A2 Aluminium hole filling using ionized metal adhesion layer 失效
标题翻译：使用电离金属粘合层填充铝孔
公开(公告)号：EP0818817A2
公开(公告)日：1998-01-14
申请号：EP97304944.8
申请日：1997-07-07
申请人： Applied Materials, Inc.
发明人： Satitpunwaycha, Peter , Yao, Gongda , Ngan, Kenny King-Tai , Xu, Zheng
IPC分类号： H01L21/768
CPC分类号： H01L21/76846 , H01L21/28518 , H01L21/76877 , H01L23/485 , H01L23/5226 , H01L23/53223 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A hole filling process for an integral circuit in which a hole (10) connected between two wiring levels in the integrated circuit are connected by a narrow hole, especially where the underlying level (18) is silicon. First, a physical vapor deposition (PVD) process fills a barrier tri-layer into the hole. The barrier tri-layer (26) includes sequential layers of Ti (20), TiN (22), and graded TIN X (24) grown under conditions of a high-density plasma. Thereafter, a first aluminum layer (70) is PVD deposited under conditions of a high-density plasma. A filling aluminum layer (72) is then deposited by standard PVD techniques.
摘要翻译：用于集成电路的孔填充工艺，其中连接在集成电路中的两个布线层之间的孔（10）通过窄孔连接，特别是在下面的层（18）是硅的情况下。首先，物理气相沉积（PVD）工艺将阻挡三层填充到孔中。阻挡三层（26）包括在高密度等离子体的条件下生长的Ti（20），TiN（22）和分级TINX（24）的连续层。之后，在高密度等离子体的条件下PVD沉积第一铝层（70）。然后通过标准PVD技术沉积填充铝层（72）。

5. 发明公开

EP1094503A2 Barrier layer for aluminium metallisation 审中-公开
标题翻译： Barrierenschicht zur Aluminiummetallisierung
公开(公告)号：EP1094503A2
公开(公告)日：2001-04-25
申请号：EP00309252.5
申请日：2000-10-20
申请人： Applied Materials, Inc.
发明人： Singhvi, Shri , Rengarajan, Suraj , Ding, Peijun , Yao, Gongda
IPC分类号： H01L21/283 , H01L23/532
CPC分类号： H01L21/76843 , H01L21/2855 , H01L21/28556 , H01L21/76877
摘要： The present invention provides an effective barrier layer for improved via fill in high aspect ratio sub-micron apertures at low temperature, particularly at the contact level on a substrate. In one aspect of the invention, a feature is filled by first depositing a barrier layer onto a substrate having high aspect ratio contacts or vias formed thereon. The barrier layer is preferably comprised of Ta, TaN x , W, WN x , or combinations thereof. A CVD conformal metal layer is then deposited over the barrier layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal layer is deposited onto the previously formed CVD conformal metal layer at a temperature below that of the melting point temperature of the metal to allow flow of the CVD conformal layer and the PVD metal layer into the vias.
摘要翻译：本发明提供了一种有效的阻挡层，用于在低温下，特别是在基底上的接触电平下，改进通孔填充高纵横比亚微米孔径。在本发明的一个方面中，通过首先将阻挡层沉积到具有形成在其上的高纵横比触点或通孔的衬底上来填充特征。阻挡层优选由Ta，TaNx，W，WNx或其组合构成。然后在低温下将CVD保形金属层沉积在阻挡层上，以提供用于PVD金属的保形润湿层。接下来，在低于金属熔点温度的温度下，将PVD金属层沉积到先前形成的CVD保形金属层上，以使CVD保形层和PVD金属层流入通孔。

6. 发明公开

EP1032032A2 Tailoring of a wetting/barrier layer to reduce electromigration in an aluminium interconnect 审中-公开
标题翻译： Auslegung einer Benetzungs- / Barriere-Schichtfürverringerte Elektromigration bei Aluminiumverbindungsleitungen
公开(公告)号：EP1032032A2
公开(公告)日：2000-08-30
申请号：EP00300855.4
申请日：2000-02-03
申请人： Applied Materials, Inc.
发明人： Su, Jingang , Yao, Gongda , Xu, Zhang , Chen, Fusen
IPC分类号： H01L21/768
CPC分类号： H01L21/76846 , H01L21/76843 , H01L21/76876 , H01L21/76877
摘要： We have discovered that it is not necessary to have a tri-layer wetting layer/barrier layer structure (Ti/TiN/TiN x ) of the kind described in several of the references cited above to obtain a subsequently deposited aluminum interconnect layer having excellent electromigration properties. We have discovered a number of different wetting layer or wetting/barrier layer structures which enable depositing of overlying aluminum interconnect layers having (111) texturing sufficient to provide a Rocking Curve FWHM angle θ of about 1 ° or less. These barrier layers include: 1) Ti alone, where the Ti is deposited using a high density plasma; 2) Ti/TiN, where both layers are deposited using a high density plasma; and, 3) Ti/TiN, where the Ti layer is deposited using a high density plasma and the TiN layer is deposited using standard sputtering techniques or collimated sputtering techniques. These barrier layers can be formed on a substrate in a single process chamber or in two process chambers, depending on the composition of the barrier layer and the features available in a given deposition chamber. In addition, we have discovered that when it is desired to use a tri-layer barrier layer (for reasons other than electromigration resistance), a Ti/TiN/TiN x tri-layer having at least the initial Ti layer formed in a high density plasma provides excellent electromigration resistance in an aluminum layer subsequently deposited thereover. This is true even when the aluminum deposition temperature is below about 350 °C, for interconnect applications. We further determined that the application of bias to a substrate (to attract ions toward the substrate) during deposition of at least the initial Ti layer is beneficial in improving the (111) texturing of a subsequently-deposited aluminum layer up to a point, after which the (111) texturing decreases.
摘要翻译：我们已经发现，不需要具有上述几个参考文献中所述类型的三层润湿层/阻挡层结构（Ti / TiN / TiNx），以获得具有优异电迁移性能的随后沉积的铝互连层。我们已经发现了许多不同的润湿层或润湿/阻挡层结构，其能够沉积具有足以提供摇摆曲线FWHM角度的（111）纹理的上覆铝互连层; 约1°以下。这些阻挡层包括：1）单独的Ti，其中使用高密度等离子体沉积Ti; 2）Ti / TiN，其中使用高密度等离子体沉积两层; 和3）Ti / TiN，其中使用高密度等离子体沉积Ti层，并使用标准溅射技术或准直溅射技术沉积TiN层。取决于阻挡层的组成和在给定的沉积室中可获得的特征，这些阻挡层可以在单个处理室中的基板上或两个处理室中形成。此外，我们已经发现，当希望使用三层阻挡层（由于不具有电迁移电阻的原因）时，至少具有以高密度等离子体形成的初始Ti层的Ti / TiN / TiNx三层在随后沉积的铝层中提供优异的电迁移率。即使当铝沉积温度低于约350℃时，对于互连应用也是如此。我们进一步确定在至少初始Ti层的沉积期间向衬底施加偏压（以吸引离子到衬底）有利于在随后沉积的铝层的（111）纹理化之后，直到一个点（111）纹理减少。

7. 发明公开

EP0856885A2 Method and apparatus for reducing the first wafer effect 失效
标题翻译： Verfahren und Vorrichtung zur Reduzierung des“Erste-Scheibe-Effekts”
公开(公告)号：EP0856885A2
公开(公告)日：1998-08-05
申请号：EP98300632.1
申请日：1998-01-29
申请人： Applied Materials, Inc.
发明人： Wang, Hougong , Yao, Gongda
IPC分类号： H01L21/768
CPC分类号： H01L21/02 , H01L21/768
摘要： A method and apparatus are provided for reducing and eliminating the First Wafer Effect. Specifically, in a method or system (11) that employs a separate hot chamber (15) for hot deposition of material from a source (27) that may result in the First Wafer Effect (FWE material), a cold layer of the FWE material is deposited within the hot deposition chamber prior to deposition of the hot FWE material layer.
摘要翻译：提供了一种减少和消除第一晶片效应的方法和装置。具体地说，在采用单独的热室（15）的方法或系统（11）中，用于从可能导致第一晶片效应（FWE材料）的源（27）热沉积材料的FWE材料的冷层在沉积热FWE材料层之前沉积在热沉积室内。

8. 发明公开

EP0856593A1 A method and apparatus for enhancing sidewall coverage during sputtering in a chamber having an inductively coupled plasma 失效
标题翻译：一种用于在室中感应耦合等离子体溅射期间增加侧壁检测方法和装置
公开(公告)号：EP0856593A1
公开(公告)日：1998-08-05
申请号：EP98101169.5
申请日：1998-01-23
申请人： Applied Materials, Inc.
发明人： Xu, Zheng , Yao, Gongda
IPC分类号： C23C14/22 , C23C16/44
CPC分类号： C23C14/345 , C23C14/046 , C23C14/165 , C23C14/35 , C23C14/358 , H01J37/321 , H01J37/34 , H01L21/76877
摘要： Increased sidewall coverage in a wetting layer (504) for a substrate via or trench (500) is achieved in an inductively coupled plasma chamber by sputtering relatively pure aluminum.
摘要翻译：在润湿层增加侧壁覆盖（504），用于经由一个或沟槽（500）通过溅射相对纯铝实现，以电感耦合等离子体室的底物。

9. 发明公开

EP1094503A3 Barrier layer for aluminium metallisation 审中-公开
标题翻译：对于铝金属化阻挡层
公开(公告)号：EP1094503A3
公开(公告)日：2002-01-02
申请号：EP00309252.5
申请日：2000-10-20
申请人： Applied Materials, Inc.
发明人： Singhvi, Shri , Rengarajan, Suraj , Ding, Peijun , Yao, Gongda
IPC分类号： H01L21/283 , H01L23/532 , H01L21/768
CPC分类号： H01L21/76843 , H01L21/2855 , H01L21/28556 , H01L21/76877
摘要： The present invention provides an effective barrier layer for improved via fill in high aspect ratio sub-micron apertures at low temperature, particularly at the contact level on a substrate. In one aspect of the invention, a feature is filled by first depositing a barrier layer onto a substrate having high aspect ratio contacts or vias formed thereon. The barrier layer is preferably comprised of Ta, TaN x , W, WN x , or combinations thereof. A CVD conformal metal layer is then deposited over the barrier layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal layer is deposited onto the previously formed CVD conformal metal layer at a temperature below that of the melting point temperature of the metal to allow flow of the CVD conformal layer and the PVD metal layer into the vias.

10. 发明公开

EP0866499A2 Silicon-doped titanium wetting layer for aluminum plug 失效
标题翻译： Siliziumdotierte TitanbenetzungsschichtfüreinenAluminiumstöpsel
公开(公告)号：EP0866499A2
公开(公告)日：1998-09-23
申请号：EP98301836.7
申请日：1998-03-12
申请人： Applied Materials, Inc.
发明人： Yao, Gongda , Ding, Peijun , Xu, Zheng , Kieu, Hoa
IPC分类号： H01L21/768 , H01L21/285
CPC分类号： H01L21/76843 , H01L21/76882 , H01L23/485 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A process for fabricating metal plugs, such as aluminum plugs, in a semiconductor workpiece. The invention is suitable for filing narrow, high aspect ratio holes, and the invention minimizes the formation of TiAl 3 or other products of interdiffusion between the plug and the wetting layer. First, an optional barrier layer is created by covering the bottom of a hole with a film containing titanium nitride doped with silicon. Second, a wetting layer is created by covering the side walls of a hole with a film containing titanium doped with silicon, in a Ti:Si molar ratio greater than 1:2. Preferably, the wetting layer is created by sputter deposition using a titanium sputtering target containing 0.1% to 20% wt silicon, most preferably 5% to 10% wt silicon. Third, the hole is filed by depositing a material consisting primarily of aluminum. The hole preferably is filled by sputter deposition using an aluminum sputtering target, optionally containing dopants such as copper. To facilitate filling the hole without voids, the aluminum sputter deposition preferably is performed "warm", i.e., with the workpiece at a temperature below the melting point of aluminum but high enough to promote reflow of the deposited material. The silicon atoms in the wetting layer inhibit the titanium from reacting with the aluminum, and the wetting layer facilitates filling the hole with the aluminum material without leaving unfilled voids.
摘要翻译：一种用于在半导体工件中制造诸如铝塞的金属插头的工艺。本发明适用于填充狭窄的高纵横比孔，并且本发明使塞子和润湿层之间的TiAl 3或其它相互扩散产物的形成最小化。首先，通过用包含掺杂有硅的氮化钛的膜覆盖孔的底部来产生可选的阻挡层。其次，通过用包含硅的钛的膜以Ti:Si摩尔比大于1:2覆盖孔的侧壁来产生润湿层。优选地，通过使用含有0.1重量％至20重量％硅，最优选5重量％至10重量％硅的钛溅射靶的溅射沉积来产生润湿层。第三，通过沉积主要由铝构成的材料来提供孔。优选地，通过使用铝溅射靶的溅射沉积来填充孔，任选地含有诸如铜的掺杂剂。为了便于填充孔而没有空隙，铝溅射沉积优选地进行“暖”，即工件在低于铝的熔点的温度下，但足够高以促进沉积材料的回流。润湿层中的硅原子阻止钛与铝反应，并且润湿层有助于用铝材料填充孔而不留下未填充的空隙。

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