专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP3032588A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译： VERFAHREN ZUR HERSTELLUNG EINES HALBLEITERBAUELEMENTES
公开(公告)号：EP3032588A1
公开(公告)日：2016-06-15
申请号：EP16152713.0
申请日：2008-12-19
申请人： Asahi Kasei EMD Corporation
发明人： Koricic, Marko , Suligoj, Tomislav , Mochizuki, Hidenori , Morita, Soichi
IPC分类号： H01L29/735 , H01L21/331 , H01L21/8249 , H01L21/8222 , H01L21/8248 , H01L27/06 , H01L29/08 , H01L21/225 , H01L29/10 , H01L21/265
CPC分类号： H01L27/0623 , H01L21/2257 , H01L21/26513 , H01L21/2658 , H01L21/26586 , H01L21/8249 , H01L29/0808 , H01L29/1008 , H01L29/1045 , H01L29/6625 , H01L29/665 , H01L29/6659 , H01L29/735
摘要： A configuration of a lateral transistor suited for the hybrid-integration (BiCMOS) of a high-performance lateral transistor (HCBT) and a CMOS transistor, and a method for manufacturing the lateral transistor are provided. A semiconductor device includes a HCBT 100 and a CMOS transistor 200 hybrid-integrated therein. The HCBT 100 has an open region 21 opened by etching a device isolating oxide film 6 surrounding an n-hill layer 11, an emitter electrode 31A and a collector electrode 31B each of which is formed in the open region 21 and is composed of a polysilicon film having such a thickness as to expose the n-hill layer 11 exposed by etching the device isolating oxide film, and an ultrathin oxide film 24 covering at least a part of the n-hill layer 11. The ultrathin oxide film 24 functions as a protective film for protecting the n-hill layer 11 from being etched when the polysilicon film is etched to form the emitter 20 electrode 31A and the collector electrode 31B.
摘要翻译：提供了适用于高性能横向晶体管（HCBT）和CMOS晶体管的混合集成（BiCMOS）的横向晶体管的结构以及制造横向晶体管的方法。半导体器件包括混合集成在其中的HCBT 100和CMOS晶体管200。 HCBT 100具有通过蚀刻围绕n-hill层11的器件隔离氧化膜6，发射电极31A和集电极31B而开放的开放区域21，每个形成在开放区域21中并且由多晶硅具有通过蚀刻器件隔离氧化膜而暴露的n-hill层11的厚度的膜和覆盖n-hill层11的至少一部分的超薄氧化膜24.超薄氧化物膜24用作当蚀刻多晶硅膜以形成发射极20电极31A和集电极31B时，用于保护n-hill层11的保护膜不被蚀刻。

2. 发明公开

EP3029716A1 PROCESS FOR PRODUCING COMPOUND SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译： VERFAHREN ZUR HERSTELLUNG DES VERBUNDHALBLEITERSUBSTRATS UND HALBLEITERBAUELEMENT
公开(公告)号：EP3029716A1
公开(公告)日：2016-06-08
申请号：EP15196973.0
申请日：2008-09-12
申请人： Asahi Kasei EMD Corporation
发明人： Shibata, Yoshihiko , Miyahara, Masatoshi , Ikeda, Takashi , Kunimi, Yoshihisa
IPC分类号： H01L21/02 , H01L21/203 , H01L21/205 , H01L29/26 , H01L43/06 , H01L29/267 , C30B25/18 , C30B29/40
CPC分类号： H01L29/267 , C30B25/18 , C30B29/40 , H01L21/02381 , H01L21/02546 , H01L21/02658 , H01L43/065
摘要： The present invention relates to a compound semiconductor substrate having a reduced dislocation (defect) density at an interface between a Si substrate and a compound semiconductor layer, and a method for producing the compound semiconductor substrate. Contaminants, such as organic matter and metal, on a surface of a Si substrate were removed by subjecting the Si substrate sequentially to organic washing, acid washing and alkaline washing, whereby a flat oxide film (not shown) was formed (S31). The oxide film on the surface was removed by using an aqueous hydrogen fluoride solution having a concentration of 1.0% by weight, whereby hydrogen termination treatment was performed (S32). The Si substrate immediately after being subjected to the hydrogen termination treatment was placed in a vacuum apparatus, and then the temperature of the Si substrate was raised in a vacuum apparatus (S33). If the substrate temperature is raised without any operation, the termination hydrogen is released. Before the hydrogen was released, pre-irradiation with As was performed (S34). Thus, an interface between the Si substrate and the compound semiconductor layer was prepared. Several minutes later, irradiation with Ga and As was performed (S35). Thereby, the compound semiconductor was formed (S36).
摘要翻译：本发明涉及在Si衬底和化合物半导体层之间的界面处具有减少的位错（缺陷）密度的化合物半导体衬底及其制造方法。通过使Si衬底依次进行有机洗涤，酸洗和碱洗，除去形成平坦氧化物膜（未图示）的Si衬底表面上的有机物和金属等污染物（S31）。使用浓度为1.0重量％的氟化氢水溶液除去表面的氧化膜，由此进行氢终止处理（S32）。将刚刚进行氢终止处理后的Si衬底置于真空装置中，然后在真空装置中升温Si衬底的温度（S33）。如果衬底温度升高而没有任何操作，则释放终止氢。在释放氢之前，进行As的预照射（S34）。因此，制备了Si衬底和化合物半导体层之间的界面。几分钟后，进行Ga和As的照射（S35）。由此形成化合物半导体（S36）。

3. 发明授权

EP1962062B1 POSITION DETECTOR 有权
公开(公告)号：EP1962062B1
公开(公告)日：2016-03-09
申请号：EP06834680.8
申请日：2006-12-14
申请人： Asahi Kasei EMD Corporation
发明人： NISHIDA, Sosuke , TAKATSUKA, Toshinori
IPC分类号： G01D5/14
CPC分类号： G01D5/145

4. 发明公开

EP2960667A1 MAGNETIC SENSOR AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译： VERFAHREN ZUR HERSTELLUNG DAVON的MAGNETSENSOR
公开(公告)号：EP2960667A1
公开(公告)日：2015-12-30
申请号：EP15177698.6
申请日：2007-03-28
申请人： Asahi Kasei EMD Corporation
发明人： KATAOKA, Makoto , KAKUTA, Katsumi , YAMAGATA, Yo , KANAYAMA, Yuichi
IPC分类号： G01R33/07 , H01L43/06
CPC分类号： G01R33/07 , G01R33/0011 , H01L27/22 , H01L43/06
摘要： The present invention relates to a magnetic sensor with which magnetic characteristics are made extremely stable by consideration of an area of contact of a base layer of a magnetic substance and a semiconductor substrate. On a semiconductor substrate (111) a plurality of Hall elements (112a, 112b) are embedded so as to be coplanar to a top surface of the semiconductor substrate while being mutually spaced apart by a predetermined distance, and above the Hall elements and the semiconductor substrate, a base layer (114), having coefficient of thermal expansion differing from that of the Hall elements and partially covers a region of each Hall elements, is formed via a protective layer (113), and a magnetic flux concentrator (115), having an area larger than the base layer and with magnetic amplification, is formed on the base layer. An area of contact of the base layer of the magnetic substance and the semiconductor substrate is made small to lessen the generation of an offset voltage.
摘要翻译：磁传感器技术领域本发明涉及考虑到磁性物质的基底层与半导体基板的接触面积而使磁特性非常稳定的磁传感器。在半导体衬底（111）上嵌入多个霍尔元件（112a，112b），以便与半导体衬底的顶表面共面一个预定距离相互间隔开，并且在霍尔元件和半导体通过保护层（113）和磁通集中器（115）形成具有与霍尔元件的热膨胀系数不同的部分的基底层（114），并部分地覆盖每个霍尔元件的区域，在基底层上形成具有大于基底层并且具有磁放大的面积的区域。使磁性物质的基底层与半导体基板的接触面积小，以减少偏移电压的产生。

5. 发明授权

EP2023398B9 Infrared sensor IC, and infrared sensor and manufacturing method thereof 有权
标题翻译：红外线传感器IC和它们的红外线传感器及其制造方法
公开(公告)号：EP2023398B9
公开(公告)日：2015-02-18
申请号：EP08019935.9
申请日：2004-09-09
申请人： Asahi Kasei EMD Corporation
发明人： Ueno, Koichiro , Kuze, Naohiro , Moriyasu, Yoshitaka , Nagase, Kazuhiro
IPC分类号： H01L31/0304 , H01L31/0203 , H01L27/144
CPC分类号： H01L31/035236 , B82Y20/00 , G01J1/02 , G01J1/0204 , G01J5/02 , G01J5/0215 , G01J5/04 , G01J5/045 , G01J5/20 , G01J2001/0276 , H01L31/1035 , H01L2224/48137 , H01L2224/48145 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： An infrared sensor IC and an infrared sensor, which are extremely small and are not easily affected by electromagnetic noise and thermal fluctuation, and a manufacturing method thereof are provided. A compound semiconductor that has a small device resistance and a large electron mobility is used for a sensor (2), and then, the compound semiconductor sensor (2) and an integrated circuit (3), which processes an electrical signal output by the compound semiconductor sensor (2) and performs an operation, are arranged in a single package using hybrid formation. In this manner, an infrared sensor IC that can be operated at room temperature can be provided by a microminiature and simple package that is not conventionally produced.

6. 发明授权

EP2557430B1 Magnetic sensor and method for fabricating the same 有权
标题翻译：磁传感器和其制备方法
公开(公告)号：EP2557430B1
公开(公告)日：2014-05-14
申请号：EP12183468.3
申请日：2007-03-28
申请人： Asahi Kasei EMD Corporation
发明人： Kataoka, Makoto , Kakuta, Katsumi , Yamagata, Yo , Kanayama, Yuichi
IPC分类号： G01R33/07 , H01L43/06 , G01R33/00
CPC分类号： G01R33/07 , G01R33/0011 , H01L27/22 , H01L43/06

7. 发明授权

EP2157405B1 PHYSICAL AMOUNT MEASURING DEVICE AND PHYSICAL AMOUNT MEASURING METHOD 有权
标题翻译：装置和方法，用于测量物理量
公开(公告)号：EP2157405B1
公开(公告)日：2013-07-31
申请号：EP08764634.5
申请日：2008-05-23
申请人： Asahi Kasei EMD Corporation
发明人： YAMASHITA, Masaya , KITAMURA, Toru
IPC分类号： G01C17/38 , G01P15/18 , G01P21/00 , G01C25/00
CPC分类号： G01C17/38 , G01C25/005 , G01P15/18 , G01P21/00
摘要： Even if a measurement data group is not a measurement data group that is obtained in a space where the magnitude of a vector physical quantity to be measured is uniform, an offset with high reliability is estimated. The reliability of the estimated offset is further improved. A vector physical quantity comprised of a plurality of components is repeatedly detected and vector physical quantity data group is obtained, and a difference vector group is calculated from the obtained vector physical quantity data group. A reference point included in the vector physical quantity data group is estimated based on a predetermined evaluation formula using the calculated difference vector group. Whether the calculated difference vector group is suitable for the estimation of the reference point is determined. Only a predetermined difference vector group is output for the estimation of the reference point based on the determination result. Moreover, the degree of reliability of the estimated reference point contains the difference vector group, and only a predetermined reference point is output as an offset based on the determination result.

8. 发明授权

EP2058944B1 TRANSCONDUCTANCE AMPLIFIER 有权
公开(公告)号：EP2058944B1
公开(公告)日：2012-06-27
申请号：EP07792993.3
申请日：2007-08-27
申请人： Asahi Kasei EMD Corporation
发明人： AIBA, Yusuke
IPC分类号： H03G1/00 , H03G1/04 , H03F3/45 , H03F1/32
CPC分类号： H03G1/0029 , H03F1/3211 , H03F3/45179 , H03F3/45183 , H03F3/45188 , H03F2203/45052 , H03F2203/45066 , H03F2203/45101 , H03F2203/45292 , H03F2203/45356 , H03F2203/45394 , H03F2203/45481 , H03F2203/45586 , H03G1/0023 , H03G1/04
摘要： Provided is a transconductance amplifier capable of suppressing a change caused by a large tuning voltage Vctrl in a range where the relationship between an input voltage and an output current is linear and adjusting the transconductance in a wider operation input range. The transconductance amplifier includes a differential pair formed by MOS transistors (111, 112) having a source grounded; MOS transistors (113, 114); amplifiers (106, 107); a voltage generating circuit (100); and a differential pair input voltage generating circuit (120). By adjusting the input differential common voltage Vcm of a full differential signal inputted to the differential pair in accordance with the change of the tuning voltage Vctrl controlling the transconductance so that a difference between Vcm and Vctr is constant, it is possible to maintain a constant range where the transconductance amplifier can obtain preferable linearity.
摘要翻译：提供一种跨导放大器，其能够在输入电压与输出电流之间的关系为线性的范围内抑制由大调谐电压Vctrl引起的变化，并且在较宽的操作输入范围内调节跨导。跨导放大器包括由源极接地的MOS晶体管（111,112）形成的差分对; MOS晶体管（113,114）; 放大器（106,107）; 一个电压发生电路（100）; 和差分对输入电压生成电路（120）。通过根据控制跨导的调谐电压Vctrl的变化来调整输入到差分对的全差分信号的输入差分公共电压Vcm，使得Vcm与Vctr之间的差值恒定，可以保持恒定的范围其中跨导放大器可以获得优选的线性度。

9. 发明公开

EP2020750A1 DRIVE DEVICE, DRIVE METHOD, AND INFORMATION DEVICE 有权
标题翻译： ANSTEUEREINRICHTUNG，ANSTEUERVER FAHREN UND INFORMATIONSINRICHTUNG
公开(公告)号：EP2020750A1
公开(公告)日：2009-02-04
申请号：EP07743375.3
申请日：2007-05-15
申请人： Asahi Kasei EMD Corporation
发明人： KAIHO, Toshio , MACHIDA, Junichi
IPC分类号： H03K17/687
CPC分类号： H03K17/6872 , H03F3/2171 , H03F3/2173 , H03F3/45475 , H03F2200/129 , H03F2200/135 , H03F2200/264 , H03F2200/297 , H03F2200/301 , H03F2200/351 , H03F2203/45136 , H03F2203/45526 , H03K7/08 , H03K2217/0036
摘要： A waveform of the output signal having high reproducibility to an input signal is outputted from capacitive load. Even the driving device is configured as a switching amplifier and drives capacitive load. Reactive power can be reduced to perform low power consumption. Output signals V1a and V1b that an output signal Vcap1 across output terminals 50 and 51 of load C1 fed back to input terminals 9a and 9b are compared with an input signal Vin so that error between output signals V1a and V1b is detected. A first error suppression signal Vout1 is produced so as to suppress the detected error between signals. The proportion of a first duration T1 that electric power is supplied to the load C1 to a second duration T2 that no electric power is supplied and load C1 is floated is altered according to the first error suppression signal.
摘要翻译：从电容性负载输出对输入信号具有高再现性的输出信号的波形。即使驱动装置配置为开关放大器并驱动容性负载。可以减少无功功率以实现低功耗。输出信号V1a和V1b将反馈到输入端子9a和9b的负载C1的输出端子50和51上的输出信号Vcap1与输入信号Vin进行比较，从而检测输出信号V1a和V1b之间的误差。产生第一误差抑制信号Vout1，以便抑制检测到的信号之间的误差。根据第一误差抑制信号改变向负载C1提供电力的第一持续时间T1与不提供电力并且负载C1浮起的第二持续时间T2的比例。

10. 发明授权

EP0921529B1 HYBRID ELECTROLYTE, METHOD FOR PRODUCING THE SAME, AND METHOD FOR PRODUCING ELECTROCHEMICAL DEVICE COMPRISING THE SAME 失效
标题翻译：混合电解质及其制造方法，电化学元件及其制造方法
公开(公告)号：EP0921529B1
公开(公告)日：2008-03-05
申请号：EP97926249.0
申请日：1997-06-13
申请人： Asahi Kasei EMD Corporation
发明人： HOSHI, Nobuto , KUROKI,Masakatsu, Asahi Kasei Fuji Dai 5 RyoNo.110 , MINAKATA, Takashi
IPC分类号： H01B1/12 , H01M10/40 , H01M6/18
CPC分类号： H01M10/052 , H01M2/1673 , H01M10/05 , H01M10/0565 , H01M2300/0085 , Y10T29/49108 , Y10T29/49112 , Y10T29/49115
摘要： A hybrid electrolyte which is prepared by impregnating a molded high polymer porous body composed of a high polymer base material containing a cross-linked high polymer segment and a plurality of bubbles dispersed in the base material with an electrolytic solution until the porous body swells, with the high polymer base material having 20-75 gel %, a method for manufacturing the electrolyte, and a method for manufacturing an electrochemical element using the electrolyte. The hybrid electrolyte has high ionic conductivity and excellent high-temperature stability and exhibits a high adhesive property when the electrolyte is stuck to an electrode. In addition, when the method for manufacturing hybrid electrolyte is used, the hybrid electrolyte having the above-mentioned excellent properties and an electrochemical element using the hybrid electrolyte can be manufactured surely and efficiently.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式