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51. 发明公开

EP2074662A1 TUNNEL FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：隧道场效应晶体管，
公开(公告)号：EP2074662A1
公开(公告)日：2009-07-01
申请号：EP07826637.6
申请日：2007-10-03
申请人： NXP B.V.
发明人： CURATOLA, Gilberto , AGARWAL, Prabhat , SLOTBOOM, Jan, W. , HURKX, Godefridus, A., M. , SURDEANU, Radu , DOORNBOS, Gerben
IPC分类号： H01L29/739 , H01L29/165 , H01L29/201
CPC分类号： H01L29/161 , H01L29/165 , H01L29/7391
摘要： A tunnel transistor includes source diffusion (4) of opposite conductivity type to a drain diffusion (6) so that a depletion layer is formed between source and drain diffusions in a lower doped region (8). An insulated gate (16) controls the position and thickness of the depletion layer. The device includes a quantum well formed in accumulation layer (20) which is made of a different material to the lower layer (2) and cap layer (22).

52. 发明公开

EP1364405A4 HIGH VOLTAGE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：高电压半导体器件
公开(公告)号：EP1364405A4
公开(公告)日：2008-12-24
申请号：EP02707617
申请日：2002-01-30
申请人： MA COM INC
发明人： HOAG DAVID RUSSELL , BOLES TIMOTHY EDWARD , CURCIO DANIEL G
IPC分类号： H01L21/331 , H01L23/58 , H01L21/8222 , H01L23/31 , H01L23/48 , H01L23/66 , H01L27/06 , H01L29/201 , H01L29/221 , H01L29/737 , H01L29/861 , H01L29/868 , H01L31/02 , H01L31/072 , H01L33/00 , H01P5/12 , H01S5/022
CPC分类号： H01L23/3192 , H01L23/3171 , H01L23/481 , H01L23/66 , H01L24/05 , H01L24/48 , H01L24/73 , H01L29/868 , H01L2224/04042 , H01L2224/05 , H01L2224/4847 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/0105 , H01L2924/01057 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10329 , H01L2924/12032 , H01L2924/12041 , H01L2924/12042 , H01L2924/12043 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/19041 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A compound semiconductor device is comprising a compound semiconductor substrate (219) having a ground plane (205); an active element (201) disposed on the substrate; a passive element (211) disposed on the substrate and electrically coupled to the active element; and an insulating layer (202) adjacent the substrate and interposed between the passive device and ground surface such that there is no resistive ground path from the passive device to the ground surface.

53. 发明公开

EP1226608A2 INPSB/INAS BJT DEVICE AND METHOD OF MAKING 审中-公开
标题翻译： InPSb / INAS BJT安排及其制备方法
公开(公告)号：EP1226608A2
公开(公告)日：2002-07-31
申请号：EP00961567.5
申请日：2000-09-05
申请人： HRL Laboratories, LLC
发明人： NGUYEN, Chanh , DOCTOR, Daniel, P.
IPC分类号： H01L29/737 , H01L21/331 , H01L29/201 , H01L29/205
CPC分类号： H01L29/66318 , H01L29/201 , H01L29/205 , H01L29/7371
摘要： Bipolar junction transistor (BJT) devices, particularly bipolar transistor (HBT) devices, and methods of making same are described. A combination of InPSb and p-type InAs is used to create extremely high speed bipolar devices which, due to reduced turn-on voltages, lend themselves to circuits having drastically reduced power dissipation. The described HBTs are fabricated on InAs or GaSb substrates, power dissipation. The described HBTs are fabricated on InAs when on an InAs substrate, and as InAsSb when on a GaSb substrate. The collector may be the same as the base to form a single heterojunction bipolar transistor (DHBT). Heterojunctions preferably include a grading layer, which may be implemented by continuously changing the bulkmaterial composition, or by forming a chirped superlattice of alternating materials. The grading layer preferably has delta doping planes near its ends to form an electrostatic gradient offsetting the quasi-electric field variation due to the changes in material composition, whereby effective conduction band offset may be substantially eliminated to facilitate speed, and valence band offset increased proportionally to enhance gain.

54. 发明授权

EP0669657B1 Heterojunction semiconductor device 失效
标题翻译： Heteroübergangshalbleiteranordnung
公开(公告)号：EP0669657B1
公开(公告)日：2001-08-16
申请号：EP95102696.2
申请日：1995-02-24
申请人： NEC CORPORATION
发明人： Gomyo, Akiko, c/o NEC Corp. , Suzuki, Tohru, c/o NEC Corp.
IPC分类号： H01L29/15 , H01L29/201 , H01S5/323 , H01L31/0304
CPC分类号： H01S5/3235 , B82Y10/00 , H01L29/158 , H01L29/201 , H01L33/16 , H01S5/3207 , H01S5/32325 , H01S5/32391 , H01S2302/00

55. 发明公开

EP0979529A4 DESIGN AND FABRICATION OF ELECTRONIC DEVICES WITH InA1AsSb/A1Sb BARRIER 失效
标题翻译： ENTWURF UND HERSTELLUNG VON ELEKTRONISCHEN ANORDNUNGEN MIT INA1ASSB / A1SB BARRIERE
公开(公告)号：EP0979529A4
公开(公告)日：2000-09-20
申请号：EP98913176
申请日：1998-03-26
申请人： US NAVY
发明人： BOOS JOHN BRADLEY , KRUPPA WALTER , PARK DAEWON , BENNETT BRIAN R
IPC分类号： H01L21/308 , H01L21/338 , H01L29/201 , H01L29/205 , H01L29/778 , H01L29/812 , H01L29/00 , H01L21/306
CPC分类号： H01L29/205 , H01L29/201 , H01L29/7783
摘要： An electronic device characterized by a GaAs substrate (8) and a base disposed on the substrate, the base comprising InAs channel layer (16), AlSb (18) layer above the channel layer, InxAll-xAslySbl-y layer (20) containing at least In, Al, and As disposed above the AlSb channel layer, InAs cap layer (22) disposed above and in contact with the InxAll-xAsySbl-y layer, AlSb layer (14) disposed below the InAs channel layer and in contact with the substrate, p GaSb layer (12) disposed within the AlSb layer, Schottky gate (28) with a pad disposed on and in contact with the InxAll-xAsySbl-y layer, at least one ohmic contact (24, 26) disposed on the InAs cap layer, and a trench (30) extending through the base to the substrate isolating the gate bonding pad from the device and providing a gate air bridge which prevents contact between the gate and the InAs layer. The gate air bridge fabrication is accomplished by a liquid etchant containing more than half, on volume basis, of concentrated lactic acid or acetic acid with remainder hydrogen peroxide and concentrated hydrofluoric acid. The etchant attacks InAs, InxAll-xAsySbl-y, AlSb, and GaSb but does not attack GaAs and Au-based alloys.
摘要翻译：一种电子器件，其特征在于GaAs衬底和设置在衬底上的基底，该基底包括InAs沟道层，在沟道层上方的AlSb层，InxAl1-xAsySb1-y层至少包含In，Al和As置于AlSb沟道上方层InAs覆盖层设置在设置在InAs沟道层下方并与衬底接触的In x Al 1-x As y Sb 1-y层的上方并与之接触，设置在AlSb层内的p + GaSb层，具有布置在和接触的焊盘的肖特基栅极具有In x Al 1-x As y Sb 1-y层，设置在InAs覆盖层上的至少一个欧姆接触，以及延伸穿过基底到衬底的沟槽，将栅极接合焊盘与器件隔离，并提供栅极空气桥，门和InAs层。门空气桥的制造是通过液体蚀刻剂完成的，液体腐蚀剂含有一半以上的体积基础上的浓缩乳酸或乙酸，剩余的是过氧化氢和浓缩的氢氟酸。蚀刻剂攻击InAs，InxAl1-xAsySb1-y，AlSb和GaSb，但不会侵蚀GaAs和Au基合金。

56. 发明公开

EP0779666A3 Semiconductor device and method of fabricating semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：EP0779666A3
公开(公告)日：2000-03-08
申请号：EP96113022.6
申请日：1996-08-13
申请人： MITSUBISHI DENKI KABUSHIKI KAISHA
发明人： Marx, Diethard, c/o Mitsubishi Denki K.K. , Kawazu, Zempei, c/o Mitsubishi Denki K.K. , Hayafuji, Norio, c/o Mitsubishi Denki K.K.
IPC分类号： H01L33/00 , H01L29/201
CPC分类号： H01L29/267 , H01L29/201 , H01L33/007
摘要： A semiconductor device comprises an Si substrate (1), a stress absorbing layer (2) comprising GaAs and disposed on the Si substrate (1), a compound buffer layer (3) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the stress absorbing layer (2), and a compound semiconductor layer (4) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the buffer layer (3). Therefore, the buffer layer (3) protects the GaAs stress absorbing layer (2) from high temperatures during the formation of the compound semiconductor layer (4), whereby the stress absorbing layer (2) is prevented from decomposition. As a result, a stress due to lattice mismatch or thermal stress between the Si substrate (1) and the compound semiconductor layer (4) is absorbed in the GaAs stress absorbing layer (2) having a lowest bulk modulus, whereby the compound semiconductor layer (4) with reduced dislocations is grown on the buffer layer (3) and bending of the Si substrate (1) is prevented.

57. 发明公开

EP0747965A1 Low-noise and power AlGaPSb/GaInAs HEMTs and pseudomorphic HEMTs on GaAs substrate 失效
标题翻译： Rauscharme AlGaPSb / GaInAs Leistungs-HEMT und pseudomorphische HEMT auf einem GaAs Substrat
公开(公告)号：EP0747965A1
公开(公告)日：1996-12-11
申请号：EP96108616.2
申请日：1996-05-30
申请人： HE HOLDINGS, INC. dba HUGHES ELECTRONICS
发明人： Matloubian, Mehran , Liu, Takyiu , Nguyen, Chanh
IPC分类号： H01L29/778 , H01L29/201
CPC分类号： H01L29/7783 , H01L29/201
摘要： An epitaxial structure (10) and method of manufacture for a field-effect transistor capable of low-noise and power applications. Preferably, the epitaxial structure (10) includes an N-type barrier layer (22) comprising a wide-gap semiconductor material having the formula Al 1-y Ga y P 0.71+z Sb 0.29-z .
摘要翻译：一种能够实现低噪声和功率应用的场效应晶体管的外延结构（10）和制造方法。优选地，外延结构（10）包括N型阻挡层（22），其包含具有式Al1-yGayP0.71 + zSb0.29-z的宽间隙半导体材料。

58. 发明公开

EP0747963A1 AlPSb/InP single heterojunction bipolar transistor on InP substrate for high-speed, high-power applications 失效
标题翻译： AIPSb / InP Einfach-Heteroübergang-Bipolartransistor auf InP SubstratfürHochgeschwindigkeit- und Hochleistungsanwendungen
公开(公告)号：EP0747963A1
公开(公告)日：1996-12-11
申请号：EP96108615.4
申请日：1996-05-30
申请人： HE HOLDINGS, INC. dba HUGHES ELECTRONICS
发明人： Liu, Takyiu , Nguyen, Chanh , Matloubian, Mehran
IPC分类号： H01L29/737 , H01L29/201
CPC分类号： H01L29/205 , H01L29/201 , H01L29/7371 , Y10S148/072
摘要： An epitaxial struture (10) and method of manufacture for a single heterojunction bipolar transistor capable of being utilized in high-speed and high-power applications. Preferably, the epitaxial structure comprises an N-type collector (18) made from InP, a P-type base (16) made from InP, and an N-type emitter (12) made from a semiconductor material of approximately 39 mole percent AlP and approximately AlSb mole percent Sb.
摘要翻译：用于单个异质结双极晶体管的外延结构（10）和制造方法，其可用于高速和大功率应用中。优选地，外延结构包括由InP制成的N型集电极（18），由InP制成的P型基极（16）和由约39摩尔％AlP的半导体材料制成的N型发射极（12）和约AlSb摩尔％Sb。

59. 发明公开

EP0299686A3 Hot electron transistor 失效
标题翻译：热电子晶体管
公开(公告)号：EP0299686A3
公开(公告)日：1990-01-24
申请号：EP88306236.6
申请日：1988-07-07
申请人： AT&T Corp.
发明人： Levi, Anthony Frederic John
IPC分类号： H01L29/76 , H01L29/73 , H01L29/201 , H01L29/205
CPC分类号： H01L29/7378 , H01L29/155 , H01L29/201 , H01L29/205 , H01L29/7371 , H01L29/7606
摘要： An improved compound semiconductor hot electron transistor (HET) having room temperature current gain β 10 is disclosed. Disclosed are also means by which improved HET performance can be obtained. Among these means is choice of the base layer (12) material such that the hot electrons injected into the base have k i,2 /k i,1 0.2, where k i,1 and k i,2 are the components of the electron wave vector respectively normal and parallel to the interface, between the emitter (ii) and the base. A further means is choice of collector (13) material such that the hot electron velocity component normal to the base/collector interface remains relatively unchanged upon passage of the hot electron through the base/collector interface. For instance, an appropriate superlattice in the collector region may be used to achieve such matching. Causing quantization of the ambient charge carrier states in the base can reduce hot electron scattering in the base. In bipolar HETs such scattering can also be reduced if the effective heavy hole mass in the base is much larger (e.g., x10) than the effective electron mass in the forward direction. A strained base layer may be used to achieve this.

60. 发明公开

EP0316139A3 Resonant tunelling barrier structure device 失效
标题翻译：谐振式障碍物结构装置
公开(公告)号：EP0316139A3
公开(公告)日：1990-01-10
申请号：EP88310498.6
申请日：1988-11-08
申请人： FUJITSU LIMITED
发明人： Muto, Shunichi , Inata, Tsugo , Takeuchi, Atsushi , Sugiyama, Yoshihiro
IPC分类号： H01L29/205 , H01L29/201 , H01L29/88
CPC分类号： B82Y10/00 , H01L29/205 , H01L29/882
摘要： A resonant tunnelling barrier (RTB) structure device (e.g., diode), having a large peak-to-valley current density (Jp/Jv) ratio, comprises an InP substrate (1) and a RTB structure. THe RTB structure consists of a first doped layer (5) of InP or In 0.53 Ga 0 .47 As, a first barrier layer (2) of Al x Ga 1-x As y Sb 1-y (0 ≦ x ≦ 1, y = 0.51 + 0.05x), a well layer (4) of InP or In z Ga 1-z As (0.52 ≦ z ≦ 0.54), a second barrier layer (3) of the AlGaAsSb, and as econd doped layer (6) of InP or In z Ga 1-z As. All of the layers are lattice-matched to InP.

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