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    • 31. 发明公开
    • TECHNIQUES FOR TRENCH ISOLATION USING FLOWABLE DIELECTRIC MATERIALS
    • 技术革兰氏染色麻醉药物FLIESSFÄHIGENDIELEKTRISCHEN MATERIALIEN
    • EP3087613A1
    • 2016-11-02
    • EP14875582.0
    • 2014-11-19
    • Intel Corporation
    • JHAVERI, RiteshLUCE, Jeanne L.PARK, Sang-WonHANKEN, Dennis G.
    • H01L29/78H01L21/336
    • H01L21/76224H01L21/02164H01L21/02219H01L21/02222H01L21/02274H01L21/02323H01L21/02326H01L21/02337H01L21/02343H01L21/02345H01L21/823431H01L27/0924H01L29/0649H01L29/66795H01L29/785
    • Techniques are disclosed for providing trench isolation of semiconductive fins using flowable dielectric materials. In accordance with some embodiments, a flowable dielectric can be deposited over a fin-patterned semiconductive substrate, for example, using a flowable chemical vapor deposition (FCVD) process. The flowable dielectric may be flowed into the trenches between neighboring fins, where it can be cured in situ, thereby forming a dielectric layer over the substrate, in accordance with some embodiments. Through curing, the flowable dielectric can be converted, for example, to an oxide, a nitride, and/or a carbide, as desired for a given target application or end-use. In some embodiments, the resultant dielectric layer may be substantially defect-free, exhibiting no or an otherwise reduced quantity of seams/voids. After curing, the resultant dielectric layer can undergo wet chemical, thermal, and/or plasma treatment, for instance, to modify at least one of its dielectric properties, density, and/or etch rate.
    • 公开了用于使用可流动介电材料提供半导体翅片的沟槽隔离的技术。 根据一些实施例,可流动电介质可以例如使用可流动化学气相沉积(FCVD)工艺沉积在鳍状图案化的半导体衬底上。 可流动电介质可以流入相邻散热片之间的沟槽,其中它可以原位固化,从而根据一些实施例在衬底上形成电介质层。 通过固化,根据需要,可流动电介质可以例如转化为氧化物,氮化物和/或碳化物,用于给定的靶应用或最终用途。 在一些实施例中,所得到的电介质层可以是基本上无缺陷的,没有或以其他方式减少接缝/空隙的量。 固化后,所得到的介电层可进行湿化学,热和/或等离子体处理,例如改变其介电特性,密度和/或蚀刻速率中的至少一个。
    • 36. 发明公开
    • SEMICONDUCTOR MEMORY AND METHOD FOR MANUFACTURING THE SAME
    • 半导体存储器及其制造方法
    • EP0920054A4
    • 2002-08-14
    • EP97929524
    • 1997-07-04
    • HITACHI LTD
    • MIKI HIROSHIKUSHIDA KEIKOFUJISAKI YOSHIHISA
    • H01L21/8242H01L21/02H01L21/314H01L21/316H01L27/108
    • H01L28/56H01L21/02197H01L21/02323H01L21/0234H01L28/75
    • A semiconductor memory which is improved in reliability by preventing the lowering of capacitance and defective insulation, especially, electrode separation caused by the formation of the passivation film (insulating film) of a capacitor using a high ferroelectric material by plasma processing at a relatively low temperature and a method for manufacturing the memory. The semiconductor memory has an integrated capacitor composed of a capacitor structure constituted of an upper electrode (105), a lower electrode (102), and a high ferroelectric oxide thin film (103) which is held between electrodes (105 and 102) and serves as a capacitor insulating film and an insulating protective film (106) which covers the capacitor structure and is formed by plasma processing. An oxygen introducing layer (104) is further formed on the surface of the thin film (103) constituting the capacitor insulating film. In the manufacturing process of the memory, for example, the oxygen introducing layer (104) is formed on the surface of the high ferroelectric material (103) by introducing oxygen to the boundary between the electrode (105) and the material (103) by conducting heat treatment in an oxygen atmosphere before the protective insulating film (SiO2 passivation film) (106) is formed by plasma processing after the formation of the electrode (105). Therefore, lowering of capacitance, defective insulation, and especially, electrode separation, which are caused by the formation of the passivation film (insulating film), can be prevented. In addition, the occurrence of defective insulation can be reduced by suppressing the lowering of the capacitance when an alternating electric field is impressed. When a ferroelectric material is used as the dielectric film, moreover, such an effect as an increase in residual polarization, a decrease in coercive voltage, etc., can be obtained.
    • 37. 发明公开
    • Method and system of post-deposition treating a carbon-containing layer on a substrate
    • 一种用于沉积的含碳层的衬底上后处理过程
    • EP1061156A2
    • 2000-12-20
    • EP00109917.5
    • 2000-05-10
    • Applied Materials, Inc.
    • Huang, Judy H.
    • C23C16/56C23C16/32H01L21/3105
    • H01L21/02126C23C16/325C23C16/56H01L21/02211H01L21/02274H01L21/02323H01L21/0234H01L21/3105H01L21/314H01L21/3146H01L21/31633
    • The present invention generally provides improved adhesion and oxidation resistance of carbon-containing layers without the need for an additional deposited layer. In one aspect, the invention treats an exposed surface of carbon-containing material, such as silicon carbide, with an inert gas plasma, such as a helium (He), argon (Ar), or other inert gas plasma, or an oxygen-containing plasma such as a nitrous oxide (N 2 O) plasma. Other carbon-containing materials can include organic polymeric materials, amorphous carbon, amorphous fluorocarbon, carbon containing oxides, and other carbon-containing materials. The plasma treatment is preferably performed in situ following the deposition of the layer to be treated. Preferably, the processing chamber in which in situ deposition and plasma treatment occurs is configured to deliver the same or similar precursors for the carbon-containing layer(s). However, the layer(s) can be deposited with different precursors. The invention also provides processing regimes that generate the treatment plasma and systems which use the treatment plasma. The carbon-containing material can be used in a variety of layers, such as barrier layers, etch stops, ARCs, passivation layers, and dielectric layers.
    • 本发明基因的反弹提供含碳层的改善的粘附性和耐氧化性,而不需要额外的沉积层上。 在一个方面,本发明治疗到含碳材料的暴露表面上:如碳化硅,与惰性气体等离子体,试验作为氦(He),氩(Ar),或其它惰性气体的等离子体,或无氧 含血浆检验作为一氧化二氮(N2O)的等离子体。 其它含碳材料可以包括有机聚合材料,无定形碳,无定形碳氟化合物,碳含氧化物和其它含碳材料。 等离子体处理优选进行原位继层的沉积来对待。 优选地,其中,所述处理腔室中原位沉积和发生等离子体处理是被配置为提供相同或类似的前体的含碳层(一个或多个)。 然而,该层(或多个)可以与不同的前体被沉积。 因此本发明提供了处理机制确实产生等离子体处理和系统,其使用等离子体处理。 如阻挡层,蚀刻停止,弧,钝化层和介电层:含碳材料可以以各种层,颜色的使用。
    • 38. 发明公开
    • SEMICONDUCTOR MEMORY AND METHOD FOR MANUFACTURING THE SAME
    • VERFAHREN ZUR HERSTELLUNG EINES HALBLEITERSPEICHERS
    • EP0920054A1
    • 1999-06-02
    • EP97929524.3
    • 1997-07-04
    • Hitachi, Ltd.
    • MIKI, HiroshiKUSHIDA, KeikoFUJISAKI, Yoshihisa
    • H01L21/8242H01L27/108
    • H01L28/56H01L21/02197H01L21/02323H01L21/0234H01L28/75
    • A semiconductor memory which is improved in reliability by preventing the lowering of capacitance and defective insulation, especially, electrode delamination caused by the formation of the passivation film (insulating film) of a capacitor using a high- dielectric- constant or ferroelectric material by plasma processing at a relatively low temperature and a method for manufacturing the memory. The semiconductor memory has an integrated capacitor composed of a capacitor structure constituted of an upper electrode, a lower electrode, and a capacitor insulating film (of a high- dielectric- constant or ferroelectric thin film) which is held between electrodes and serves as a capacitor insulating film and a protective insulating film which covers the capacitor structure and is formed by plasma treatment. An oxygen introducing layer is further formed on the surface of the thin film constituting the capacitor insulating film. In the manufacturing process of the memory, for example, the oxygen introducing layer is formed on the surface of the high- dielectric- constant or ferroelectric material by introducing oxygen to the boundary between the electrode and the material by conducting heat treatment in an oxygen atmosphere before the protective insulating film (SiO 2 passivation film) is formed by plasma treatment after the formation of the electrode. Therefore, lowering of capacitance, defective insulation, and especially, electrode delamination, which are caused by the formation of the passivation film (insulating film), can be prevented. In addition, the occurrence of defective insulation can be reduced by suppressing the lowering of the capacitance when an alternating electric field is impressed. When a ferroelectric material is used as the dielectric film, moreover, such an effect as an increase in residual polarization, a decrease in coercive voltage, etc., can be obtained.
    • 一种半导体存储器,其通过防止电容降低和绝缘不良,特别是通过使用高介电常数或铁电材料的等离子体处理形成电容器的钝化膜(绝缘膜)引起的电极分层而提高了可靠性 在相对低的温度下和用于制造存储器的方法。 半导体存储器具有由电容器结构构成的集成电容器,该电容器结构由上电极,下电极和电容器绝缘膜(高介电常数或铁电薄膜)构成,电容器绝缘膜保持在电极之间并用作电容器 绝缘膜和覆盖电容器结构并通过等离子体处理形成的保护绝缘膜。 在构成电容器绝缘膜的薄膜的表面上还形成氧气引入层。 在记忆体的制造过程中,例如,通过在氧气氛中进行热处理,将氧引入电极与材料之间的边界,在高介电常数或铁电体材料的表面上形成氧气导入层 之前,在形成电极之后通过等离子体处理形成保护绝缘膜(SiO 2钝化膜)。 因此,可以防止由形成钝化膜(绝缘膜)引起的电容降低,绝缘性差,特别是电极分层。 此外,当施加交变电场时,通过抑制电容的降低可以减少缺陷绝缘的发生。 此外,当使用铁电材料作为电介质膜时,可以获得如残余极化增加,矫顽电压降低等的效果。
    • 39. 发明公开
    • Process for the formation of isolation regions in silicon
    • 在硅中形成隔离区的过程
    • EP0025129A3
    • 1981-07-22
    • EP80104760
    • 1980-08-12
    • International Business Machines Corporation
    • Lever, Reginald FrankMauer, John LesterMichel, Alwin EarlRothman, Laura Beth
    • H01L21/76H01L21/312H01L21/316
    • H01L21/02126H01L21/02164H01L21/02282H01L21/02323H01L21/02351H01L21/3121H01L21/316H01L21/76229Y10S148/131
    • Bei dem Verfahren zur Herstellung von Isolationsberei chen in Silicium werden tiefe, breite Gräben in die planare Oberfläche eines Siliciumsubstrats geätzt; eine dünne SiO₂- Schicht auf der planaren Oberfläche des Substrats und auf den Oberflächen der Gräben gebildet; eine Glasharzschicht auf die planare Oberfläche des Substrats aufgetragen und die Gräben mit Glasharz ausgefüllt und ein Teil des Glasharzes von der planaren Oberfläche des Substrats mittels Schleu dern entfernt. Nach dem Härten des Substrats erfolgt eine Bestrahlung des Glasharzes in den Gräben mit Elektronen strahlen, eine Entwicklung mit Lösungsmittel und Erhitzen des Substrats in Sauerstoffatmosphäre zur Umwandlung des Glasharzes in den Gräben in Siliciumdioxid. Um eine planare Oberfläche zu erhalten, wird eine Siliciumdioxidschicht auf die Oberfläche des Substrats aufgetragen und diese anschließend bis zum Siliciumsubstrat wieder abgetragen.
      Das Verfahren wird in integrierten Schaltungen verwen det, um Schaltungselemente voneinander zu isolieren.
    • 一种用于在硅半导体衬底的平面表面中提供深宽二氧化硅填充沟槽的平面深氧化物隔离工艺,所述方法包括以下步骤:(a)在硅衬底的平面表面中形成深宽沟槽; (b)在硅衬底的平面表面和所述深宽沟槽的暴露的硅表面上形成二氧化硅薄层; (c)将树脂玻璃(聚硅氧烷)施加到所述深宽沟槽的所述半导体衬底的平面上; (d)在基板的平面上脱出树脂玻璃的至少一部分; (e)在低温下烘烤基材; (f)将包含在基底的深宽沟槽内的树脂玻璃暴露于电子束的能量; (g)在溶剂中显影所述基板上所含的树脂玻璃; (h)在氧气中加热所述衬底以将包含在所述深宽沟槽内的所述树脂玻璃转化为二氧化硅; (i)沉积二氧化硅层以在所述衬底的暴露表面上提供平面二氧化硅表面; 和(j)将暴露的二氧化硅表面平坦化到衬底的硅。 一种用于在前面段落中提供的硅半导体衬底的平坦表面中提供深宽二氧化硅填充沟槽的平面深氧化物隔离工艺,其中执行以下步骤代替权利要求1的步骤i,所述步骤包括:( i-1)应用树脂玻璃的第二薄层; 和(i-2)将所述树脂玻璃转化为二氧化硅。