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1. 发明公开

EP3387669A1 METHOD OF FORMING A POLYSILICON SIDEWALL OXIDE SPACER IN A MEMORY CELL 审中-公开
公开(公告)号：EP3387669A1
公开(公告)日：2018-10-17
申请号：EP16820470.9
申请日：2016-12-12
申请人： Microchip Technology Incorporated
发明人： WONG, Jack , KABEER, Sajid , HYMAS, Mel , MURALI, Santosh , KOPP, Brad
IPC分类号： H01L21/28 , H01L21/02 , H01L21/321
CPC分类号： H01L29/66825 , H01L21/02164 , H01L21/0217 , H01L21/02318 , H01L21/02323 , H01L21/02337 , H01L21/28273 , H01L29/42324 , H01L29/42328 , H01L29/7881
摘要： Methods of fabricating a memory cell of a semiconductor device, e.g., an EEPROM cell, having a sidewall oxide are disclosed. A memory cell structure may be formed including a floating gate and an ONO film over the conductive layer. A sidewall oxide may be formed on a side surface of the floating gate by a process including depositing a thin high temperature oxide (HTO) film on the side surface of the conductive layer, and performing a rapid thermal oxidation (RTO) anneal. The thin HTO film may be deposited before or after performing the RTO anneal. The sidewall oxide formation process may provide an improved memory cell as compared with known prior art techniques, e.g., in terms of endurance and data retention.

2. 发明授权

EP1321974B1 POROUS SILICEOUS FILM HAVING LOW PERMITTIVITY, SEMICONDUCTOR DEVICES AND COATING COMPOSITION 有权
标题翻译：多孔低介电常数硅，半导体器件和涂料组合物
公开(公告)号：EP1321974B1
公开(公告)日：2014-10-08
申请号：EP01958571.0
申请日：2001-08-28
申请人： AZ Electronic Materials USA Corp.
发明人： AOKI, Tomoko, C/O Clariant (Japan) K.K. , SHIMIZU, Yasuo, c/o Clariant (Japan) K.K
IPC分类号： H01L21/02 , C09D183/16 , H01L21/316
CPC分类号： H01L21/02126 , C09D183/16 , H01L21/02203 , H01L21/02222 , H01L21/02282 , H01L21/02323 , H01L21/02337 , H01L21/31695 , Y02P20/125

3. 发明公开

EP2036120A2 A NOVEL DEPOSITION-PLASMA CURE CYCLE PROCESS TO ENHANCE FILM QUALITY OF SILICON DIOXIDE 审中-公开
标题翻译：新颖沉积等离子AUSHÄRTZYKLUSPROZESS以提高二氧化硅膜的质量
公开(公告)号：EP2036120A2
公开(公告)日：2009-03-18
申请号：EP07784191.4
申请日：2007-05-29
申请人： APPLIED MATERIALS, INC.
发明人： CHEN, Xiaolin , NEMANI, Srinivas, D. , VENKATARAMAN, Shankar
IPC分类号： H01L21/302
CPC分类号： C23C16/56 , C23C16/045 , C23C16/402 , H01L21/02126 , H01L21/02164 , H01L21/02211 , H01L21/02271 , H01L21/02277 , H01L21/02323 , H01L21/0234 , H01L21/02359 , H01L21/31612 , H01L21/76224 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： Methods of filling a gap on a substrate with silicon oxide are described. The methods may include the steps of introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber, reacting the precursors to form a first silicon oxide layer in the gap on the substrate, and etching the first silicon oxide layer to reduce the carbon content in the layer. The methods may also include forming a second silicon oxide layer on the first layer, and etching the second layer to reduce the carbon content in the second layer. The silicon oxide layers are annealed after the gap is filled.

4. 发明公开

EP1265279A1 FLASH MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR FORMING DIELECTRIC FILM 有权
标题翻译：用于生产的闪速存储器模块
公开(公告)号：EP1265279A1
公开(公告)日：2002-12-11
申请号：EP01912317.3
申请日：2001-03-13
申请人： Ohmi, Tadahiro
发明人： OHMI, Tadahiro , SUGAWA, Shigetoshi, Dept of Electronic Engineering
IPC分类号： H01L21/8247 , H01L29/788 , H01L29/792 , H01L27/115 , H01L21/316 , H01L21/318
CPC分类号： H01L21/31641 , C23C8/02 , C23C8/36 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02323 , H01L21/02329 , H01L21/0234 , H01L21/3105 , H01L21/3144 , H01L21/31612 , H01L21/31637 , H01L21/31662 , H01L21/3185 , H01L27/105 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11546 , H01L29/42324
摘要： A fabrication process of a flash memory device includes microwave excitation of high-density plasma in a mixed gas of Kr and an oxidizing gas or a nitriding gas. The resultant atomic state oxygen O* or hydrogen nitride radicals NH* are used for nitridation or oxidation of a polysilicon electrode surface. It is also disclosed the method of forming an oxide film and a nitride film on a polysilicon film according to such a plasma processing.

5. 发明公开

EP3198630A1 TECHNIQUE FOR OXIDIZING PLASMA POST-TREATMENT FOR REDUCING PHOTOLITHOGRAPHY POISONING AND ASSOCIATED STRUCTURES 审中-公开
标题翻译：氧化等离子体后处理降低光刻中毒及相关结构的技术
公开(公告)号：EP3198630A1
公开(公告)日：2017-08-02
申请号：EP14902471.3
申请日：2014-09-26
申请人： Intel Corporation
发明人： BROOKS, John D. , KOSARAJU, Sreenivas , PLEKHANOV, Pavel S. , IQBAL, Asad
IPC分类号： H01L21/3065 , H01L21/027
CPC分类号： H01L21/0234 , H01L21/02323 , H01L21/02326 , H01L21/02329 , H01L21/31144 , H01L21/31155 , H01L21/76826 , H01L21/76834
摘要： Embodiments of the present disclosure describe techniques for oxidizing plasma post-treatment for reducing photolithography poisoning. In one embodiment, an apparatus includes a dielectric layer with a plurality of routing features; and an etch stop layer, having a first interface region coupled with the dielectric layer and a second interface region disposed opposite to the first interface region. The first interface region has a peak silicon oxide (SiO2) concentration level evenly distributed across the first interface region, and the second interface region has substantially zero silicon oxide (SiO2) concentration level. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了用于氧化等离子体后处理以减少光刻中毒的技术。在一个实施例中，一种装置包括具有多个路由特征的电介质层; 以及蚀刻停止层，具有与介电层耦合的第一界面区域和与第一界面区域相对设置的第二界面区域。第一界面区域具有横跨第一界面区域均匀分布的峰值氧化硅（SiO 2）浓度水平，并且第二界面区域具有基本为零的氧化硅（SiO 2）浓度水平。其他实施例可以被描述和/或要求保护。

6. 发明公开

EP2036120A4 A NOVEL DEPOSITION-PLASMA CURE CYCLE PROCESS TO ENHANCE FILM QUALITY OF SILICON DIOXIDE 审中-公开
标题翻译：新颖沉积等离子AUSHÄRTZYKLUSPROZESS以提高二氧化硅膜的质量
公开(公告)号：EP2036120A4
公开(公告)日：2012-02-08
申请号：EP07784191
申请日：2007-05-29
申请人： APPLIED MATERIALS INC
发明人： CHEN XIAOLIN , NEMANI SRINIVAS D , VENKATARAMAN SHANKAR
IPC分类号： H01L21/302 , C23C16/04 , C23C16/40 , C23C16/56 , H01L21/02 , H01L21/316 , H01L21/66 , H01L21/762
CPC分类号： C23C16/56 , C23C16/045 , C23C16/402 , H01L21/02126 , H01L21/02164 , H01L21/02211 , H01L21/02271 , H01L21/02277 , H01L21/02323 , H01L21/0234 , H01L21/02359 , H01L21/31612 , H01L21/76224 , H01L22/12 , H01L2924/0002 , H01L2924/00

7. 发明授权

EP1265279B1 METHOD OF FABRICATING A FLASH MEMORY DEVICE 有权
标题翻译：用于生产的闪速存储器模块
公开(公告)号：EP1265279B1
公开(公告)日：2009-10-14
申请号：EP01912317.3
申请日：2001-03-13
申请人： Ohmi, Tadahiro
发明人： OHMI, Tadahiro , SUGAWA, Shigetoshi, Dept of Electronic Engineering
IPC分类号： H01L21/8247 , H01L29/788 , H01L29/792 , H01L27/115 , H01L21/316 , H01L21/318
CPC分类号： H01L21/31641 , C23C8/02 , C23C8/36 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02323 , H01L21/02329 , H01L21/0234 , H01L21/3105 , H01L21/3144 , H01L21/31612 , H01L21/31637 , H01L21/31662 , H01L21/3185 , H01L27/105 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11546 , H01L29/42324
摘要： A method of forming an insulation film includes the steps of forming an insulation film on a substrate, and modifying a film quality of the insulation film by exposing the insulation film to atomic state oxygen O* or atomic state hydrogen nitride radicals NH* formed with plasma that uses Kr or Ar as inert gas.

8. 发明公开

EP1912253A2 Method of forming a dielectric film 审中-公开
标题翻译： Verfahren zur Herstellung einer dielektrischen Folie
公开(公告)号：EP1912253A2
公开(公告)日：2008-04-16
申请号：EP08001543.1
申请日：2001-03-13
申请人： Ohmi, Tadahiro
发明人： Ohmi, Tadahiro , Sugawa, Shigetoshi
IPC分类号： H01L21/316 , H01L21/318 , H01L21/3105
CPC分类号： H01L21/31641 , C23C8/02 , C23C8/36 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02323 , H01L21/02329 , H01L21/0234 , H01L21/3105 , H01L21/3144 , H01L21/31612 , H01L21/31637 , H01L21/31662 , H01L21/3185 , H01L27/105 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11546 , H01L29/42324
摘要： A method of forming an insulation film includes the steps of forming an insulation film on a substrate, and modifying a film quality of the insulation film by exposing the insulation film to atomic state oxygen O* or atomic state hydrogen nitride radicals NH* formed with plasma that uses Kr or Ar as inert gas.
摘要翻译：形成绝缘膜的方法包括以下步骤：在基板上形成绝缘膜，并且通过将绝缘膜暴露于由等离子体形成的原子态氧O *或原子状态的氮化氢自由基NH *来改变绝缘膜的膜质量使用Kr或Ar作为惰性气体。

9. 发明授权

EP0920054B1 METHOD FOR MANUFACTURING A SEMICONDUCTOR MEMORY 失效
标题翻译：一种用于生产半导体存储器
公开(公告)号：EP0920054B1
公开(公告)日：2006-11-02
申请号：EP97929524.3
申请日：1997-07-04
申请人： Hitachi, Ltd.
发明人： MIKI, Hiroshi , KUSHIDA, Keiko , FUJISAKI, Yoshihisa
IPC分类号： H01L21/8242 , H01L27/108 , H01L21/02
CPC分类号： H01L28/56 , H01L21/02197 , H01L21/02323 , H01L21/0234 , H01L28/75
摘要： A semiconductor memory which is improved in reliability by preventing the lowering of capacitance and defective insulation, especially, electrode separation caused by the formation of the passivation film (insulating film) of a capacitor using a high ferroelectric material by plasma processing at a relatively low temperature and a method for manufacturing the memory. The semiconductor memory has an integrated capacitor composed of a capacitor structure constituted of an upper electrode (105), a lower electrode (102), and a high ferroelectric oxide thin film (103) which is held between electrodes (105 and 102) and serves as a capacitor insulating film and an insulating protective film (106) which covers the capacitor structure and is formed by plasma processing. An oxygen introducing layer (104) is further formed on the surface of the thin film (103) constituting the capacitor insulating film. In the manufacturing process of the memory, for example, the oxygen introducing layer (104) is formed on the surface of the high ferroelectric material (103) by introducing oxygen to the boundary between the electrode (105) and the material (103) by conducting heat treatment in an oxygen atmosphere before the protective insulating film (SiO2 passivation film) (106) is formed by plasma processing after the formation of the electrode (105). Therefore, lowering of capacitance, defective insulation, and especially, electrode separation, which are caused by the formation of the passivation film (insulating film), can be prevented. In addition, the occurrence of defective insulation can be reduced by suppressing the lowering of the capacitance when an alternating electric field is impressed. When a ferroelectric material is used as the dielectric film, moreover, such an effect as an increase in residual polarization, a decrease in coercive voltage, etc., can be obtained.

10. 发明公开

EP1320877A2 SILICON OXIDE PATTERNING USING CVD PHOTORESIST 审中-公开
标题翻译：使用CVD光刻机进行氧化硅图案化
公开(公告)号：EP1320877A2
公开(公告)日：2003-06-25
申请号：EP01964510.0
申请日：2001-08-30
申请人： Infineon Technologies North America Corp.
发明人： LEE, Gill
IPC分类号： H01L21/312
CPC分类号： H01L21/02126 , H01L21/02167 , H01L21/02211 , H01L21/02274 , H01L21/02304 , H01L21/02323 , H01L21/02337 , H01L21/02348 , H01L21/02362 , H01L21/3122
摘要： An integrated circuit, and method of forming thereof, in which a CVD photoresist (e.g., PPMS) is formed on a substrate (e.g., silicon 200), patterned and converted into silicon oxide, and is left on the substrate to function as a silicon oxide layer (e.g., PPMSO 204). A high quality cap layer (e.g., PECVD silicon oxide 206) may then be formed over the lower quality silicon oxide layer utilizing a maskless etch process. A high quality silicon oxide layer may be formed on the substrate prior to formation of the CVD photoresist layer to provide a buffer underneath the lower quality silicon oxide. Because etch selectivity is generally not required for the photoresist layer, a thinner photoresist may be used than that of prior art techniques, permitting a larger lithographic process window, increased depth of focus, and a more robust process.
摘要翻译：一种集成电路及其形成方法，其中在衬底（例如，硅200）上形成CVD光致抗蚀剂（例如PPMS），将其图案化并转化为氧化硅，并留在衬底上以充当硅氧化物层（例如，PPMSO 204）。然后可以利用无掩模蚀刻工艺在较低质量的氧化硅层上形成高质量盖层（例如，PECVD氧化硅206）。可以在形成CVD光致抗蚀剂层之前在衬底上形成高质量的氧化硅层，以在较低质量的氧化硅下提供缓冲剂。因为光致抗蚀剂层通常不需要蚀刻选择性，所以可以使用比现有技术更薄的光致抗蚀剂，允许更大的光刻工艺窗口，增加的焦深以及更稳健的工艺。

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