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1. 发明授权

US4759030A Semiconductor laser 失效
标题翻译：半导体激光器
公开(公告)号：US4759030A
公开(公告)日：1988-07-19
申请号：US870948
申请日：1986-06-05
申请人： Yoshimasa Murayama , Yasutsugu Takeda , Michiharu Nakamura , Yasuhiro Shiraki , Yoshifumi Katayama , Naoki Chinone
发明人： Yoshimasa Murayama , Yasutsugu Takeda , Michiharu Nakamura , Yasuhiro Shiraki , Yoshifumi Katayama , Naoki Chinone
IPC分类号： H01S5/00 , H01S5/042 , H01S5/06 , H01S5/34 , H01S3/19
CPC分类号： B82Y20/00 , H01S5/34 , H01S5/0425
摘要： A semiconductor laser having high efficiency of luminescence can be obtained by forming a spatial fluctuation of potential so that the potential differs from position to position inside a plane perpendicular to a current flowing direction and electrons and holes or excitons formed by a combination of them can be localized not only in the current flowing direction but also inside the plane perpendicular to the current flowing direction. More definitely, corrugations or ruggedness having a mean pitch of below 100 nm and a level difference of from 1/10 to 1/2 of the mean thickness of an active layer are formed on the surface of the active layer of the semiconductor laser.
摘要翻译：具有高发光效率的半导体激光器可以通过形成电位的空间波动使得电位在与电流流动方向垂直的平面内的位置不同，并且由它们的组合形成的电子和空穴或激子可以是不仅在当前的流动方向上而且在垂直于电流流动方向的平面内。更确定地，在半导体激光器的有源层的表面上形成具有低于100nm的平均间距的波纹或粗糙度以及有源层的平均厚度的1/10至1/2的水平差。

2. 发明授权

US4673959A Heterojunction FET with doubly-doped channel 失效
标题翻译：具有双掺杂沟道的异质结FET
公开(公告)号：US4673959A
公开(公告)日：1987-06-16
申请号：US686661
申请日：1984-12-27
申请人： Yasuhiro Shiraki , Yoshifumi Katayama , Yoshimasa Murayama , Makoto Morioka , Yasushi Sawada , Tomoyoshi Mishima , Takao Kuroda , Eiichi Maruyama
发明人： Yasuhiro Shiraki , Yoshifumi Katayama , Yoshimasa Murayama , Makoto Morioka , Yasushi Sawada , Tomoyoshi Mishima , Takao Kuroda , Eiichi Maruyama
IPC分类号： H01L29/812 , H01L21/338 , H01L29/205 , H01L29/423 , H01L29/778 , H01L29/80
CPC分类号： H01L29/42316 , H01L29/7781 , H01L29/7786
摘要： There is disclosed a semiconductor device comprising at least first and second semiconductor layers positioned to form a hetero-junction therebetween, such a hetero-junction being adapted to form a channel, means for controlling carriers, and source and drain areas on opposite edges of the channel, wherein the first and second semiconductor layers formed between the source and drain regions have an area containing only 10.sup.16 cm.sup.-3 or less of an impurity; the first semiconductor layer has a wider forbidden band than that of the second semiconductor layer; and further including at least one semiconductor layer having a higher activation efficiency of impurities than that of the first semiconductor layer, with such at least one semiconductor layer being located on the side of the first semiconductor layer not in contact with the second semiconductor layer. A multi-quantum well structure may be used as the higher impurity activation efficiency semiconductor layer. The electrical resistance in the semiconductor area constituting the source and drain regions can be lowered by utilizing such a higher impurity activation efficiency semiconductor layer.
摘要翻译：公开了一种半导体器件，其至少包括第一和第二半导体层，该第一和第二半导体层被定位以在它们之间形成异质结，这样的异质结适于形成沟道，用于控制载流子的装置，以及在其的相对边缘上的源极和漏极区域沟道，其中形成在源区和漏区之间的第一和第二半导体层具有仅含有1016cm-3或更小的杂质的面积; 第一半导体层具有比第二半导体层更宽的禁带; 并且还包括至少一个具有比第一半导体层高的杂质活化效率的半导体层，这样的至少一个半导体层位于不与第二半导体层接触的第一半导体层的一侧。可以使用多量子阱结构作为较高的杂质活化效率半导体层。通过利用这种较高的杂质活化效率的半导体层，可以降低构成源区和漏区的半导体区的电阻。

3. 发明授权

US4605945A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US4605945A
公开(公告)日：1986-08-12
申请号：US609446
申请日：1984-05-11
申请人： Yoshifumi Katayama , Yasuhiro Shiraki , Ken Yamaguchi , Yoshimasa Murayama , Yasushi Sawada , Toshiyuki Usagawa , Eiichi Maruyama
发明人： Yoshifumi Katayama , Yasuhiro Shiraki , Ken Yamaguchi , Yoshimasa Murayama , Yasushi Sawada , Toshiyuki Usagawa , Eiichi Maruyama
IPC分类号： H01L29/812 , H01L21/338 , H01L27/06 , H01L29/10 , H01L29/778 , H01L29/80
CPC分类号： H01L27/0605 , H01L29/1075 , H01L29/7786 , H01L29/7787
摘要： In a semiconductor device having at least a first semiconductor layer and a second semiconductor layer which are arranged so as to form a heterojunction, an edge of a conduction band of the first semiconductor layer being positioned lower in energy than an edge of a conduction band of the second semiconductor layer in the vicinity of the heterojunction, at least one pair of electrodes which are electronically connected with the first semiconductor layer, and means to control carriers induced in the vicinity of the heterojunction; a semiconductor device characterized in that a low impurity concentration region is comprised in at least the part of the first semiconductor layer between the pair of electrodes, that a region adjoining each of the pair of electrodes is a high impurity concentration region, and that at least one layer containing an impurity which has a conductivity type identical or opposite to that of an impurity contained in the aforementioned regions is comprised in the first semiconductor layer.
摘要翻译：在具有布置成形成异质结的至少第一半导体层和第二半导体层的半导体器件中，第一半导体层的导带的边缘的能量位于能量低于导带的边缘的能量异质结附近的第二半导体层，与第一半导体层电连接的至少一对电极，以及控制在异质结附近诱发的载流子的装置; 一种半导体器件，其特征在于，在所述一对电极之间的所述第一半导体层的至少一部分中包含低杂质浓度区域，与所述一对电极中的每一对相邻的区域是高杂质浓度区域，并且至少在第一半导体层中包含含有与上述区域中所含的杂质相同或相反的导电型的杂质的一层。

4. 发明授权

US4559547A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US4559547A
公开(公告)日：1985-12-17
申请号：US444233
申请日：1982-11-24
申请人： Yasuhiro Shiraki , Yoshimasa Murayama , Yoshifumi Katayama , Eiichi Maruyama
发明人： Yasuhiro Shiraki , Yoshimasa Murayama , Yoshifumi Katayama , Eiichi Maruyama
IPC分类号： H01L21/265 , H01L21/338 , H01L27/06 , H01L29/778 , H01L29/80 , H01L29/812 , H01L29/78
CPC分类号： H01L29/80 , H01L27/0605 , H01L29/7783 , H01L29/7786 , H01L29/7787
摘要： The semiconductor device of the present invention is characterized by a device consisting of at least a heterojunction formed by the first semiconductor layer and the second semiconductor layer where the forbidden band gap of the said first semiconductor is smaller than that of the said second semiconductor, at least one pair of electrode regions connected electronically to the said first semiconductor and a means to control the carrier density in the said first semiconductor layer where the impurities are not included effectively in the region in the first semiconductor under the means to control the carriers and are included in the region adjacent to the said one pair of electrodes. The density of the impurities in these region are preferably be larger than 10.sup.16 cm.sup.-3.
摘要翻译：本发明的半导体器件的特征在于，由至少由第一半导体层和第二半导体层形成的异质结构成的器件，其中所述第一半导体的禁带宽小于所述第二半导体的禁带宽，电子地连接到所述第一半导体的至少一对电极区域和控制所述第一半导体层中的载流子密度的装置，其中杂质不被有效地包含在控制载流子的装置下的第一半导体区域中，并且分别是包括在与所述一对电极相邻的区域中。这些区域中杂质的密度优选大于1016cm-3。

5. 发明授权

US4433202A Thin film solar cell 失效
标题翻译：薄膜太阳能电池
公开(公告)号：US4433202A
公开(公告)日：1984-02-21
申请号：US362115
申请日：1982-03-26
申请人： Eiichi Maruyama , Toshikazu Shimada , Yasuhiro Shiraki , Yoshifumi Katayama , Hirokazu Matsubara , Akitoshi Ishizaka , Yoshimasa Murayama , Akira Shintani
发明人： Eiichi Maruyama , Toshikazu Shimada , Yasuhiro Shiraki , Yoshifumi Katayama , Hirokazu Matsubara , Akitoshi Ishizaka , Yoshimasa Murayama , Akira Shintani
IPC分类号： H01L31/04 , H01L31/0368 , H01L31/0392 , H01L31/06
CPC分类号： H01L31/03682 , H01L31/03921 , Y02E10/546
摘要： A thin film solar cell formed on a substrate, comprising at least first and second electrodes, at least one of which is capable of passing light, a silicon film interposed between said first and second electrodes, and at least one junction formed in the silicon film for separating electrons and positive holes when the cell is exposed to light, wherein said silicon film comprises a mixed phase consisting of a polycrystalline phase and an amorphous phase, and includes at least about 50% by volume of fibrous crystalline grains, each of said grains having a maximum bottom diameter of about 1 .mu.m and a minimum height of about 50 nm and having its grain boundaries terminated with a monovalent element.The solar cell has a high photoelectric conversion efficiency comparable to that of a single-crystal solar cell, and can be produced at a low cost.
摘要翻译：一种在基板上形成的薄膜太阳能电池，其至少包括第一和第二电极，其中至少一个能够通过光，插入在所述第一和第二电极之间的硅膜，以及形成在硅膜中的至少一个结用于在电池暴露于光时分离电子和正空穴，其中所述硅膜包括由多晶相和非晶相组成的混合相，并且包括至少约50体积％的纤维状晶粒，每个所述晶粒具有约1μm的最大底部直径和约50nm的最小高度，并且其晶界用一价元素封端。太阳能电池具有与单晶太阳能电池相当的高的光电转换效率，并且可以以低成本生产。

6. 发明授权

US4796068A Semiconductor device having ultrahigh-mobility 失效
标题翻译：具有超高移动性的半导体器件
公开(公告)号：US4796068A
公开(公告)日：1989-01-03
申请号：US40123
申请日：1987-04-20
申请人： Yoshifumi Katayama , Yasuhiro Shiraki , Yoshimasa Murayama
发明人： Yoshifumi Katayama , Yasuhiro Shiraki , Yoshimasa Murayama
IPC分类号： H01L29/812 , H01L21/338 , H01L29/15 , H01L29/775 , H01L29/778 , H01L29/78 , H01L29/80 , H01L29/161
CPC分类号： B82Y10/00 , H01L29/158 , H01L29/775
摘要： A semiconductor device which utilizes the fact that the effective mass of charged particles becomes exceedingly large at certain points in the direction of a periodically repeating potential by virtue of a periodic structure in which semiconductor layers are stacked in the form of a superlattice. The periodic structure enables the movement of charged particles to be one-dimensional and thus permits a great improvement in the mobility of charged particles in the channel direction. Accordingly, it is possible to realize a FET of ultrahigh mobility.
摘要翻译：利用这样一个事实，即半导体层以超晶格形式堆叠的周期性结构，利用这样的事实，带电粒子的有效质量在周期性重复电位的方向上的某些点处变得非常大。周期性结构使得带电粒子的运动成为一维的，从而允许带电粒子在通道方向上的迁移率大大提高。因此，可以实现超高移动性的FET。

7. 发明授权

US4785340A Semiconductor device having doping multilayer structure 失效
标题翻译：具有掺杂多层结构的半导体器件
公开(公告)号：US4785340A
公开(公告)日：1988-11-15
申请号：US839349
申请日：1986-03-13
申请人： Kiyokazu Nakagawa , Akitoshi Ishizaka , Yasuhiro Shiraki , Yoshimasa Murayama
发明人： Kiyokazu Nakagawa , Akitoshi Ishizaka , Yasuhiro Shiraki , Yoshimasa Murayama
IPC分类号： H01L21/203 , H01L21/28 , H01L21/331 , H01L21/335 , H01L29/10 , H01L29/15 , H01L29/732 , H01L29/72 , H01L27/12 , H01L29/161
CPC分类号： B82Y10/00 , H01L21/02381 , H01L21/0245 , H01L21/02507 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02631 , H01L21/28 , H01L29/1004 , H01L29/15 , H01L29/66287 , H01L29/66424 , H01L29/732
摘要： A semiconductor device includes a multilayer semiconductor structure comprising alternately p- (or n-) type heavily doped semiconductor layers and n- (or p-) type lightly doped semiconductor layers. Holes (or electrons) are confined within a narrow layer in a fashion like a two-dimensional gas, whereby high mobility is realized notwithstanding of high carrier concentration. Electrical conductivity of the multilayer semiconductor structure can be made higher than that of a bulk semiconductor. Very high conductivity can be realized by forming each layer in a thickness within a range of 10 .ANG. to 1000 .ANG. and preferably 50 .ANG. to 500 .ANG.. Ratio in impurity concentration of the heavily doped layer to the low doped layer is not smaller than one order of magnitude.
摘要翻译：半导体器件包括交替的p-（或n-）型重掺杂半导体层和n-（或p-）型轻掺杂半导体层的多层半导体结构。孔（或电子）以类似二维气体的方式被限制在窄层内，由此即使高载流子浓度也能实现高迁移率。可以使多层半导体结构的导电性高于体半导体。可以通过将厚度范围在10安培至1000安培范围内，优选为50安培至500安培的厚度来形成非常高的导电性。重掺杂层的杂质浓度与低掺杂层的比例不小于一个数量级。

8. 发明授权

US4351856A Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US4351856A
公开(公告)日：1982-09-28
申请号：US170185
申请日：1980-07-18
申请人： Makoto Matsui , Yasuhiro Shiraki , Yoshifumi Katayama , Toshihisa Tsukada , Eiichi Maruyama
发明人： Makoto Matsui , Yasuhiro Shiraki , Yoshifumi Katayama , Toshihisa Tsukada , Eiichi Maruyama
IPC分类号： G09G3/36 , H01L21/203 , H01L21/336 , H01L27/12 , H01L27/146 , H01L29/04 , H01L29/78 , H01L29/786 , B05D3/06 , B05D5/12 , B32B17/06
CPC分类号： H01L29/66757 , H01L21/02422 , H01L21/0245 , H01L21/02532 , H01L21/02631 , H01L21/02639 , H01L27/12 , H01L27/14643 , H01L27/14665 , H01L29/04 , H01L29/78675 , Y10S148/169 , Y10S438/909
摘要： A semiconductor device is disclosed wherein a polycrystalline film whose principal constituent is silicon is formed on an amorphous or polycrystalline substrate, the polycrystalline film having a carrier mobility of at least 1 cm.sup.2 /V.multidot.sec, and wherein at least one active device is formed by employing the polycrystalline film as its material. A large-area or elongate active device can be provided. The polycrystalline film for such semiconductor device is formed by a method wherein the amorphous or polycrystalline substrate is mounted in a vacuum chamber and wherein the polycrystalline film whose principal constituent is silicon is evaporated on the substrate under the conditions that the pressure during the evaporation is below 1.times.10.sup.-8 Torr and that the partial pressure of oxygen during the evaporation is below 1.times.10.sup.-9 Torr.
摘要翻译：公开了一种半导体器件，其中主要成分为硅的多晶膜形成在非晶或多晶衬底上，所述多晶膜的载流子迁移率为至少1cm 2 / Vxsec，并且其中至少一个有源器件通过使用多晶膜作为其材料。可以提供大面积或细长的有源装置。用于这种半导体器件的多晶膜通过一种方法形成，其中非晶或多晶衬底安装在真空室中，其中主要成分为硅的多晶膜在蒸发过程中的压力低于条件下在衬底上蒸发 1×10 -8乇，蒸发时的氧分压低于1×10 -9乇。

9. 发明授权

US4672406A Semiconductor member and semiconductor device employing the same 失效
标题翻译：采用该半导体元件的半导体元件和半导体器件
公开(公告)号：US4672406A
公开(公告)日：1987-06-09
申请号：US684691
申请日：1984-12-21
申请人： Yasushi Sawada , Kiichi Ueyanagi , Yoshifumi Katayama , Yasuhiro Shiraki , Makoto Morioka , Takao Kuroda , Tomoyoshi Mishima
发明人： Yasushi Sawada , Kiichi Ueyanagi , Yoshifumi Katayama , Yasuhiro Shiraki , Makoto Morioka , Takao Kuroda , Tomoyoshi Mishima
IPC分类号： H01L29/812 , H01L21/338 , H01L21/8252 , H01L27/095 , H01L29/201 , H01L29/205 , H01L29/36 , H01L29/43 , H01L29/47 , H01L29/778 , H01L29/80
CPC分类号： H01L21/8252 , H01L27/095 , H01L29/432 , H01L29/475 , H01L29/7783
摘要： A semiconductor member has a structure wherein a first semiconductor layer is held between second and third semiconductor layers which have forbidden band widths greater than a forbidden band width of the first semiconductor layer, and wherein only the second semiconductor layer which is formed on a side of the first semiconductor layer close to a substrate is doped with impurities. The semiconductor member constructs the depletion type with the first and second semiconductor layers, and the enhancement type with the first and third semiconductor layers. A semiconductor device can be properly formed in the enhancement or depletion type by selectively connecting the semiconductor layers.
摘要翻译：半导体部件具有这样的结构，其中第一半导体层被保持在禁止带宽大于第一半导体层的禁带宽度的第二和第三半导体层之间，并且其中只有形成在第一半导体层靠近基板的第一半导体层掺杂有杂质。半导体部件利用第一和第二半导体层构成耗尽型，并且利用第一和第三半导体层构成增强型。可以通过选择性地连接半导体层，以增强或耗尽型形式适当地形成半导体器件。

10. 发明授权

US4835583A Semiconductor device having strained superlattice buffer layers with In-doped GaAs substrate 失效
标题翻译：具有掺杂GaAs衬底的具有应变超晶格缓冲层的半导体器件
公开(公告)号：US4835583A
公开(公告)日：1989-05-30
申请号：US895913
申请日：1986-08-13
申请人： Makoto Morioka , Tomoyoshi Mishima , Kenji Hiruma , Yoshifumi Katayama , Yasuhiro Shiraki
发明人： Makoto Morioka , Tomoyoshi Mishima , Kenji Hiruma , Yoshifumi Katayama , Yasuhiro Shiraki
IPC分类号： H01L21/20
CPC分类号： H01L21/02631 , H01L21/02395 , H01L21/02463 , H01L21/02507 , H01L21/02546
摘要： An epitaxial crystal grown layer structure which permits, on an In-doped GaAs substrate, which will be industrially used in large quantities, the growth of an epitaxial layer having the same good quality as the epitaxial layer grown on an undoped GaAs substrate.
摘要翻译：外延晶体生长层结构允许在工业上大量使用的In掺杂GaAs衬底上生长与在未掺杂的GaAs衬底上生长的外延层具有相同质量的外延层的生长。

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