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1. 发明授权

US07498235B2 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates 有权
标题翻译：用于制造绝缘体上硅（SGOI）和绝缘体上（GeI）绝缘体（GOI）基板的方法
公开(公告)号：US07498235B2
公开(公告)日：2009-03-03
申请号：US11924207
申请日：2007-10-25
申请人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

2. 发明授权

US07084460B2 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates 有权
公开(公告)号：US07084460B2
公开(公告)日：2006-08-01
申请号：US10700085
申请日：2003-11-03
申请人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L29/12 , H01L31/036 , H01L71/01 , H01L71/12 , H01L31/039
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.

3. 发明授权

US07315065B2 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates 有权
标题翻译：用于制造绝缘体上硅（SGOI）和绝缘体上（GeI）绝缘体（GOI）基板的方法
公开(公告)号：US07315065B2
公开(公告)日：2008-01-01
申请号：US11481525
申请日：2006-07-06
申请人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L29/12 , H01L31/036 , H01L71/01 , H01L71/12 , H01L31/309
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

4. 发明授权

US06657261B2 Ground-plane device with back oxide topography 有权
公开(公告)号：US06657261B2
公开(公告)日：2003-12-02
申请号：US09757317
申请日：2001-01-09
申请人： Fariborz Assaderaghi , Tze-chiang Chen , K. Paul Muller , Edward J. Nowak , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Fariborz Assaderaghi , Tze-chiang Chen , K. Paul Muller , Edward J. Nowak , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L2701
CPC分类号： H01L29/66772 , H01L29/78603
摘要： A ground-plane SOI device including at least a gate region that is formed on a top Si-containing layer of a SOI wafer, said top Si-containing layer being formed on a non-planar buried oxide layer, wherein said non-planar buried oxide layer has a thickness beneath the gate region that is thinner than corresponding oxide layers that are formed in regions not beneath said gate region as well as a method of fabricating the same are provided.

5. 发明授权

US06593205B1 Patterned SOI by formation and annihilation of buried oxide regions during processing 有权
标题翻译：在加工期间通过掩埋氧化物区域的形成和湮灭的图案化SOI
公开(公告)号：US06593205B1
公开(公告)日：2003-07-15
申请号：US10080804
申请日：2002-02-21
申请人： Tze-chiang Chen , Devendra K. Sadana
发明人： Tze-chiang Chen , Devendra K. Sadana
IPC分类号： H01L2176
CPC分类号： H01L21/76243
摘要： A method of fabricating a silicon-on-insulator (SOI) substrate including at least one patterned buried oxide region having well defined edges is provided. The method includes a step of implanting first ions into a surface of a Si-containing substrate so as to form an implant region of the first ions in the Si-containing substrate. Following the first implant step, a selective implant process is employed wherein second ions that are insoluble in SiO2 are incorporated into portions of the Si-containing substrate. The second ions employed in the selective implant step are capable of preventing the implant region of first ions from forming an oxide region during a subsequent annealing step. An annealing step is then performed which causes formation of a buried oxide region in the implant region of first ions that does not include the second ions.
摘要翻译：提供了一种制造绝缘体上硅（SOI）衬底的方法，其包括至少一个具有良好限定边缘的图案化掩埋氧化物区域。该方法包括将第一离子注入含Si衬底的表面以便在含Si衬底中形成第一离子的注入区的步骤。在第一注入步骤之后，使用选择性注入工艺，其中不溶于SiO 2的第二离子被并入含Si衬底的部分中。在选择性注入步骤中使用的第二离子能够在随后的退火步骤期间防止第一离子的注入区域形成氧化物区域。然后执行退火步骤，其导致在不包括第二离子的第一离子的注入区域中形成掩埋氧化物区域。

6. 发明授权

US06812114B2 Patterned SOI by formation and annihilation of buried oxide regions during processing 失效
标题翻译：在加工期间通过掩埋氧化物区域的形成和湮灭的图案化SOI
公开(公告)号：US06812114B2
公开(公告)日：2004-11-02
申请号：US10119931
申请日：2002-04-10
申请人： Tze-chiang Chen , Devendra K. Sadana
发明人： Tze-chiang Chen , Devendra K. Sadana
IPC分类号： H01L2176
CPC分类号： H01L21/76243
摘要： A method of fabricating a silicon-on-insulator (SOI) substrate including an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region having well defined edges is provided. The method includes a step of implanting first ions into a surface of a Si-containing substrate so as to form a first implant region of the first ions in the Si-containing substrate. Following the implantation of first ions, a first annealing step is performed which forms a buried semi-insulating or insulating region within the Si-containing substrate. Next, second ions that are insoluble in the semi-insulating or insulating region are selectively implanted into portions of the buried semi-insulating or insulating region. After the selective implant step, a second annealing step is performed which recrystallizes the buried semi-insulating or insulating region that includes second ions to the same crystal structure as the original Si-containing substrate.
摘要翻译：提供了一种制造绝缘体上硅（SOI）衬底的方法，其包括超薄顶层含Si层和至少一个具有良好限定边缘的图案化掩埋半绝缘或绝缘区域。该方法包括将第一离子注入到含Si衬底的表面中以便在含Si衬底中形成第一离子的第一注入区的步骤。在注入第一离子之后，进行第一退火步骤，其在含Si衬底内形成掩埋的半绝缘或绝缘区域。接下来，将不溶于半绝缘或绝缘区域的第二离子选择性地注入埋入半绝缘或绝缘区域的部分。在选择性注入步骤之后，执行第二退火步骤，其将包含第二离子的掩埋半绝缘或绝缘区域再结晶到与原始的含Si衬底相同的晶体结构。

7. 发明授权

US06566177B1 Silicon-on-insulator vertical array device trench capacitor DRAM 有权
标题翻译：绝缘体上的垂直阵列器件沟槽电容器DRAM
公开(公告)号：US06566177B1
公开(公告)日：2003-05-20
申请号：US09427257
申请日：1999-10-25
申请人： Carl J. Radens , Gary B. Bronner , Tze-chiang Chen , Bijan Davari , Jack A. Mandelman , Dan Moy , Devendra K. Sadana , Ghavam Ghavami Shahidi , Scott R. Stiffler
发明人： Carl J. Radens , Gary B. Bronner , Tze-chiang Chen , Bijan Davari , Jack A. Mandelman , Dan Moy , Devendra K. Sadana , Ghavam Ghavami Shahidi , Scott R. Stiffler
IPC分类号： H01L2100
CPC分类号： H01L27/10864 , H01L27/1087
摘要： A silicon on insulator (SOI) dynamic random access memory (DRAM) cell and array and method of manufacture. The memory cell includes a trench storage capacitor connected by a self aligned buried strap to a vertical access transistor. A buried oxide layer isolates an SOI layer from a silicon substrate. The trench capacitor is formed in the substrate and the access transistor is formed on a sidewall of the SOI layer. A polysilicon strap connected to the polysilicon plate of the storage capacitor provides a self-aligned contact to the source of the access transistor. Initially, the buried oxide layer is formed in the wafer. Deep trenches are etched, initially just through the SOI layer and the BOX layer. Protective sidewalls are formed in the trenches. Then, the deep trenches are etched into the substrate. The volume in the substrate is expanded to form a bottle shaped trench. A polysilicon capacitor plate is formed in the deep trenches and conductive polysilicon straps are formed in the trenches between the capacitor plates and the SOI sidewalls. Device regions are defined in the wafer and a sidewall gate is formed in the deep trenches. Shallow trenches isolation (STI) is used to isolate and define cells. Bitlines and wordlines are formed on the wafer.
摘要翻译：一种绝缘体上硅（SOI）动态随机存取存储器（DRAM）单元及阵列及其制造方法。存储单元包括通过自对准埋入带连接到垂直存取晶体管的沟槽存储电容器。掩埋氧化层将SOI层与硅衬底隔离。沟槽电容器形成在衬底中，并且存取晶体管形成在SOI层的侧壁上。连接到存储电容器的多晶硅板的多晶硅带提供与存取晶体管的源极的自对准接触。最初，在晶圆中形成掩埋氧化物层。深沟槽被蚀刻，最初刚刚通过SOI层和BOX层。在沟槽中形成保护侧壁。然后，将深沟槽蚀刻到衬底中。衬底中的体积被扩大以形成瓶形沟槽。在深沟槽中形成多晶硅电容器板，并且在电容器板和SOI侧壁之间的沟槽中形成导电多晶硅带。在晶片中限定器件区域，并且在深沟槽中形成侧壁栅极。浅沟槽隔离（STI）用于隔离和定义细胞。在晶片上形成位线和字线。

8. 发明授权

US06426252B1 Silicon-on-insulator vertical array DRAM cell with self-aligned buried strap 失效
标题翻译：绝缘体上的垂直阵列DRAM单元，具有自对准埋地带
公开(公告)号：US06426252B1
公开(公告)日：2002-07-30
申请号：US09427256
申请日：1999-10-25
申请人： Carl J. Radens , Gary B. Bronner , Tze-chiang Chen , Bijan Davari , Jack A. Mandelman , Dan Moy , Devendra K. Sadana , Ghavam Ghavami Shahidi , Scott R. Stiffler
发明人： Carl J. Radens , Gary B. Bronner , Tze-chiang Chen , Bijan Davari , Jack A. Mandelman , Dan Moy , Devendra K. Sadana , Ghavam Ghavami Shahidi , Scott R. Stiffler
IPC分类号： H01L218242
CPC分类号： H01L27/10864 , H01L27/10867 , H01L27/1203
摘要： A silicon on insulator (SOI) dynamic random access memory (DRAM) cell, array and method of manufacture. The memory cell includes a vertical access transistor above a trench storage capacitor in a layered wafer. A buried oxide (BOX) layer formed in a silicon wafer isolates an SOI layer from a silicon substrate. Deep trenches are etched through the upper surface SOI layer, the BOX layer and into the substrate. Each trench capacitor is formed in the substrate and, the access transistor is formed on a sidewall of the SOI layer. Recesses are formed in the BOX layer at the SOI layer. A polysilicon strap recessed in the BOX layer connects each polysilicon storage capacitor plate to a self-aligned contact at the source of the access transistor. Dopant is implanted into the wafer to define device regions. Access transistor gates are formed along the SOI layer sidewalls. Shallow trenches are formed and filled with insulating material to isolate cells from adjacent cells. Wordlines and bitlines are formed to complete the memory array.
摘要翻译：绝缘体上硅（SOI）动态随机存取存储器（DRAM）单元，阵列和制造方法。存储单元包括在分层晶片中的沟槽存储电容器上方的垂直存取晶体管。形成在硅晶片中的掩埋氧化物（BOX）层将SOI层与硅衬底隔离。深沟槽通过上表面SOI层，BOX层蚀刻并进入衬底。每个沟槽电容器形成在衬底中，并且存取晶体管形成在SOI层的侧壁上。在SOI层的BOX层中形成凹部。凹陷在BOX层中的多晶硅带将每个多晶硅存储电容器板连接到存取晶体管的源极处的自对准接触。将掺杂剂注入到晶片中以限定器件区域。存取晶体管栅极沿SOI层侧壁形成。形成浅沟槽并填充绝缘材料以将细胞与相邻细胞分离。形成字词和位线以完成内存数组。

9. 发明申请

US20060249790A1 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-inulator (GOI) substrates 有权
标题翻译：用于制造绝缘体上硅（SGOI）和Ge-in-inulator（GOI）基板的方法
公开(公告)号：US20060249790A1
公开(公告)日：2006-11-09
申请号：US11481525
申请日：2006-07-06
申请人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
发明人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L27/12
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

10. 发明申请

US20080050887A1 METHOD FOR FABRICATING SiGe-ON-INSULATOR (SGOI) AND Ge-ON-INSULATOR (GOI) SUBSTRATES 有权
标题翻译：用于制造SiGe-ON绝缘体（SGOI）和Ge-ON-Insulator（GOI）衬底的方法
公开(公告)号：US20080050887A1
公开(公告)日：2008-02-28
申请号：US11924207
申请日：2007-10-25
申请人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
发明人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

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