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    • 3. 发明授权
    • Reduced soft error rate through metal fill and placement
    • 通过金属填充和放置降低软错误率
    • US08102033B2
    • 2012-01-24
    • US12473435
    • 2009-05-28
    • K. Paul MullerAlicia Wang
    • K. Paul MullerAlicia Wang
    • H01L23/556
    • H01L23/556H01L23/522H01L2924/0002H01L2924/00
    • A method for reducing single event upsets in an integrated circuit includes the step of providing a plurality of levels within the integrated circuit, wherein the plurality of levels within the integrated circuit are in a stacked arrangement. The method also includes the step of providing a plurality of metal fill patterns within each of the plurality of levels within the integrated circuit. The method further includes the step of placing the plurality of metal fill patterns within at least one of the plurality of levels in a pattern such that a line of sight towards an active silicon layer does not exist within the stacked arrangement of the plurality of levels, thereby increasingly absorbing ionizing radiation particles, and thereby reducing single event upsets in the integrated circuit.
    • 一种用于减少集成电路中的单事件扰乱的方法包括在集成电路内提供多个电平的步骤,其中集成电路内的多个电平处于堆叠布置。 该方法还包括在集成电路内的多个电平的每一个内提供多个金属填充图案的步骤。 该方法还包括将多个金属填充图案放置在多个层中的至少一个层中的图案的步骤,使得朝向有源硅层的视线不存在于多个层次的堆叠布置中, 从而越来越多地吸收电离辐射颗粒,从而减少集成电路中的单个事件的不适。