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1. 发明申请

US20090288852A1 Electronic device and method of manufacturing the same 审中-公开
标题翻译：电子设备及其制造方法
公开(公告)号：US20090288852A1
公开(公告)日：2009-11-26
申请号：US12385994
申请日：2009-04-27
申请人： Tomoaki Hirokawa , Makoto Matsunoshita , Yuji Kakuta , Naoki Sakura
发明人： Tomoaki Hirokawa , Makoto Matsunoshita , Yuji Kakuta , Naoki Sakura
IPC分类号： H05K5/06 , B29C65/00 , B32B37/00 , B32B7/12
CPC分类号： H01L24/97 , H01L23/055 , H01L23/06 , H01L23/10 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/451 , H01L2224/48095 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01055 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/10329 , H01L2924/1306 , H01L2924/15787 , H01L2924/16152 , H01L2924/16315 , H01L2924/166 , Y10T156/1052 , Y10T156/1089 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An electronic device of the present invention has a substrate; an electro-conductive pattern (electrodes) provided over the substrate; a semiconductor chip mounted over the substrate, and electrically connected with the electrodes; a resin cap provided over the substrate and composed of two or more resin layers to hollow-sealing the semiconductor chip; and an adhesive layer (metal-resin adhesion maintenance layer) bonding the resin cap with the electrode.
摘要翻译：本发明的电子器件具有基板; 设置在所述基板上的导电图案（电极）半导体芯片，安装在基板上并与电极电连接; 树脂盖，设置在基板上并由两个或更多个树脂层组成，以中空密封半导体芯片; 以及将树脂盖与电极接合的粘合剂层（金属 - 树脂粘附维持层）。

2. 发明授权

US06340792B1 Mold cap for semiconductor device mold package 失效
标题翻译：半导体器件模具封装模具帽
公开(公告)号：US06340792B1
公开(公告)日：2002-01-22
申请号：US08841573
申请日：1997-04-30
申请人： Tomoaki Hirokawa
发明人： Tomoaki Hirokawa
IPC分类号： H01L2302
CPC分类号： H01L23/057 , H01L23/04 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor device mold package composed of a mold cap and a mold case both of which are formed of a resin compound and which are joined to each other to form a hollow inner space defined and encapsulated by the mold cap and the mold case, the mold cap has a recess defined by an inner wall surface and surrounded by a flat mouth portion, for the purpose of forming the above mentioned hollow inner space. The mold cap is constructed to fulfill a relation of a-b≧t and a-b≦b where “a” is a height from the mouth portion to a top of an outer wall surface, “b” is a height from the mouth portion to a top of the inner wall surface, and “t” is a thickness of the mold cap at the mouth portion.
摘要翻译：在由模具盖和模具壳体构成的半导体器件模具封装件中，它们均由树脂组合物形成并且彼此接合以形成由模具盖和模具壳体限定和封装的中空内部空间，模具帽具有由内壁表面限定的并由平坦的口部包围的凹部，用于形成上述空心内部空间。模具盖被构造成满足ab> = t和ab <= b的关系，其中“a”是从口部到外壁表面的顶部的高度，“b”是从口部到内壁表面的顶部，“t”是口部处的模具盖的厚度。

3. 发明授权

US06703678B2 Schottky barrier field effect transistor large in withstanding voltage and small in distortion and return-loss 有权
标题翻译：肖特基势垒场效应晶体管耐受电压大，失真小，回波损耗小
公开(公告)号：US06703678B2
公开(公告)日：2004-03-09
申请号：US09966934
申请日：2001-09-28
申请人： Tomoaki Hirokawa , Zenzou Shingu , Shigeru Saitou
发明人： Tomoaki Hirokawa , Zenzou Shingu , Shigeru Saitou
IPC分类号： H01L27095
CPC分类号： H01L29/402 , H01L21/28587 , H01L29/42316 , H01L29/66871 , H01L29/812
摘要： A Schottky barrier field effect transistor has a gate electrode formed with a field plate in order to achieve a high withstanding voltage, where the thickness of the dielectric layer between the channel layer and the field plate, the distance between the Schottky contact and the drain and the length of the field plate falls within the range of 300 nanometers to 600 nanometers thick, the range from 800 nanometers to 3000 nanometers long and the range of the distance between the Schottky contact and the drain is plus or minus 400 nanometers, respectively, so that the distortion and the return-loss are improved without sacrifice of the withstanding voltage.
摘要翻译：肖特基势垒场效应晶体管具有形成有场板的栅电极，以便实现高耐受电压，其中沟道层和场板之间的介电层的厚度，肖特基接触和漏极之间的距离以及场板的长度落在300纳米到600纳米厚的范围内，范围从800纳米到3000纳米长，肖特基接触和漏极之间的距离范围分别是正负400纳米，所以在不牺牲耐压的情况下改善失真和回波损耗。

4. 发明授权

US5956574A Lead frame flash removing method and apparatus 失效
标题翻译：引线框架闪光去除方法和装置
公开(公告)号：US5956574A
公开(公告)日：1999-09-21
申请号：US808420
申请日：1997-02-28
申请人： Seiji Ichikawa , Junichi Tanaka , Tomoaki Hirokawa , Taku Sato , Tomoaki Kimura , Satoshi Murata , Tsutomu Kubota , Takeo Ogihara , Kenji Uchida , Kenji Watanabe , Tsutomu Noguti
发明人： Seiji Ichikawa , Junichi Tanaka , Tomoaki Hirokawa , Taku Sato , Tomoaki Kimura , Satoshi Murata , Tsutomu Kubota , Takeo Ogihara , Kenji Uchida , Kenji Watanabe , Tsutomu Noguti
IPC分类号： H01L21/56 , H01L21/48 , H01L23/50 , H01L21/44 , H01L21/50
CPC分类号： H01L21/4835 , H01L2224/48091 , H01L2224/48227 , H01L2924/16152 , H01L2924/30107
摘要： In a lead frame flash removing method and apparatus, a lead frame is molded integrally with a case. After molding, abrasive agent-mixed water is sprayed to a surface of the lead frame where a flash is formed. The lead frame is dipped in an electrolytic solution and applying a DC voltage is applied across the lead frame and an electrode in the electrolytic solution, thereby electrolytically processing the lead frame. After the electrolytic process, an external force is applied to the surface of the lead frame, thereby removing the flash.
摘要翻译：在引线框架闪光去除方法和装置中，引线框架与壳体一体地模制。在模制之后，将研磨剂混合水喷射到形成闪光的引线框架的表面。将引线框架浸入电解液中，施加直流电压施加在引线框架和电解液中的电极，由此对引线框架进行电解处理。在电解处理之后，将外力施加到引线框架的表面，从而去除闪光。

5. 发明授权

US5905301A Mold package for sealing a chip 失效
标题翻译：用于密封芯片的模具封装
公开(公告)号：US5905301A
公开(公告)日：1999-05-18
申请号：US792394
申请日：1997-02-03
申请人： Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Junichi Tanaka , Taku Sato , Satoshi Murata , Tsutomu Kubota , Takeo Ogihara , Kenji Uchida
发明人： Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Junichi Tanaka , Taku Sato , Satoshi Murata , Tsutomu Kubota , Takeo Ogihara , Kenji Uchida
IPC分类号： H01L23/04 , H01L23/02 , H01L23/057 , H01L23/08 , H01L23/31 , H01L23/495 , H01L23/498 , H01L23/66 , H01L23/10 , H01L29/82
CPC分类号： H01L24/49 , H01L23/057 , H01L23/315 , H01L23/49541 , H01L23/49555 , H01L23/49861 , H01L23/66 , H01L2224/16245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/85201 , H01L24/45 , H01L24/48 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01067 , H01L2924/01073 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12033 , H01L2924/15153 , H01L2924/15165 , H01L2924/16152 , H01L2924/181 , H01L2924/20752 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025
摘要： A package of the present invention comprises a base molded integrally with a lead frame by resin, a chip mounted on the lead frame, and a cap made of resin, which covers the chip and is fixed to the base. The base includes a substrate portion sealing the lead frame therein, a frame-shaped bank portion formed at a periphery of an upper surface of said substrate portion, the bank portion having said lead frame interposed between it snd the substrate portion, and an anchor portion formed at a portion of the lead frame interposed between the substrate portion and the bank portion. The chip is mounted on a region of the lead frame surrounded by the bank portion. The cap is fixed to the bank portion.
摘要翻译：本发明的封装包括：通过树脂与引线框架整体模制的基座，安装在引线框架上的芯片和覆盖芯片并固定到基座的由树脂制成的盖。底座包括密封引线框架的基板部分，形成在所述基板部分的上表面的周边的框状的堤部分，其中插入在基板部分之间的引线框架的堤岸部分和锚定部分形成在插入在基板部分和堤岸部分之间的引线框架的一部分。芯片安装在由堤部分围绕的引线框架的区域上。盖子固定在银行部分。

6. 发明授权

US6011303A Electronic component 失效
标题翻译：电子元器件
公开(公告)号：US6011303A
公开(公告)日：2000-01-04
申请号：US978648
申请日：1997-11-26
申请人： Junichi Tanaka , Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Kenji Watanabe , Kenji Utida , Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Tsutomu Kubota
发明人： Junichi Tanaka , Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Kenji Watanabe , Kenji Utida , Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Tsutomu Kubota
IPC分类号： H01L23/48 , H01L23/02 , H01L23/04 , H01L23/31 , H01L23/50 , H01L23/66
CPC分类号： H01L23/315 , H01L23/66 , H01L2224/45015 , H01L2224/48091 , H01L2224/48247 , H01L2224/49175 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/30107
摘要： An electronic component includes a substrate portion, a bank portion, a plurality of lead members, an anchor hole, and at least a pair of notches. A chip is supported on the substrate portion. The bank portion is formed on a periphery of the substrate portion to surround the chip. The plurality of lead members are made of conductive strip pieces, and each lead member has an inner lead electrically connected to the chip and an outer lead extending to an outside. The substrate portion and the bank portion are integrally molded with a resin to include the lead members, so that the inner and outer leads are fixed to a connecting portion between the substrate portion and the bank portion. The anchor hole is formed in a portion where each of the lead members is in contact with the bank portion, and is filled with a resin. The pair of notches are formed in two ends of each of the lead members to sandwich the anchor hole.
摘要翻译：电子部件包括基板部分，堤部分，多个引线部件，锚定孔以及至少一对凹口。芯片支撑在基板部分上。堤部分形成在基片部分的周围以围绕芯片。多个引线构件由导电条片制成，并且每个引线构件具有电连接到芯片的内引线和延伸到外部的外引线。基板部分和堤部分用树脂一体地模制成包括引线部件，使得内引线和外引线固定到基片部分和堤部之间的连接部分。锚定孔形成在每个引导部件与堤部分接触的部分中，并且填充有树脂。一对切口形成在每个引导构件的两端以夹持锚定孔。

7. 发明授权

US5970322A Ultrahigh-frequency electronic component and method of manufacturing the same 失效
标题翻译：超高频电子元件及其制造方法
公开(公告)号：US5970322A
公开(公告)日：1999-10-19
申请号：US4447
申请日：1998-01-08
申请人： Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Junichi Tanaka , Kenji Uchida , Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Tsutomu Kubota
发明人： Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Junichi Tanaka , Kenji Uchida , Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Tsutomu Kubota
IPC分类号： H01L21/56 , H01L23/29 , H01L23/31 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/565 , H01L23/295 , H01L23/3135 , H01L2224/48091 , H01L2224/48247 , H01L24/48 , H01L2924/00014 , H01L2924/14 , H01L2924/181
摘要： An ultrahigh-frequency electronic component has an ultrahigh-frequency chip encased in a molded-resin package. The ultrahigh-frequency electronic component includes a first sealing layer encasing the ultrahigh-frequency chip therein and a second sealing layer encasing the first sealing layer therein. The first sealing layer contains a number of voids or minute air bubbles therein which are effective in reducing the permittivity of the first sealing layer. A method of manufacturing the ultrahigh-frequency electronic component is also disclosed.
摘要翻译：超高频电子元件具有封装在模制树脂封装中的超高频芯片。超高频电子部件包括在其中包围超高频芯片的第一密封层和在其中包封第一密封层的第二密封层。第一密封层包含多个空隙或微小的气泡，其有效降低第一密封层的介电常数。还公开了一种制造超高频电子部件的方法。

8. 发明授权

US5904501A Hollow package manufacturing method 失效
标题翻译：空心包装制造方法
公开(公告)号：US5904501A
公开(公告)日：1999-05-18
申请号：US824459
申请日：1997-03-26
申请人： Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Kenji Uchida , Tsutomu Kubota , Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Junichi Tanaka
发明人： Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Kenji Uchida , Tsutomu Kubota , Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Junichi Tanaka
IPC分类号： H01L23/02 , H01L21/00 , H01L23/04 , H01L23/10 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/67126 , H01L23/10 , H01L2924/0002 , H01L2924/09701 , Y10S257/924
摘要： A hollow package manufacturing method includes the adhesive spreading step, the adhesive applying step, and the cap adhering step. In the adhesive spreading step, an adhesive is spread on a circular table to a uniform thickness. In the adhesive applying step, an open end face of a cylindrical cap having a bottom is urged against the circular table to apply the adhesive to the cap. In the cap adhering step, the cap applied with the adhesive is adhered to a case. A hollow package manufacturing apparatus is also disclosed.
摘要翻译：中空包装制造方法包括粘合剂铺展步骤，粘合剂施加步骤和盖子粘合步骤。在粘合剂铺展步骤中，将粘合剂铺展在圆桌上以均匀的厚度。在粘合剂涂布步骤中，具有底部的圆筒形盖的开口端面被推靠在圆台上以将粘合剂施加到盖上。在盖接合步骤中，将涂有粘合剂的盖子粘附到壳体上。还公开了一种中空包装制造装置。

9. 发明授权

US5889232A Ultrahigh-frequency electronic component 失效
标题翻译：超高频电子元件
公开(公告)号：US5889232A
公开(公告)日：1999-03-30
申请号：US855537
申请日：1997-05-13
申请人： Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Junichi Tanaka , Kenji Uchida , Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Tsutomu Kubota
发明人： Seiji Ichikawa , Tomoaki Hirokawa , Tomoaki Kimura , Taku Sato , Junichi Tanaka , Kenji Uchida , Masatoshi Ohara , Takeo Ogihara , Satoshi Murata , Tsutomu Kubota
IPC分类号： H01L21/56 , H01L23/29 , H01L23/31 , H01L23/28
CPC分类号： H01L21/565 , H01L23/295 , H01L23/3135 , H01L2224/48091 , H01L2224/48247 , H01L24/48 , H01L2924/00014 , H01L2924/14 , H01L2924/181
摘要： An ultrahigh-frequency electronic component has an ultrahigh-frequency chip encased in a molded-resin package. The ultrahigh-frequency electronic component includes a first sealing layer encasing the ultrahigh-frequency chip therein and a second sealing layer encasing the first sealing layer therein. The first sealing layer contains a number of voids or minute air bubbles therein which are effective in reducing the permittivity of the first sealing layer. A method of manufacturing the ultrahigh-frequency electronic component is also disclosed.
摘要翻译：超高频电子元件具有封装在模制树脂封装中的超高频芯片。超高频电子部件包括在其中包围超高频芯片的第一密封层和在其中包封第一密封层的第二密封层。第一密封层包含多个空隙或微小的气泡，其有效降低第一密封层的介电常数。还公开了一种制造超高频电子部件的方法。

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