专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110215452A1 SEMICONDUCTOR PACKAGE, SUBSTRATE, ELECTRONIC COMPONENT, AND METHOD OF MOUNTING SEMICONDUCTOR PACKAGE 审中-公开
标题翻译：半导体封装，基板，电子元件和安装半导体封装的方法
公开(公告)号：US20110215452A1
公开(公告)日：2011-09-08
申请号：US13042009
申请日：2011-03-07
申请人： Naoki SAKURA
发明人： Naoki SAKURA
IPC分类号： H01L23/495 , H01L21/60 , H05K1/11
CPC分类号： H01L23/495 , H01L2224/48095 , H01L2224/49171 , H01L2924/1305 , H01L2924/30107 , H05K1/11 , H01L2924/00
摘要： A semiconductor package includes a semiconductor device and a substrate over which the semiconductor device is mounted, wherein the substrate includes: an internal ground electrode, formed in the one side of the substrate, which is connected to the semiconductor device; two external ground electrodes, located at the opposite side of the substrate opposite to the one side of the substrate, which are electrically connected to the internal ground electrode; at least one sub-ground electrode, located between the two external ground electrodes, when seen in a plan view, and located at the opposite side of the substrate, which is electrically connected to the internal ground electrode; an internal input electrode, formed in the one side of the substrate, which is connected to the semiconductor device; and an internal output electrode, formed in the one of the substrate, which is connected to the semiconductor device.
摘要翻译：半导体封装包括半导体器件和安装半导体器件的衬底，其中衬底包括：内部接地电极，形成在衬底的一侧，其连接到半导体器件; 两个外部接地电极，位于与基板的一侧相对的基板的相对侧，电连接到内部接地电极; 位于所述两个外部接地电极之间的至少一个子接地电极，当在平面图中看时位于所述基板的与所述内部接地电极电连接的相反侧; 内部输入电极，形成在所述基板的一侧，所述内部输入电极连接到所述半导体器件; 以及内部输出电极，形成在与半导体器件连接的基板中的一个中。

2. 发明授权

US06372613B2 Method of manufacturing a gate electrode with low resistance metal layer remote from a semiconductor 有权
标题翻译：制造远离半导体的低电阻金属层的栅电极的制造方法
公开(公告)号：US06372613B2
公开(公告)日：2002-04-16
申请号：US09304520
申请日：1999-05-04
申请人： Naoki Sakura
发明人： Naoki Sakura
IPC分类号： H01L2128
CPC分类号： H01L29/66863 , H01L21/28581 , H01L21/28587 , H01L29/42316
摘要： In a semiconductor device, a gate electrode is formed by sequentially forming a Schottky metal film, a barrier metal film, and a low-resistance metal film from the lower side. The Schottky metal film or barrier metal film has a gap in a lower gate vertical portion. The gap is closed at its upper and lower portions. The overlaying low-resistance metal film does not extend into the lower gate vertical portion. A method for this semiconductor device is also disclosed.
摘要翻译：在半导体装置中，通过从下侧依次形成肖特金属膜，阻挡金属膜和低电阻金属膜来形成栅电极。肖特基金属膜或阻挡金属膜在下部栅极垂直部分具有间隙。间隙在其上部和下部封闭。覆盖的低电阻金属膜不延伸到下栅极垂直部分。还公开了该半导体器件的方法。

3. 发明授权

US4374828A Biologically active thymones from the thymus 失效
标题翻译：来自胸腺的生物活性胸腺
公开(公告)号：US4374828A
公开(公告)日：1983-02-22
申请号：US199997
申请日：1980-11-17
申请人： Karl Folkers , Teresa M. Kubiak , Henryk M. Stepien , Naoki Sakura
发明人： Karl Folkers , Teresa M. Kubiak , Henryk M. Stepien , Naoki Sakura
IPC分类号： A61K35/26 , A61K37/00
CPC分类号： A61K35/26 , Y10S530/837 , Y10S930/18
摘要： A class of three substances has been isolated in highly purified form and in substantially pure form by utilizing thymus tissue as a source material. These three substances are designated thymone A, thymone B and thymone C. Thymones A and B are new peptides which yield approximately 13 and 14 individual amino acid moieties, respectively, on acid hydrolysis. Thymones A and B are chemically characterized by electrophoretic and chromatographic values which are appropriate for substances which are substantially pure. Thymone C was highly purified and its biological activity was reproducibly detected and measured. Thymones A, B and C stimulate the proliferation of lymphocytes. Thymone A stimulates the formation of cyclic adenosine monophosphate. Thymone B stimulates the formation of cyclic guanosine monophosphate.The biological activities of these thymones to stimulate the proliferation of lymphocytes and the formations of cyclic nucleotides are basic hormonal functions for the therapeutic enhancement of the immune system in patients who have immune deficiencies from diverse causes.
摘要翻译：通过利用胸腺组织作为源材料，已经以高度纯化的形式和基本上纯的形式分离了一类三种物质。这三种物质被称为胸腺嘧啶A，胸腺嘧啶B和胸腺素C.胸腺嘧啶A和B是分别在酸水解上产生大约13和14个单个氨基酸部分的新肽。百里香酮A和B的化学特征在于电泳和色谱值，其适用于基本上纯的物质。胸腺C高度纯化，其生物学活性被重复检测和测定。胸腺素A，B和C刺激淋巴细胞的增殖。 Thymone A刺激环磷酸腺苷的形成。胸腺B刺激环磷酸鸟苷的形成。刺激淋巴细胞增殖和循环核苷酸形成的这些胸腺嘧啶的生物活性是用于治疗增强免疫系统的基础激素功能，其具有不同原因的免疫缺陷。

4. 发明授权

US07851884B2 Field-effect transistor, semiconductor chip and semiconductor device 失效
标题翻译：场效晶体管，半导体芯片和半导体器件
公开(公告)号：US07851884B2
公开(公告)日：2010-12-14
申请号：US12232788
申请日：2008-09-24
申请人： Shuji Asai , Akira Fujihara , Makoto Matsunoshita , Naoki Sakura , Seiji Ichikawa
发明人： Shuji Asai , Akira Fujihara , Makoto Matsunoshita , Naoki Sakura , Seiji Ichikawa
IPC分类号： H01L23/48
CPC分类号： H01L29/7783 , H01L29/66462 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2924/12032 , H01L2924/13062 , H01L2924/00014 , H01L2924/00
摘要： A FET exhibiting excellent uniformity and productivity and having a low noise figure and high associated gain as high-frequency performance, a semiconductor chip having this FET and a semiconductor device having the semiconductor chip. The FET includes a GaAs substrate on which are built up an i-type GaAs layer, an i-type InGaAs two-dimensional electron gas layer and an n-type AlGaAs electron supply layer. A gate electrode is provided on and in linear Schottky contact with the n-type AlGaAs electron supply layer. A n-type InGaP etching stop layer and then an n-type GaAs contact layer at the same lateral position are built up on the n-type AlGaAs electron supply layer, these being spaced away from both sides of the gate electrode. A source electrode and a drain electrode are provided on the n-type GaAs contact layer and are spaced away from edges of the contact layer as electrodes that make band-shaped ohmic contact.
摘要翻译：具有优异的均匀性和生产率并且具有低噪声系数和高相关增益作为高频性能的FET，具有该FET的半导体芯片和具有半导体芯片的半导体器件。该FET包括GaAs衬底，其上构建有i型GaAs层，i型InGaAs二维电子气体层和n型AlGaAs电子供应层。栅电极设置在与n型AlGaAs电子供应层的线性肖特基接触中。在n型AlGaAs电子供给层上形成n型InGaP蚀刻停止层，然后在同一横向位置形成n型GaAs接触层，这些与栅电极的两侧间隔开。源电极和漏电极设置在n型GaAs接触层上，并且与接触层的边缘间隔开，作为带状欧姆接触的电极。

5. 发明授权

US5869365A Method of forming T electrode in field effect transistor 失效
标题翻译：在场效应晶体管中形成T电极的方法
公开(公告)号：US5869365A
公开(公告)日：1999-02-09
申请号：US942821
申请日：1997-10-02
申请人： Naoki Sakura
发明人： Naoki Sakura
IPC分类号： H01L21/28 , H01L21/027 , H01L21/285 , H01L21/338 , H01L29/812 , H01L21/44
CPC分类号： H01L29/66863 , H01L21/0276 , H01L21/28581 , H01L21/28587 , Y10S438/952
摘要： In a method of manufacturing a semiconductor device, an operating layer and a light-shielding film are sequentially formed to form a recess step on a semiconductor substrate. A first photoresist film is formed on the light-shielding film. The light-shielding film is patterned using the photoresist film as a mask to form a gate electrode formation opening portion. A metal film is formed on the entire surface including the opening portion. The metal film is selectively etched using, as a mask, a second photoresist film formed on the metal film, thereby forming a gate electrode having a T shape in the longitudinal section. The second photoresist film is removed. The light-shielding film is removed.
摘要翻译：在制造半导体器件的方法中，依次形成工作层和遮光膜，以在半导体衬底上形成凹陷台阶。在遮光膜上形成第一光致抗蚀剂膜。使用光致抗蚀剂膜作为掩模对遮光膜进行图案化以形成栅电极形成开口部分。在包括开口部的整个表面上形成金属膜。使用形成在金属膜上的第二光致抗蚀剂膜作为掩模来选择性地蚀刻金属膜，从而在纵截面中形成具有T形的栅电极。去除第二光致抗蚀剂膜。除去遮光膜。

6. 发明授权

US08610237B2 Semiconductor apparatus 有权
标题翻译：半导体装置
公开(公告)号：US08610237B2
公开(公告)日：2013-12-17
申请号：US13553150
申请日：2012-07-19
申请人： Naoki Sakura
发明人： Naoki Sakura
IPC分类号： H01L21/70 , H01L23/495
CPC分类号： H01L23/047 , H01L23/49861 , H01L23/642 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6655 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/16152 , H01L2924/30107 , H01L2924/3011 , H05K1/0243 , H05K1/025 , H05K1/113 , H05K1/114 , H01L2924/00 , H01L2224/45099
摘要： A semiconductor apparatus includes a semiconductor chip, a lead frame that has a first surface having the semiconductor chip mounted thereover and a second surface opposite to the first surface, a bonding wire that couples the semiconductor chip and the lead frame, and a high dielectric constant layer that is disposed over a surface of the lead frame opposite to a surface having the semiconductor chip mounted thereover and that has a relative permittivity of 5 or more. The lead frame includes a source electrode lead coupled to the source of a semiconductor device formed over the semiconductor chip and a source-wire junction at which the source electrode lead and the bonding wire are coupled together. The high dielectric layer is disposed in a region including at least a position corresponding to the source-wire junction over the second surface of the lead frame.
摘要翻译：半导体装置包括半导体芯片，引线框架，其具有安装在其上的半导体芯片的第一表面和与第一表面相对的第二表面，将半导体芯片和引线框架连接的接合线和高介电常数层，其布置在与其上安装有半导体芯片的表面相对的引线框架的表面上，并且具有5以上的相对介电常数。引线框架包括耦合到形成在半导体芯片上的半导体器件的源极的源极引线和源电极引线和接合线耦合在一起的源极 - 线结。高电介质层设置在至少包括与引线框架的第二表面上的源极 - 线结对应的位置的区域中。

7. 发明授权

US5763143A Process of exactly patterning layer to target configuration by using photo-resist mask formed with dummy pattern 失效
标题翻译：通过使用形成有虚拟图案的光刻胶掩模将层精确地图案化成目标构型的工艺
公开(公告)号：US5763143A
公开(公告)日：1998-06-09
申请号：US571535
申请日：1995-12-13
申请人： Naoki Sakura
发明人： Naoki Sakura
IPC分类号： G03F1/00 , G03F1/68 , G03F7/20 , G03F7/40 , H01L21/027 , G03C5/00
CPC分类号： G03F7/20 , G03F7/40
摘要： Tension takes place in a surface of a photo-resist mask due to a shrinkage in a post-development bake, and a recess formed in the photo-resist mask takes up the tension so as to maintain the adhesion to a semiconductor substrate and prevent a resist pattern from undesirable deformation.
摘要翻译：由于后曝光烘烤中的收缩，在光刻胶掩模的表面发生张力，并且形成在光致抗蚀剂掩模中的凹部占据张力，以保持与半导体基板的粘附性并防止抗皱图案不良变形。

8. 发明申请

US20130062788A1 SEMICONDUCTOR APPARATUS 有权
公开(公告)号：US20130062788A1
公开(公告)日：2013-03-14
申请号：US13553150
申请日：2012-07-19
申请人： Naoki SAKURA
发明人： Naoki SAKURA
IPC分类号： H01L23/48
CPC分类号： H01L23/047 , H01L23/49861 , H01L23/642 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6655 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/16152 , H01L2924/30107 , H01L2924/3011 , H05K1/0243 , H05K1/025 , H05K1/113 , H05K1/114 , H01L2924/00 , H01L2224/45099
摘要： A semiconductor apparatus includes a semiconductor chip, a lead frame that has a first surface having the semiconductor chip mounted thereover and a second surface opposite to the first surface, a bonding wire that couples the semiconductor chip and the lead frame, and a high-dielectric layer that is disposed over a surface of the lead frame opposite to a surface having the semiconductor chip mounted thereover and that has a relative permittivity of 5 or more. The lead frame includes a source electrode lead coupled to the source of a semiconductor device formed over the semiconductor chip and a source-wire junction at which the source electrode lead and the bonding wire are coupled together. The high-dielectric layer is disposed in a region including at least a position corresponding to the source-wire junction over the second surface of the lead frame.
摘要翻译：半导体装置包括半导体芯片，引线框架，其具有安装在其上的半导体芯片的第一表面和与第一表面相对的第二表面，将半导体芯片和引线框架连接的接合线以及高电介质层，其布置在与其上安装有半导体芯片的表面相对的引线框架的表面上，并且具有5以上的相对介电常数。引线框架包括耦合到形成在半导体芯片上的半导体器件的源极的源极引线和源电极引线和接合线耦合在一起的源极 - 线结。高电介质层设置在至少包括与引线框架的第二表面上的源极 - 线结对应的位置的区域中。

9. 发明申请

US20090288852A1 Electronic device and method of manufacturing the same 审中-公开
标题翻译：电子设备及其制造方法
公开(公告)号：US20090288852A1
公开(公告)日：2009-11-26
申请号：US12385994
申请日：2009-04-27
申请人： Tomoaki Hirokawa , Makoto Matsunoshita , Yuji Kakuta , Naoki Sakura
发明人： Tomoaki Hirokawa , Makoto Matsunoshita , Yuji Kakuta , Naoki Sakura
IPC分类号： H05K5/06 , B29C65/00 , B32B37/00 , B32B7/12
CPC分类号： H01L24/97 , H01L23/055 , H01L23/06 , H01L23/10 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/451 , H01L2224/48095 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01055 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/10329 , H01L2924/1306 , H01L2924/15787 , H01L2924/16152 , H01L2924/16315 , H01L2924/166 , Y10T156/1052 , Y10T156/1089 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An electronic device of the present invention has a substrate; an electro-conductive pattern (electrodes) provided over the substrate; a semiconductor chip mounted over the substrate, and electrically connected with the electrodes; a resin cap provided over the substrate and composed of two or more resin layers to hollow-sealing the semiconductor chip; and an adhesive layer (metal-resin adhesion maintenance layer) bonding the resin cap with the electrode.
摘要翻译：本发明的电子器件具有基板; 设置在所述基板上的导电图案（电极）半导体芯片，安装在基板上并与电极电连接; 树脂盖，设置在基板上并由两个或更多个树脂层组成，以中空密封半导体芯片; 以及将树脂盖与电极接合的粘合剂层（金属 - 树脂粘附维持层）。

10. 发明授权

US5925902A Semiconductor device having a schottky film with a vertical gap formed therein 失效
标题翻译：具有在其中形成有垂直间隙的肖特基薄膜的半导体器件
公开(公告)号：US5925902A
公开(公告)日：1999-07-20
申请号：US86723
申请日：1998-05-29
申请人： Naoki Sakura
发明人： Naoki Sakura
IPC分类号： H01L29/417 , H01L21/285 , H01L21/338 , H01L29/423 , H01L29/812
CPC分类号： H01L29/66863 , H01L21/28581 , H01L21/28587 , H01L29/42316
摘要： In a semiconductor device, a gate electrode is formed by sequentially forming a Schottky metal film, a barrier metal film, and a low-resistance metal film from the lower side. The Schottky metal film or barrier metal film has a gap in a lower gate vertical portion. The gap is closed at its upper and lower portions. The overlaying low-resistance metal film does not extend into the lower gate vertical portion. A method for this semiconductor device is also disclosed.
摘要翻译：在半导体器件中，通过从下侧依次形成肖特基金属膜，阻挡金属膜和低电阻金属膜来形成栅电极。肖特基金属膜或阻挡金属膜在下部栅极垂直部分具有间隙。间隙在其上部和下部封闭。覆盖的低电阻金属膜不延伸到下栅极垂直部分。还公开了该半导体器件的方法。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式