会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 6. 发明授权
    • Processing for polishing dissimilar conductive layers in a semiconductor
device
    • 用于在半导体器件中抛光不同导电层的处理
    • US5985755A
    • 1999-11-16
    • US822025
    • 1997-03-24
    • Rajeev BajajJanos FarkasSung C. KimJaime Saravia
    • Rajeev BajajJanos FarkasSung C. KimJaime Saravia
    • H01L21/304H01L21/321H01L21/4763
    • H01L21/3212
    • A process of polishing two dissimilar conductive materials deposited on semiconductor device substrate optimizes the polishing of each of the conductive material independently, while utilizing the same polishing equipment for manufacturing efficiency. A tungsten layer (258) and a titanium layer (256) of a semiconductor device substrate (250) are polished using one polisher (10) but two different slurry formulations. The two slurries can be dispensed sequentially onto the same polishing platen (132) from two different source containers (111 and 112), wherein the first slurry is dispensed until the tungsten is removed and then the slurry dispense is switched to the second slurry for removal of the titanium. In a preferred embodiment, the first slurry composition is a ferric nitrate slurry while the second slurry composition is an oxalic acid slurry.
    • 抛光沉积在半导体器件衬底上的两种不同导电材料的工艺可以独立地优化每个导电材料的抛光,同时利用相同的抛光设备来制造效率。 使用一个抛光机(10),但是使用两种不同的浆料配方来抛光半导体器件基板(250)的钨层(258)和钛层(256)。 两个浆料可以从两个不同的源容器(111和112)顺序地分配到相同的抛光平台(132)上,其中分配第一浆料直到除去钨,然后将浆料分配切换到第二浆料以除去 的钛。 在优选的实施方案中,第一浆料组合物是硝酸铁浆料,而第二浆料组合物是草酸浆料。
    • 8. 发明授权
    • Methods of patterning and manufacturing semiconductor devices
    • 图案化和制造半导体器件的方法
    • US5256587A
    • 1993-10-26
    • US911594
    • 1992-07-10
    • Young K. JunSa K. RaDong W. KimHyun H. SeoSung C. KimJun K. Kim
    • Young K. JunSa K. RaDong W. KimHyun H. SeoSung C. KimJun K. Kim
    • G03F7/09H01L21/02H01L21/033H01L21/3213H01L21/70
    • H01L28/92G03F7/094H01L21/0332H01L21/0337H01L21/32139Y10S148/138Y10S438/947Y10S438/97
    • Methods of hyperfine patterning and manufacturing semiconductor devices. Steps in accordance with the present invention include coating a hemisphere particle layer having hills and valleys on a layer to be etched, the hemisphere particle layer having an etch selectivity higher than that of the first layer, filling the valleys of the hemisphere particle layer with a second layer having an etch selectivity higher than that of the hemisphere particle layer, and etching back the hills of the hemisphere particle layer to expose the first layer by using the second layer as a mask, and etching the first layer. By virtue of the hemisphere particle layer having alternating hills and valleys, it is possible to accomplish a hyperfine patterning of about 0.1 .mu.m. Since the mean size and the density of hills and valleys of the hemisphere layer can be controlled, the pattern size also can be controlled. Where the present invention is applied to capacitors of semiconductor memory elements, the capacitor node surface area can be increased, depending on the etched back depth of a polysilicon layer.
    • 超精细图案化和制造半导体器件的方法。 根据本发明的步骤包括在待蚀刻的层上涂覆具有山丘和谷的半球粒子层,该半球粒子层的蚀刻选择性高于第一层的蚀刻选择性,将半球粒子层的谷部填充到半球粒子层的谷部 第二层具有比半球颗粒层的蚀刻选择性更高的蚀刻选择性,并且通过使用第二层作为掩模蚀刻半球粒子层的山丘以暴露第一层,并蚀刻第一层。 由于半球颗粒层具有交替的山丘和山谷,可以实现约0.1μm的超精细图案化。 由于可以控制半球层的平均尺寸和丘陵和山谷的密度,因此也可以控制图案尺寸。 在将本发明应用于半导体存储器元件的电容器的情况下,可以根据多晶硅层的蚀刻回深度来增加电容器节点表面积。
    • 9. 发明授权
    • Method of chemical mechanical polishing
    • 化学机械抛光方法
    • US6120354A
    • 2000-09-19
    • US351424
    • 1999-07-12
    • Daniel A. KoosSung C. KimGurtej S. Sandhu
    • Daniel A. KoosSung C. KimGurtej S. Sandhu
    • B24B1/00B24B37/04H01L21/306H01L21/3105H01L21/321
    • H01L21/3212B24B37/042B24B37/105H01L21/31053
    • A method of planarizing a substrate employs two separate chemical mechanical polishing (CMP) steps. In the first CMP step, the substrate is polished using a first CMP slurry solution and a polishing pad. A diluting solution is then applied to the polishing pad to remove slurry of the first CMP step. In the second CMP step, after applying the diluting solution to the polishing pad to remove the first slurry, second CMP slurry solution is applied to the polishing pad to facilitate additional planarization of the substrate. In a particular embodiment of this invention, the diluting solution comprises a buffer solution having a pH level corresponding to a pH level of one of the first or second CMP slurry solution. In accordance with another aspect of this embodiment, a plurality of different diluting solutions are applied to the polishing pad intermediate the respective first and second CMP steps.
    • 平面化衬底的方法采用两个单独的化学机械抛光(CMP)步骤。 在第一CMP步骤中,使用第一CMP浆液和抛光垫对衬底进行抛光。 然后将稀释溶液施加到抛光垫上以除去第一CMP步骤的浆料。 在第二CMP步骤中,在将稀释溶液施加到抛光垫以除去第一浆料之后,将第二CMP浆料溶液施加到抛光垫上以促进衬底的附加平面化。 在本发明的一个具体实施方案中,稀释溶液包含具有对应于第一或第二CMP浆料溶液之一的pH值的pH值的缓冲溶液。 根据本实施例的另一方面,在相应的第一和第二CMP步骤之前,将多种不同的稀释溶液施加到抛光垫。
    • 10. 发明授权
    • Sputtering with collinator cleaning within the sputtering chamber
    • 用溅射室内的校准器清洗溅射
    • US5409587A
    • 1995-04-25
    • US123603
    • 1993-09-16
    • Gurtej S. SandhuSung C. KimDavid J. Kubista
    • Gurtej S. SandhuSung C. KimDavid J. Kubista
    • C23C14/34C23C14/56
    • H01J37/32862C23C14/34C23C14/564H01J37/3447
    • A method of sputtering material onto semiconductor wafers includes: a) providing a sputtering chamber with a sputtering target, a wafer supporting chuck having a supported first wafer, and a collimator positioned between the target and first wafer for filtering material sputtered from the target onto the first wafer; b) providing ionized sputtering atoms within the chamber; c) bombarding the target with the ionized sputtering atoms to dislodge target atoms; d) passing the dislodged target atoms through collimator openings and onto the first wafer, the dislodged target atoms coating the collimator and openings passing therethrough; e) removing the sputter deposited first wafer from the sputtering chamber without breaking vacuum; f) after removing the sputtered first wafer, cleaning the collimator within the chamber without breaking vacuum between removal of the first wafer and the cleaning of the collimator within the chamber; and g) after cleaning of the collimator within the chamber, providing a second wafer on the wafer supporting chuck within the chamber without breaking vacuum between the cleaning of the collimator and the providing of the second wafer in the chamber; and thereafter sputter depositing target atoms onto the second wafer. The cleaning comprises providing the collimator with a negative potential effective to attract bombarding ionized sputtering atoms to dislodgingly clean target atoms from the collimator. The cleaning is to a degree sufficient to render collimator service lifetime at least equal to that of the sputtering target. Other cleaning techniques are disclosed.
    • 将材料溅射到半导体晶片上的方法包括:a)提供具有溅射靶的溅射室,具有受支撑的第一晶片的晶片支撑卡盘和位于靶和第一晶片之间的准直器,用于将从目标溅射的材料过滤到 第一片; b)在室内提供电离溅射原子; c)用电离溅射原子轰击靶,以去除靶原子; d)将移动的靶原子通过准直器开口并移动到第一晶片上,移动的靶原子涂覆准直器和通过其的开口; e)从溅射室除去溅射沉积的第一晶片而不破坏真空; f)在去除溅射的第一晶片之后,清洁腔室内的准直器而不会在移除第一晶片和清洁腔室内的准直器之间破坏真空; 以及g)在腔室中清洁准直器之后,在腔室内的晶片支撑卡盘上提供第二晶片,而不会在准直器的清洁和在腔室中提供第二晶片之间破坏真空; 然后将目标原子溅射到第二晶片上。 清洁包括为准直仪提供有效吸引轰击电离溅射原子以有效地从准直器中去除目标原子的负电位。 清洁足够使准直器使用寿命至少等于溅射靶的寿命。 公开了其他清洁技术。