会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明授权
    • Network interface architecture for a packet switch communication system
    • 分组交换机通信系统的网络接口架构
    • US5524007A
    • 1996-06-04
    • US165718
    • 1993-12-13
    • Richard E. WhiteDale R. BuchholzThomas A. FreeburgLisa B. Johanson
    • Richard E. WhiteDale R. BuchholzThomas A. FreeburgLisa B. Johanson
    • G06F13/42H04B1/16H04B1/38H04L12/56H04L12/64H04M1/73H04W92/02H04L12/40
    • H04W92/02G06F13/423H04B1/1615H04B1/38H04J3/0697H04L12/56H04L12/64H04L12/6402H04W52/0245
    • An improved network interface architecture for a packet switch provides for the combination of both voice and data in a single switch using a common packet structure. It allows for the dynamic allocation of bandwidth based on system loading. This includes not only bandwidth within the voice or data areas of the frame, but also between the voice and data portions. The network interface (NI) provides a mechanism (the NI-Bus) of passing all packets through the Network Interface or allowing the packet devices to directly transfer packets between one another. The bandwidth allocation can easily be changed because the control and data memories are synchronized to one another. The network interface architecture, according to the invention, allows for the data packets and the control of bandwidth allocation to be controlled by a single switching device. It synchronizes the transfer of the data and the allocation of bus bandwidth. The control of the packet devices can be controlled at a very high bit rate such as, for example, 40 Mbps. It also allows packet devices to directly transfer packets. It allows for easy re-allocation of bandwidth through the use of the NI Base Registers.
    • 用于分组交换机的改进的网络接口架构使用公共分组结构在单个交换机中提供语音和数据的组合。 它允许基于系统加载的带宽的动态分配。 这不仅包括帧的语音或数据区域内的带宽,还包括语音和数据部分之间的带宽。 网络接口(NI)提供了通过网络接口传递所有数据包或允许数据包设备在彼此之间直接传输数据包的机制(NI-Bus)。 带宽分配可以容易地改变,因为控制和数据存储器彼此同步。 根据本发明的网络接口架构允许数据分组和带宽分配的控制由单个交换设备控制。 它同步数据的传输和总线带宽的分配。 可以以非常高的比特率(例如40Mbps)来控制分组设备的控制。 它还允许数据包设备直接传输数据包。 它允许通过使用NI基本寄存器轻松重新分配带宽。
    • 6. 发明授权
    • Packet handling method
    • 数据包处理方法
    • US5517500A
    • 1996-05-14
    • US165784
    • 1993-06-21
    • Richard E. WhiteDale R. BuchhlzThomas A. FreeburgLisa B. Johanson
    • Richard E. WhiteDale R. BuchhlzThomas A. FreeburgLisa B. Johanson
    • G06F13/42H04B1/16H04B1/38H04L12/56H04L12/64H04M1/73H04W92/02H04L12/40
    • H04W92/02G06F13/423H04B1/1615H04B1/38H04J3/0697H04L12/56H04L12/64H04L12/6402H04W52/0245
    • An improved network interface architecture for a packet switch provides for the combination of both voice and data in a single switch using a common packet structure. It allows for the dynamic allocation of bandwidth based on system loading. This includes not only bandwidth within the voice or data areas of the frame, but also between the voice and data portions. The network interface (NI) provides a method (the NI-Bus) or passing all packets through the Network Interface or allowing the packet devices to directly transfer packets between one another. The bandwidth allocation can easily be changed because the control and data memories are synchronized to one another. The network interface architecture, according to the invention, allows for the data packets and the control of bandwidth allocation to be controlled by a single switching device. It synchronizes the transfer of the data and the allocation of bus bandwidth. The control of the packet devices can be controlled at a very high bit rate such as, for example, 40 Mbps. It also allows packet devices to directly transfer packets. It allows for easy re-allocation of bandwidth through the use of the NI Base Registers.
    • 用于分组交换机的改进的网络接口架构使用公共分组结构在单个交换机中提供语音和数据的组合。 它允许基于系统加载的带宽的动态分配。 这不仅包括帧的语音或数据区域内的带宽,还包括语音和数据部分之间的带宽。 网络接口(NI)提供了一种方法(NI-Bus)或通过网络接口传递所有数据包,或者允许数据包设备之间直接传输数据包。 带宽分配可以容易地改变,因为控制和数据存储器彼此同步。 根据本发明的网络接口架构允许数据分组和带宽分配的控制由单个交换设备控制。 它同步数据的传输和总线带宽的分配。 可以以非常高的比特率(例如40Mbps)来控制分组设备的控制。 它还允许数据包设备直接传输数据包。 它允许通过使用NI基本寄存器轻松重新分配带宽。
    • 7. 发明授权
    • Wireless in-building telecommunications system for voice and data
communications
    • 用于语音和数据通信的无线建筑内电信系统
    • US5475681A
    • 1995-12-12
    • US166194
    • 1994-01-31
    • Richard E. WhiteThomas A. FreeburgJames J. BerkenRoy T. OgasawaraJames E. MitzlaffGregory J. Bedlek
    • Richard E. WhiteThomas A. FreeburgJames J. BerkenRoy T. OgasawaraJames E. MitzlaffGregory J. Bedlek
    • G06F13/42H04B1/16H04B1/38H04L12/56H04L12/64H04M1/73H04W92/02H04B7/15H04L12/403
    • H04W92/02G06F13/423H04B1/1615H04B1/38H04L12/56H04L12/64H04L12/6402H04W52/0245
    • An improved network interface architecture for a packet switch provides a mechanism for handling voice and data packets. Bandwidth allocation can be changed because control and data memories are synchronized to one another. A hierarchical addressing technique is employed to enhance flexibility in handling packet information. This method permits packet message data and certain packet control data to be stored in memory locations without having to be duplicated at a different memory location prior to transmission of the packet. In an exemplary wireless TDMA packet network a control module (CM) sends a time stamp relative to the beginning of its frame in a synchronization packet allowing each of a plurality of user modules (UM) to maintain synchronization relative to the CM. The CM uses a plurality of directional antennas and transmits the synchronization packets over each antenna over a predetermined number of frames. The UMs use a receive time stamp to identify the beginning of a received synchronization packet. The difference between the time stamps combined with a delay constant is used by the UMs to adjust time synchronization to the CM frame. Packets are communicated between the controller and the peripherals at the UM and CM over a bus using a communication protocol which increases the efficiencies of packet communications by allowing additional direct command lines between the communications controller and peripherals.
    • 用于分组交换机的改进的网络接口架构提供了用于处理语音和数据分组的机制。 可以改变带宽分配,因为控制和数据存储器彼此同步。 采用分层寻址技术来提高处理分组信息的灵活性。 该方法允许分组消息数据和某些分组控制数据存储在存储器位置中,而不必在传输分组之前在不同的存储器位置被复制。 在示例性无线TDMA分组网络中,控制模块(CM)在同步分组中相对于其帧的开始发送时间戳,允许多个用户模块(UM)中的每一个相对于CM保持同步。 CM使用多个定向天线,并在预定数量的帧上通过每个天线发送同步分组。 UM使用接收时间戳来识别接收到的同步分组的开始。 时间戳与延迟常数之间的差异由UM用于调整与CM帧的时间同步。 通过使用通信协议的通信协议,在UM和CM之间的控制器和外设之间通过总线传送数据包,通过允许通信控制器和外围设备之间的附加直接命令行来提高数据包通信的效率。
    • 9. 发明授权
    • Encryption apparatus
    • 加密装置
    • US5008938A
    • 1991-04-16
    • US490900
    • 1990-03-09
    • Thomas A. FreeburgRichard E. White
    • Thomas A. FreeburgRichard E. White
    • H04L9/24H04L9/18
    • H04L9/065H04L2209/12
    • An encryption circuit that operates with substantially zero delay. Using programmable keys and polynomials, the encryption algorithm can be constantly changed to thwart any unintended receiving parties from decoding the data. A key (101) and a polynomial (102) are loaded into registers. The key is then loaded into a shift register and shifted through XOR gates (106) at a programmable rate. The other input of the XOR gates come from the result of ANDing (103) a disable signal, the polynomial register (102), and the last stage of the shift register (104). Eight bits of the shift register outputs are XOR'ed with the input data to be encrypted. The output of these XOR gates (105) is the encrypted data.
    • 一种以大致零延迟运行的加密电路。 使用可编程键和多项式,可以不断更改加密算法以阻止任何非预期的接收方解码数据。 密钥(101)和多项式(102)被加载到寄存器中。 然后将密钥加载到移位寄存器中,并以可编程速率移位XOR门(106)。 XOR门的另一个输入来自于(103)禁用信号,多项式寄存器(102)和移位寄存器(104)的最后一级的结果。 移位寄存器输出的8位将与要加密的输入数据进行异或运算。 这些XOR门(105)的输出是加密数据。