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    • 1. 发明授权
    • Wireless in-building telecommunications system for voice and data
communications
    • 用于语音和数据通信的无线建筑内电信系统
    • US5475681A
    • 1995-12-12
    • US166194
    • 1994-01-31
    • Richard E. WhiteThomas A. FreeburgJames J. BerkenRoy T. OgasawaraJames E. MitzlaffGregory J. Bedlek
    • Richard E. WhiteThomas A. FreeburgJames J. BerkenRoy T. OgasawaraJames E. MitzlaffGregory J. Bedlek
    • G06F13/42H04B1/16H04B1/38H04L12/56H04L12/64H04M1/73H04W92/02H04B7/15H04L12/403
    • H04W92/02G06F13/423H04B1/1615H04B1/38H04L12/56H04L12/64H04L12/6402H04W52/0245
    • An improved network interface architecture for a packet switch provides a mechanism for handling voice and data packets. Bandwidth allocation can be changed because control and data memories are synchronized to one another. A hierarchical addressing technique is employed to enhance flexibility in handling packet information. This method permits packet message data and certain packet control data to be stored in memory locations without having to be duplicated at a different memory location prior to transmission of the packet. In an exemplary wireless TDMA packet network a control module (CM) sends a time stamp relative to the beginning of its frame in a synchronization packet allowing each of a plurality of user modules (UM) to maintain synchronization relative to the CM. The CM uses a plurality of directional antennas and transmits the synchronization packets over each antenna over a predetermined number of frames. The UMs use a receive time stamp to identify the beginning of a received synchronization packet. The difference between the time stamps combined with a delay constant is used by the UMs to adjust time synchronization to the CM frame. Packets are communicated between the controller and the peripherals at the UM and CM over a bus using a communication protocol which increases the efficiencies of packet communications by allowing additional direct command lines between the communications controller and peripherals.
    • 用于分组交换机的改进的网络接口架构提供了用于处理语音和数据分组的机制。 可以改变带宽分配,因为控制和数据存储器彼此同步。 采用分层寻址技术来提高处理分组信息的灵活性。 该方法允许分组消息数据和某些分组控制数据存储在存储器位置中,而不必在传输分组之前在不同的存储器位置被复制。 在示例性无线TDMA分组网络中,控制模块(CM)在同步分组中相对于其帧的开始发送时间戳,允许多个用户模块(UM)中的每一个相对于CM保持同步。 CM使用多个定向天线,并在预定数量的帧上通过每个天线发送同步分组。 UM使用接收时间戳来识别接收到的同步分组的开始。 时间戳与延迟常数之间的差异由UM用于调整与CM帧的时间同步。 通过使用通信协议的通信协议,在UM和CM之间的控制器和外设之间通过总线传送数据包,通过允许通信控制器和外围设备之间的附加直接命令行来提高数据包通信的效率。
    • 3. 发明授权
    • Signal integrity control technique for an RF communication system
    • RF通信系统的信号完整性控制技术
    • US4998289A
    • 1991-03-05
    • US203363
    • 1988-06-02
    • Duane C. RabeJames E. Mitzlaff
    • Duane C. RabeJames E. Mitzlaff
    • H04B1/10H04W16/14H04W24/00H04W28/22
    • H04W16/14H04B1/1027H04B1/1081H04W24/00H04W28/22
    • An interference detecting circuit is used in a cellular radiotelephone communication system which employs angular modulated frequencies in order to determine when to change the communication process so as to maintain the integrity of the communication path. For example, when the circuit detects an excessive amount of multipath or co-channel interference on a channel serving an active call, the system may decrease the effective data bit rate. The circuit includes a logarithmic envelope detector for receiving a channel's angular modulated signal and for providing a log envelope output signal, a high pass filter for removing a particular range of undesired frequencies from the log envelope output signal, and a level detector for indicating the level of filtered output signal. The output of the level detector represents the amount of interference on the angular modulated frequency signal. A microcomputer analyzes the amount of interference to determine when such communication process changes are desired.
    • 在蜂窝无线电话通信系统中使用干扰检测电路,其采用角度调制频率,以便确定何时改变通信过程,以便保持通信路径的完整性。 例如,当电路在服务于主动呼叫的信道上检测到过多的多径或同信道干扰时,系统可能会降低有效数据比特率。 电路包括对数包络检测器,用于接收通道的角度调制信号并提供对数包络输出信号,高通滤波器用于从对数包络输出信号去除不期望频率的特定范围;以及电平检测器,用于指示电平 的滤波输出信号。 电平检测器的输出表示角调制频率信号上的干扰量。 微机分析干扰量以确定何时需要这种通信过程改变。
    • 5. 发明授权
    • RF power amplifier protection
    • 射频功率放大器保护
    • US07486144B2
    • 2009-02-03
    • US11683069
    • 2007-03-07
    • James E. MitzlaffJoseph F. Robin, Jr.
    • James E. MitzlaffJoseph F. Robin, Jr.
    • H03F1/52
    • H04B1/0466H03F1/523
    • A circuit and method for protecting a radio frequency power amplifier against peak drain voltage. A detector circuit has an input connected to a drain of a power transistor of an amplification stage of the power amplifier to detect a peak drain voltage therefrom. The detector circuit outputs a protection signal when the detected peak drain voltage exceeds a predetermined reference level. A shutdown circuit is coupled to the detector circuit and inputs the protection signal therefrom. The protection signal is used to remove a gate bias of at least one amplification stage of the power amplifier. High frequency components are used in the detector and protection circuits to immediately reduce the drain voltage from one or more of the amplification stages.
    • 一种用于保护射频功率放大器免受峰值漏极电压的电路和方法。 检测器电路具有连接到功率放大器的放大级的功率晶体管的漏极的输入端,以从其检测峰值漏极电压。 当检测到的峰值漏极电压超过预定的参考电平时,检测器电路输出保护信号。 关断电路耦合到检测器电路并从其输入保护信号。 保护信号用于去除功率放大器的至少一个放大级的栅极偏置。 在检测器和保护电路中使用高频分量来立即降低来自一个或多个放大级的漏极电压。
    • 7. 发明授权
    • High efficiency RF power amplifier
    • 高效射频功率放大器
    • US4717884A
    • 1988-01-05
    • US852045
    • 1986-04-14
    • James E. Mitzlaff
    • James E. Mitzlaff
    • H03F3/217H03F3/60
    • H03F3/217H03F3/2176H03F2200/402
    • A high efficiency RF power amplifier is disclosed in which a field effect transistor is operated in a class F mode. A third harmonic quarterwave open circuit transmission line stub having a Z.sub.O adjusted to provide capacitance series resonant with transistor inductance at the second harmonic is coupled to the transistor output lead to produce a low impedance at the channel drain of the transistor. Parallel resonance of the transistor die capacitance and interconnect inductance coupled to ground by the transmission line produces a third harmonic high impedance at the channel drain. Further lowpass output matching circuitry provides a constantly increasing impedance magnitude from the transistor die to the load and provides load mismatch isolation to the second and third harmonic impedances at the channel drain.
    • 公开了一种高效率RF功率放大器,其中场效应晶体管以F类模式工作。 具有ZO调节以提供在二次谐波处的晶体管电感的电容串联谐振的三次谐波四分之一波长开路传输线短路被耦合到晶体管输出引线,以在晶体管的沟道漏极处产生低阻抗。 通过传输线耦合到地的晶体管管芯电容和互连电感的并联谐振在沟道漏极处产生三次谐波高阻抗。 进一步的低通输出匹配电路提供从晶体管管芯到负载的不断增加的阻抗幅度,并且在沟道漏极处提供与第二和第三谐波阻抗的负载失配隔离。
    • 9. 发明申请
    • RF POWER AMPLIFIER PROTECTION
    • 射频功率放大器保护
    • US20080218271A1
    • 2008-09-11
    • US11683069
    • 2007-03-07
    • James E. MitzlaffJoseph F. Robin
    • James E. MitzlaffJoseph F. Robin
    • H03F1/52
    • H04B1/0466H03F1/523
    • A circuit and method for protecting a radio frequency power amplifier against peak drain voltage. A detector circuit has an input connected to a drain of a power transistor of an amplification stage of the power amplifier to detect a peak drain voltage therefrom. The detector circuit outputs a protection signal when the detected peak drain voltage exceeds a predetermined reference level. A shutdown circuit is coupled to the detector circuit and inputs the protection signal therefrom. The protection signal is used to remove a gate bias of at least one amplification stage of the power amplifier. High frequency components are used in the detector and protection circuits to immediately reduce the drain voltage from one or more of the amplification stages.
    • 一种用于保护射频功率放大器免受峰值漏极电压的电路和方法。 检测器电路具有连接到功率放大器的放大级的功率晶体管的漏极的输入端,以从其检测峰值漏极电压。 当检测到的峰值漏极电压超过预定的参考电平时,检测器电路输出保护信号。 关断电路耦合到检测器电路并从其输入保护信号。 保护信号用于去除功率放大器的至少一个放大级的栅极偏置。 在检测器和保护电路中使用高频分量来立即降低来自一个或多个放大级的漏极电压。
    • 10. 发明授权
    • Wideband feed forward linear power amplifier
    • 宽带前馈线性功率放大器
    • US07091781B2
    • 2006-08-15
    • US10977455
    • 2004-10-29
    • James E. Mitzlaff
    • James E. Mitzlaff
    • H03F1/26
    • H03F1/3223
    • A circuit is provided, having a feed forward linear power amplifier configured with two or more error correction loops (225–235, 255–265). Each of the error correction loops includes a band pass filter (237, 257). Each of the band pass filters (237, 257) is tuned to a different frequency range. A controllable frequency oscillator (220) can be coupled to an input of the error correction loops. A controller sweeps the frequency of the controllable frequency oscillator over the frequency range corresponding to each of the band pass filters (237, 257).
    • 提供了一种具有配置有两个或更多个纠错环路(225-235,255-265)的前馈线性功率放大器的电路。 每个纠错环路包括带通滤波器(237,257)。 每个带通滤波器(237,257)被调谐到不同的频率范围。 可控频率振荡器(220)可耦合到纠错环路的输入端。 控制器在对应于每个带通滤波器(237,257)的频率范围上扫描可控频率振荡器的频率。