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    • 2. 发明授权
    • Semiconductor integrated circuit memory
    • 半导体集成电路存储器
    • US4954866A
    • 1990-09-04
    • US247250
    • 1988-09-21
    • Hirotoshi TanakaHiroki YamashitaNoboru MasudaJunji ShigetaYasunari UmemotoOsamu Kagaya
    • Hirotoshi TanakaHiroki YamashitaNoboru MasudaJunji ShigetaYasunari UmemotoOsamu Kagaya
    • H01L27/06H01L27/105H01L27/11
    • H01L27/1104H01L27/0605H01L27/1116H01L27/105
    • A semiconductor integrated circuit memory is disclosed in which a first impurity-doped layer for making circuit elements such as MESFET's and a second impurity-doped layer opposite in conductivity type to the first impurity-doped layer are formed in a semi-insulating substrate in such a manner that the second impurity-doped layer is formed under and between circuit elements for making up a memory cell array part and a peripheral circuit part, and is divided into at least first and second regions. For example, the first region formed under and between the circuit elements of the memory cell array part is made of a P-type layer which is high in carrier density, and the second region formed under and between the circuit elements of the peripheral circuit part is made of a P-type layer which is low in carrier density. The high carrier-density P-type layer formed under the memory cell array part allows a memory cell having a minimum critical charge for alpha-particles to gain satisfactory alpha-particle immunity even when the memory cell is made fine in size. Further, the low carrier-density P-type layer formed under the peripheral circuit part having a critical charge larger than that of the memory cell can improve the alpha-particle immunity of the peripheral circuit part and can suppress an increase in parasitic capacitance at the peripheral circuit part to maintain the high-speed operation of the memory.
    • 公开了一种半导体集成电路存储器,其中在半绝缘衬底中形成用于制造电路元件的第一杂质掺杂层,例如MESFET和与第一杂质掺杂层的导电类型相反的第二杂质掺杂层 第二杂质掺杂层形成在用于构成存储单元阵列部分的电路元件和外围电路部分之间的方式,并且被划分为至少第一和第二区域。 例如,形成在存储单元阵列部分的电路元件之下和之间的第一区域由载流子密度高的P型层制成,并且第二区域形成在外围电路部分的电路元件之下 由载流子浓度低的P型层构成。 形成在存储单元阵列部分下方的高载流子密度P型层允许具有最小临界电荷的存储单元获得满意的α粒子免疫,即使当存储单元的尺寸精细时。 此外,形成在具有大于存储单元的临界电荷的外围电路部分下的低载流子密度P型层可以改善外围电路部分的α粒子免疫力,并且可以抑制在外部电路部分的寄生电容的增加 外围电路部分保持高速运行的内存。
    • 3. 发明授权
    • High-frequency power amplification module and radio communication device
    • 高频功率放大模块和无线通信设备
    • US06636118B1
    • 2003-10-21
    • US09914678
    • 2001-11-14
    • Cyushiro KusanoEiichi HaseHideyuki OnoOsamu KagayaYasunari UmemotoTakahiro FujitaKiichi Yamashita
    • Cyushiro KusanoEiichi HaseHideyuki OnoOsamu KagayaYasunari UmemotoTakahiro FujitaKiichi Yamashita
    • H03F304
    • H01L27/0255H03F1/52H03F3/195H03F2200/444H03F2203/21178
    • In a high frequency power amplifier module of a multi-stage structure in which a plurality of heterojunction bipolar transistors (npn-type HBTs) are cascade-connected, a protection circuit in which a plurality of pn junction diodes are connected in series is connected between the collector and emitter of each HBT. The p-side is connected to the collector side, and the n-side is connected to the emitter side. A protection circuit in which pn junction diodes of the number equal to or smaller than that of the pn junction diodes are connected in series is connected between the base and the emitter. The p-side is connected to the base side, and the n-side is connected to the emitter side. With the configuration, in the case where an overvoltage is applied across the collector and emitter due to a fluctuation in load on the antenna side, the collector terminal is clamped by an ON-state voltage of the protection circuits, so that the HBT can be prevented from being destroyed. Since the similar protection circuit is assembled between the base and emitter, even when the operator touches the module at the time of manufacturing the high frequency power amplifier module, the HBT can be prevented from being destroyed by the clamping effect of the protection circuit between the base and emitter and the protection circuit between the collector and emitter. Thus, an improved manufacturing yield of the high frequency power amplifier module and a wireless communication apparatus can be achieved, and destruction caused by fluctuation in load impedance of the wireless communication apparatus can be prevented.
    • 在其中级联多个异质结双极型晶体管(npn型HBT)的多级结构的高频功率放大器模块中,将多个pn结二极管串联连接的保护电路连接在 每个HBT的集电极和发射极。 p侧连接到集电极侧,并且n侧连接到发射极侧。 其中pn结二极管的数量等于或小于pn结二极管串联的保护电路连接在基极和发射极之间。 p侧连接到基极侧,并且n侧连接到发射极侧。 通过该结构,由于天线侧的负载的波动,在集电极和发射极两端施加过电压的情况下,集电端子被保护电路的导通状态电压钳位,HBT可以 防止被摧毁。 由于类似的保护电路组装在基极和发射极之间,即使在制造高频功率放大器模块时操作者接触模块时,也可以防止HBT被保护电路的钳位效应所破坏 基极和发射极以及集电极和发射极之间的保护电路。 因此,可以实现高频功率放大器模块和无线通信装置的制造成品率的提高,并且可以防止由无线通信装置的负载阻抗的波动引起的破坏。
    • 5. 发明授权
    • Differential transmission circuit, optical module, and information processing system
    • 差分传输电路,光模块和信息处理系统
    • US08633399B2
    • 2014-01-21
    • US13403048
    • 2012-02-23
    • Osamu Kagaya
    • Osamu Kagaya
    • H05K1/11
    • H01P3/08H01P1/02H01P3/085H01P3/088H05K1/111
    • A differential transmission circuit includes a pair of transmission line conductors and a ground conductor layer, wherein the pair of transmission line conductors include a first straight line region where both the pair of transmission line conductors extend in parallel to each other in a first direction with a first width in a first layer, a first cross region where one of the pair of transmission line conductors is formed in the first layer, the other thereof is formed in a second layer, and the pair of transmission line conductors cross the each other in a three-dimensional manner, the first cross region being disposed on the front side of the first straight line region, and wherein each of the widths of the pair of transmission line conductors in the first cross region is smaller than the first width.
    • 差分传输电路包括一对传输线导体和接地导体层,其中所述一对传输线导体包括第一直线区域,其中所述一对传输线导体在第一方向上彼此平行延伸, 在第一层中的第一宽度,在第一层中形成一对传输线导体中的一个的第一交叉区域,另一个形成在第二层中,并且一对传输线导体以 第一交叉区域设置在第一直线区域的前侧,并且其中,第一交叉区域中的一对传输线导体的宽度小于第一宽度。