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1. 发明申请

US20120001156A1 ORGANIC LIGHT EMITTING DIODE DISPLAY 审中-公开
标题翻译：有机发光二极管显示
公开(公告)号：US20120001156A1
公开(公告)日：2012-01-05
申请号：US13077045
申请日：2011-03-31
申请人： Kyu-Sik CHO , Won-Kyu LEE , Tae-Hoon YANG , Byoung-Kwon CHOO , Sang-Ho MOON , Bo-Kyung CHOI , Yong-Hwan PARK , Joon-Hoo CHOI , Min-Chul SHIN , Yun-Gyu LEE
发明人： Kyu-Sik CHO , Won-Kyu LEE , Tae-Hoon YANG , Byoung-Kwon CHOO , Sang-Ho MOON , Bo-Kyung CHOI , Yong-Hwan PARK , Joon-Hoo CHOI , Min-Chul SHIN , Yun-Gyu LEE
IPC分类号： H01L51/52
CPC分类号： H01L27/3279 , H01L27/124 , H01L27/1248 , H01L27/3244 , H01L27/3262 , H01L27/3265
摘要： An organic light emitting diode display is disclosed. The organic light emitting diode display includes: a substrate including a first region and a second region, a first gate electrode formed over the first region, a second gate electrode formed over the second region, a first gate insulator formed on the first gate electrode, a second gate insulator formed on the second gate electrode, a first semiconductor layer formed on the first gate insulator, the first semiconductor layer including a first channel region, a second semiconductor layer formed on the second gate insulator, the second semiconductor layer including a second channel region, an interlayer insulator formed over the substrate and over at least part of the first and second semiconductor layers, a first etching stop layer formed over the first channel region and surrounded by the interlayer insulator, a second etching stop layer formed over the second channel region and surrounded by the interlayer insulator, a first source electrode and a first drain electrode contacting the first semiconductor layer through the interlayer insulator, and a second source electrode and a second drain electrode contacting the second semiconductor layer through the interlayer insulator.
摘要翻译：公开了一种有机发光二极管显示器。有机发光二极管显示器包括：包括第一区域和第二区域的基板，形成在第一区域上的第一栅极电极，形成在第二区域上的第二栅极电极，形成在第一栅电极上的第一栅极绝缘体，形成在所述第二栅电极上的第二栅极绝缘体，形成在所述第一栅极绝缘体上的第一半导体层，所述第一半导体层包括第一沟道区，形成在所述第二栅极绝缘体上的第二半导体层，所述第二半导体层包括第二栅极绝缘体，沟道区域，形成在所述衬底上并且在所述第一和第二半导体层的至少一部分上方的层间绝缘体，形成在所述第一沟道区域上并被所述层间绝缘体包围的第一蚀刻停止层，形成在所述第二沟槽区上的第二蚀刻停止层沟道区域并被层间绝缘体包围，第一源电极和与其接触的第一漏电极 e通过层间绝缘体的第一半导体层，以及通过层间绝缘体与第二半导体层接触的第二源电极和第二漏电极。

2. 发明申请

US20130164872A1 METHOD OF FABRICATING ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE 失效
标题翻译：制造有机发光二极管显示装置的方法
公开(公告)号：US20130164872A1
公开(公告)日：2013-06-27
申请号：US13771656
申请日：2013-02-20
申请人： Yong-Hwan PARK , Kyu-Sik CHO , Sang-Ho MOON , Byoung-Kwon CHOO , Min-Chul SHIN , Tae-Hoon YANG , Bo-Kyung CHOI , Won-Kyu LEE , Yun-Gyu LEE , Joon-Hoo CHOI
发明人： Yong-Hwan PARK , Kyu-Sik CHO , Sang-Ho MOON , Byoung-Kwon CHOO , Min-Chul SHIN , Tae-Hoon YANG , Bo-Kyung CHOI , Won-Kyu LEE , Yun-Gyu LEE , Joon-Hoo CHOI
IPC分类号： H01L51/56
CPC分类号： H01L27/1251 , H01L27/1277 , H01L27/1285 , H01L27/3262
摘要： An organic light emitting diode display device and a method of manufacturing thereof, the device including a substrate, the substrate including a pixel part and a circuit part; a first semiconductor layer and a second semiconductor layer on the pixel part of the substrate; a gate insulating layer on an entire surface of the substrate; gate electrodes on the gate insulating layer, the gate electrodes corresponding to the first semiconductor layer and the second semiconductor layer, respectively; source/drain electrodes insulated from the gate electrodes, the source/drain electrodes being connected to the first and second semiconductor layers, respectively; a first electrode connected to the source/drain electrodes of the first semiconductor layer; an organic layer on the first electrode; a second layer on the organic layer; and a metal catalyst layer under the first semiconductor layer.
摘要翻译：一种有机发光二极管显示装置及其制造方法，所述装置包括基板，所述基板包括像素部分和电路部分; 在所述基板的像素部分上的第一半导体层和第二半导体层; 在所述基板的整个表面上的栅极绝缘层; 栅绝缘层上的栅电极，分别对应于第一半导体层和第二半导体层的栅电极; 与栅电极绝缘的源/漏电极，源/漏电极分别连接到第一和第二半导体层; 连接到第一半导体层的源极/漏极的第一电极; 第一电极上的有机层; 有机层上的第二层; 以及在第一半导体层下面的金属催化剂层。

3. 发明申请

US20110291122A1 DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20110291122A1
公开(公告)日：2011-12-01
申请号：US13114585
申请日：2011-05-24
申请人： Min-Chul SHIN , Kyu-Sik CHO , Won-Kyu LEE , Tae-Hoon YANG , Byoung-Kwon CHOO , Yun-Gyu LEE , Yong-Hwan PARK , Sang-Ho MOON , Bo-Kyung CHOI
发明人： Min-Chul SHIN , Kyu-Sik CHO , Won-Kyu LEE , Tae-Hoon YANG , Byoung-Kwon CHOO , Yun-Gyu LEE , Yong-Hwan PARK , Sang-Ho MOON , Bo-Kyung CHOI
IPC分类号： H01L33/62
CPC分类号： H01L27/3279 , H01L27/3248
摘要： A display device with the substrate divided into three areas. A semiconductor layer is formed in the first second areas and includes a channel area and source/drain areas; a gate insulating layer formed on the semiconductor layer in an area corresponding to the channel area; and a gate electrode formed on the gate insulating layer. The source/drain electrodes contact the source/drain areas, respectively; a pixel electrode is formed in the same layer but in a third area; an interlayer insulating layer is formed on a whole surface of the substrate including the formed structures; and a gate line is formed on the interlayer insulating layer and is electrically connected to a gate electrode of the first area through a via contact hole of the interlayer insulating layer.
摘要翻译：具有分为三个区域的基板的显示装置。半导体层形成在第一第二区域中，并且包括沟道区域和源极/漏极区域; 栅极绝缘层，形成在与沟道区对应的区域中的半导体层上; 以及形成在栅极绝缘层上的栅电极。源极/漏极电极分别接触源极/漏极区域; 像素电极形成在同一层中，但在第三区域中形成; 在包括所形成的结构的基板的整个表面上形成层间绝缘层; 并且在所述层间绝缘层上形成栅极线，并且通过所述层间绝缘层的通孔接触孔与所述第一区域的栅电极电连接。

4. 发明申请

US20110263107A1 METHOD OF FORMING POLYCRYSTALLINE SILICON LAYER AND ATOMIC LAYER DEPOSITION APPARATUS USED FOR THE SAME 有权
标题翻译：形成多晶硅层的方法和用于其的原子沉积沉积装置
公开(公告)号：US20110263107A1
公开(公告)日：2011-10-27
申请号：US13177936
申请日：2011-07-07
申请人： Yun-Mo CHUNG , Ki-Yong LEE , Min-Jae JEONG , Jin-Wook SEO , Jong-Won HONG , Heung-Yeol NA , Eu-Gene KANG , Seok-Rak CHANG , Tae-Hoon YANG , Ji-Su AHN , Young-Dae KIM , Byoung-Keon PARK , Kil-Won LEE , Dong-Hyun LEE , Sang-Yon YOON , Jong-Ryuk PARK , Bo-Kyung CHOI , Maxim LISACHENKO
发明人： Yun-Mo CHUNG , Ki-Yong LEE , Min-Jae JEONG , Jin-Wook SEO , Jong-Won HONG , Heung-Yeol NA , Eu-Gene KANG , Seok-Rak CHANG , Tae-Hoon YANG , Ji-Su AHN , Young-Dae KIM , Byoung-Keon PARK , Kil-Won LEE , Dong-Hyun LEE , Sang-Yon YOON , Jong-Ryuk PARK , Bo-Kyung CHOI , Maxim LISACHENKO
IPC分类号： H01L21/20 , C23C16/48 , C23C16/455 , C23C16/24 , C23C16/04
CPC分类号： H01L21/02532 , C23C14/04 , H01L21/02422 , H01L21/02488 , H01L21/02672
摘要： A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.
摘要翻译：一种形成多晶硅层的方法和用于其的原子层沉积装置。该方法包括在衬底上形成非晶硅层，将具有非晶硅层的衬底暴露于亲水或疏水性气体气氛，在非晶硅层上放置具有至少一个开放和至少一个封闭部分的掩模，照射UV 使用UV灯朝向非晶硅层和掩模发光，在非晶硅层上沉积结晶诱导金属，并退火基板以使非晶硅层结晶成多晶硅层。该方法和装置提供了在多晶硅层的形成中控制种子位置和晶粒尺寸。

5. 发明申请

US20110014755A1 METHOD OF FABRICATING POLYCRYSTALLINE SILICON, TFT FABRICATED USING THE SAME, METHOD OF FABRICATING THE TFT, AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE INCLUDING THE TFT 有权
标题翻译：制造多晶硅的方法，使用其制造的TFT，制造TFT的方法和包括TFT的有机发光二极管显示装置
公开(公告)号：US20110014755A1
公开(公告)日：2011-01-20
申请号：US12891379
申请日：2010-09-27
申请人： Tae-Hoon YANG , Ki-Yong Lee , Jin-Wook Seo , Byoung-Keon Park , Kil-Won Lee
发明人： Tae-Hoon YANG , Ki-Yong Lee , Jin-Wook Seo , Byoung-Keon Park , Kil-Won Lee
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L29/4908 , H01L21/02488 , H01L21/02532 , H01L21/02672 , H01L21/02694 , H01L27/1277 , H01L29/78654
摘要： A method of fabricating a polycrystalline silicon (poly-Si) layer includes providing a substrate, forming an amorphous silicon (a-Si) layer on the substrate, forming a thermal oxide layer to a thickness of about 10 to 50 Å on the a-Si layer, forming a metal catalyst layer on the thermal oxide layer, and annealing the substrate to crystallize the a-Si layer into the poly-Si layer using a metal catalyst of the metal catalyst layer. Thus, the a-Si layer can be crystallized into a poly-Si layer by a super grain silicon (SGS) crystallization method. Also, the thermal oxide layer may be formed during the dehydrogenation of the a-Si layer so that an additional process of forming a capping layer required for the SGS crystallization method can be omitted, thereby simplifying the fabrication process.
摘要翻译：一种制造多晶硅（poly-Si）层的方法包括提供衬底，在衬底上形成非晶硅（a-Si）层，形成厚度约为10〜 Si层，在所述热氧化物层上形成金属催化剂层，并且使所述基板退火以使用所述金属催化剂层的金属催化剂将所述a-Si层结晶成多晶硅层。因此，可以通过超晶硅（SGS）结晶法将a-Si层结晶成多晶硅层。此外，可以在a-Si层的脱氢过程中形成热氧化物层，从而可以省略形成SGS结晶方法所需的另外的形成覆盖层的工艺，从而简化了制造工艺。

6. 发明申请

US20120088340A1 THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND ORGANIC LIGHTING EMITTING DIODE DISPLAY DEVICE INCLUDING THE SAME 有权
标题翻译：薄膜晶体管，其制造方法以及包括其的有机发光二极管显示装置
公开(公告)号：US20120088340A1
公开(公告)日：2012-04-12
申请号：US13333587
申请日：2011-12-21
申请人： Byoung-Keon PARK , Jin-Wook SEO , Tae-Hoon YANG , Kil-Won LEE , Dong-Hyun LEE
发明人： Byoung-Keon PARK , Jin-Wook SEO , Tae-Hoon YANG , Kil-Won LEE , Dong-Hyun LEE
IPC分类号： H01L21/336
CPC分类号： H01L29/78615 , H01L27/1277 , H01L29/66757
摘要： A thin film transistor, a method of fabricating the same, and an organic light emitting diode display device including the same. The thin film transistor includes: a substrate; a semiconductor layer disposed on the substrate, including a channel region, source/drain regions, and a body contact region; a gate insulating layer disposed on the semiconductor layer so as to expose the body contact region; a gate electrode disposed on the gate insulating layer, so as to contact the body contact region; an interlayer insulating layer disposed on the gate electrode; and source/drain electrodes disposed on the interlayer insulating layer and electrically connected to the source/drain regions. The body contact region is formed in an edge of the semiconductor layer.
摘要翻译：薄膜晶体管，其制造方法和包括该薄膜晶体管的有机发光二极管显示装置。薄膜晶体管包括：基板; 设置在所述基板上的半导体层，包括沟道区，源极/漏极区和主体接触区; 栅极绝缘层，设置在所述半导体层上以暴露所述本体接触区域; 栅电极，设置在所述栅极绝缘层上，以与所述主体接触区域接触; 设置在所述栅电极上的层间绝缘层; 以及设置在层间绝缘层上并与源极/漏极区电连接的源极/漏极。体接触区域形成在半导体层的边缘中。

7. 发明申请

US20080315207A1 METHOD OF FABRICATING POLYCRYSTALLINE SILICON, TFT FABRICATED USING THE SAME, METHOD OF FABRICATING THE TFT, AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE INCLUDING THE TFT 有权
标题翻译：制造多晶硅的方法，使用其制造的TFT，制造TFT的方法和包括TFT的有机发光二极管显示装置
公开(公告)号：US20080315207A1
公开(公告)日：2008-12-25
申请号：US12142210
申请日：2008-06-19
申请人： Tae-Hoon YANG , Ki-Yong Lee , Jin-Wook Seo , Byoung-Keon Park , Kil-Won Lee
发明人： Tae-Hoon YANG , Ki-Yong Lee , Jin-Wook Seo , Byoung-Keon Park , Kil-Won Lee
IPC分类号： H01L29/10 , H01L21/20
CPC分类号： H01L29/4908 , H01L21/02488 , H01L21/02532 , H01L21/02672 , H01L21/02694 , H01L27/1277 , H01L29/78654
摘要： A method of fabricating a polycrystalline silicon (poly-Si) layer includes providing a substrate, forming an amorphous silicon (a-Si) layer on the substrate, forming a thermal oxide layer to a thickness of about 10 to 50 Å on the a-Si layer, forming a metal catalyst layer on the thermal oxide layer, and annealing the substrate to crystallize the a-Si layer into the poly-Si layer using a metal catalyst of the metal catalyst layer. Thus, the a-Si layer can be crystallized into a poly-Si layer by a super grain silicon (SGS) crystallization method. Also, the thermal oxide layer may be formed during the dehydrogenation of the a-Si layer so that an additional process of forming a capping layer required for the SGS crystallization method can be omitted, thereby simplifying the fabrication process.
摘要翻译：一种制造多晶硅（poly-Si）层的方法包括提供衬底，在衬底上形成非晶硅（a-Si）层，形成厚度约为10〜 Si层，在所述热氧化物层上形成金属催化剂层，并且使所述基板退火以使用所述金属催化剂层的金属催化剂将所述a-Si层结晶成多晶硅层。因此，通过超晶硅（SGS）结晶法，可以将a-Si层结晶成多晶硅层。此外，可以在a-Si层的脱氢过程中形成热氧化物层，从而可以省略形成SGS结晶方法所需的另外的形成覆盖层的工艺，从而简化了制造工艺。

8. 发明申请

US20070267704A1 METHOD OF FABRICATING THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管的制作方法
公开(公告)号：US20070267704A1
公开(公告)日：2007-11-22
申请号：US11741273
申请日：2007-04-27
申请人： Tae-Hoon YANG , Ki-Yong Lee , Jin-Wook Seo , Byoung-Keon Park
发明人： Tae-Hoon YANG , Ki-Yong Lee , Jin-Wook Seo , Byoung-Keon Park
IPC分类号： H01L29/94 , H01L21/8238
CPC分类号： H01L21/02672 , H01L21/02488 , H01L21/02532 , H01L21/3226 , H01L27/1277 , H01L27/1288
摘要： A method of fabricating a CMOS thin film transistor includes: providing a substrate; forming an amorphous silicon layer on the substrate; performing a first annealing process on the substrate and crystallizing the amorphous silicon layer into a polysilicon layer; patterning the polysilicon layer to form first and second semiconductor layers; implanting first impurities into the first and second semiconductor layers; implanting second impurities into the first or second semiconductor layer; and performing a second annealing process on the semiconductor layers to remove the metal catalyst remaining in the first or second semiconductor layer, on which the second impurities are implanted, wherein the first impurities are implanted at a dose of 6×1013/cm2 to 5×1015/cm2, and the second impurities are implanted at a dose of 1×1011/cm2to 3×1015/cm2.
摘要翻译：制造CMOS薄膜晶体管的方法包括：提供衬底; 在所述基板上形成非晶硅层; 在所述衬底上进行第一退火处理并将所述非晶硅层结晶成多晶硅层; 图案化多晶硅层以形成第一和第二半导体层; 将第一杂质注入到第一和第二半导体层中; 将第二杂质注入第一或第二半导体层; 以及对所述半导体层执行第二退火处理以去除留在其中注入所述第二杂质的所述第一或第二半导体层中的金属催化剂，其中所述第一杂质以6×10 13 / > / cm 2至5×10 15 / cm 2，并且以1×10 11 /次的剂量注入第二杂质 > / cm 2至3×10 15 / cm 2。

9. 发明申请

US20120220084A1 METHOD OF FABRICATING POLYCRYSTALLINE SILICON LAYER, TFT FABRICATED USING THE SAME, METHOD OF FABRICATING TFT, AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE HAVING THE SAME 有权
标题翻译：使用其制造多晶硅层的方法，使用其制造的TFT，制造TFT的方法和具有其的有机发光二极管显示装置
公开(公告)号：US20120220084A1
公开(公告)日：2012-08-30
申请号：US13464579
申请日：2012-05-04
申请人： Byoung-Keon PARK , Jin-Wook SEO , Tae-Hoon YANG , Kil-Won LEE , Ki-Yong LEE
发明人： Byoung-Keon PARK , Jin-Wook SEO , Tae-Hoon YANG , Kil-Won LEE , Ki-Yong LEE
IPC分类号： H01L21/336 , H01L21/322
CPC分类号： H01L21/3221 , H01L21/02488 , H01L21/02532 , H01L21/02672 , H01L27/1277 , H01L29/66757 , H01L29/66765 , H01L29/78618
摘要： A method of fabricating a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a crystallization-inducing metal; forming a metal layer pattern or metal silicide layer pattern in contact with an upper or lower region of the polycrystalline silicon layer corresponding to a region excluding a channel region in the polycrystalline silicon layer; and annealing the substrate to getter the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer to the region in the polycrystalline silicon layer having the metal layer pattern or metal silicide layer pattern. Accordingly, the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer can be effectively removed, and thus a thin film transistor having an improved leakage current characteristic and an OLED display device including the same can be fabricated.
摘要翻译：一种制造多晶硅层的方法包括：在衬底上形成非晶硅层; 使用结晶诱导金属将非晶硅层结晶成多晶硅层; 形成与所述多晶硅层中除了所述多晶硅层中的沟道区域以外的区域对应的所述多晶硅层的上部或下部区域接触的金属层图案或金属硅化物层图案; 并且使所述衬底退火以将存在于所述多晶硅层的沟道区域中的结晶诱导金属吸收到具有所述金属层图案或金属硅化物层图案的多晶硅层中的区域。因此，可以有效地除去存在于多晶硅层的沟道区域中的结晶诱导金属，因此可以制造具有改善的漏电流特性的薄膜晶体管和包括该薄膜晶体管的OLED显示装置。

10. 发明申请

US20070087490A1 THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20070087490A1
公开(公告)日：2007-04-19
申请号：US11611238
申请日：2006-12-15
申请人： Jin-Wook SEO , Ki-Yong LEE , Tae-Hoon YANG , Byoung-Keon PARK
发明人： Jin-Wook SEO , Ki-Yong LEE , Tae-Hoon YANG , Byoung-Keon PARK
IPC分类号： H01L21/84
CPC分类号： H01L21/02672 , H01L21/2022 , H01L29/04 , H01L29/66765 , H01L29/78609 , H01L29/78678 , H01L29/78696
摘要： A bottom gate thin film transistor and method of fabricating the same are disclosed, in which a channel region is crystallized by a super grain silicon (SGS) crystallization method, including: forming a gate electrode and a gate insulating layer on an insulating substrate; forming an amorphous silicon layer on the gate insulating layer followed by forming a capping layer and a metal catalyst layer; performing heat treatment to crystallize the amorphous silicon layer into a polysilicon layer; and forming an etch stopper, source and drain regions and source and drain electrodes. The thin film transistor includes: an insulating substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a polysilicon layer formed on the gate insulating layer and crystallized by an SGS crystallization method; and source and drain regions and source and drain electrodes formed in a predetermined region of the substrate. As described, a method of fabricating the conventional top-gate thin film transistor has problems in that an interface between a channel region and a gate insulating layer is directly exposed to air or in direct contact with a photoresist pattern or etchant so that the thin film transistor may be contaminated by impurities such as oxide, organic and metal, or damaged in grains, and in that a metal catalyst remains at an interface in crystallization so that leakage current may occur. However, advantageously, a method of fabricating a bottom-gate thin film transistor according to the present invention has merits in that an interface between the channel region and the gate insulating layer is not exposed to air so that the aforementioned problems do not occur. Therefore, a thin film transistor having excellent characteristics may be fabricated and a fabrication process thereof may be simplified.
摘要翻译：公开了一种底栅薄膜晶体管及其制造方法，其中沟道区域通过超晶硅（SGS）结晶方法结晶，包括：在绝缘基板上形成栅电极和栅极绝缘层; 在所述栅极绝缘层上形成非晶硅层，接着形成覆盖层和金属催化剂层; 进行热处理以将非晶硅层结晶成多晶硅层; 以及形成蚀刻停止器，源极和漏极区域以及源极和漏极电极。薄膜晶体管包括：绝缘基板; 形成在所述基板上的栅电极; 形成在所述栅电极上的栅极绝缘层; 形成在栅极绝缘层上并通过SGS结晶法结晶的多晶硅层; 以及形成在基板的预定区域中的源极和漏极区域以及源极和漏极电极。如上所述，制造常规顶栅薄膜晶体管的方法的问题在于，沟道区和栅极绝缘层之间的界面直接暴露于空气或与光致抗蚀剂图案或蚀刻剂直接接触，使得薄膜晶体管可能被诸如氧化物，有机和金属的杂质污染或在晶粒中损坏，并且金属催化剂保留在结晶界面处，从而可能发生漏电流。然而，有利的是，根据本发明的制造底栅极薄膜晶体管的方法的优点在于，沟道区和栅极绝缘层之间的界面不暴露于空气，从而不会发生上述问题。因此，可以制造具有优异特性的薄膜晶体管，并且可以简化其制造工艺。

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