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1. 发明专利

JP2004312036A Device and method of polishing 有权
标题翻译：装置和抛光方法
公开(公告)号：JP2004312036A
公开(公告)日：2004-11-04
申请号：JP2004177568
申请日：2004-06-15
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： OKUMURA KATSUYA , AOKI RIICHIRO , YAJIMA HIROMI , KODERA MASAKO , MISHIMA SHIRO , SHIGETA ATSUSHI , HIROSE MASAYOSHI , KIMURA NORIO , ISHIKAWA SEIJI
IPC分类号： B24B37/04 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a device and a method of polishing capable of carrying out a clean and dried object after the object for polishing is polished, cleaned and dried. SOLUTION: There are provided a polishing device which carries out the clean and dried object S for polishing, after the object S for polishing is carried in and cleaned, wherein the polishing sections 13, 14 which polish the object S, a cleaning section 15 which cleans and dries the object S for polishing after polished and a thickness gauge which measures the thickness of the object S for polishing. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供抛光，清洁和干燥抛光后的抛光对象的清洁和干燥物体的抛光装置和方法。提供一种抛光装置，其在进行用于抛光的物体S被进行和清洁之后，执行用于抛光的清洁和干燥物体S，其中抛光物体S的抛光部分13,14清洁清洗干燥被抛光对象物S的部分15和测量被研磨物S的厚度的厚度计。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2004158883A Semiconductor wafer polishing apparatus and its polishing method 有权
公开(公告)号：JP2004158883A
公开(公告)日：2004-06-03
申请号：JP2004037458
申请日：2004-02-13
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： SAITO HARUMITSU , TSUJIMURA MANABU , YAJIMA HIROMI , HIUGA KAZUAKI , KODAMA SHOICHI , IMOTO YUKIO , AOKI RIICHIRO , KODERA MASAKO , SHIGETA ATSUSHI , MISHIMA SHIRO , KONO YOSHISUKE
IPC分类号： B24B37/04 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor wafer polishing apparatus which can be located in a clean room and in which the semiconductor wafer is transferred to the next process by a wafer carrier used in the clean room generally after cleaning and drying the polished semiconductor wafer without contaminating the clean room, and also to provide its polishing method.
SOLUTION: In the semiconductor wafer polishing apparatus, a polishing section 2 for polishing the semiconductor wafer 4 and a cleaning section 30 for cleaning the semiconductor wafer 4 are contained in a box 1 having side walls. A partition wall 22, which separates the polishing section 2 and the cleaning section 30, and a transferring mechanism 24 which transfers the polished semiconductor wafer 4 from the polishing section 2 to the cleaning section 30 through the opening 22a of the partition wall 22, are positioned in the box 1. The box is rectangularly flat, and a cassette 17 holding the semiconductor wafer 4 before polishing and a cassette 45 containing the semiconductor wafer 4 after polishing are located on the same side of the box 1.
COPYRIGHT: (C)2004,JPO

3. 发明专利

JP2003324082A Polishing equipment 有权
标题翻译：抛光设备
公开(公告)号：JP2003324082A
公开(公告)日：2003-11-14
申请号：JP2003152308
申请日：2003-05-29
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： NISHI TOYOMI , TOGAWA TETSUJI , YAJIMA HIROMI , HIUGA KAZUAKI , KODAMA SHOICHI , IMOTO YUKIO , AOKI RIICHIRO , WATASE MASAKO , SHIGETA ATSUSHI , MISHIMA SHIRO , KONO YOSHISUKE
IPC分类号： H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide polishing equipment which can be installed in a clean room which can prevent contamination effectively.
SOLUTION: The polishing equipment is provided with: an outer fence unit, a bulkhead 11 which partitions the inside of the outer fence into a first chamber 27 and a second chamber 26 and has an opening for passing a wafer 16; a load unload block 7 which delivers a cassette 13 for accommodating the wafers; a polishing block 6 which is arranged in the first chamber 27 and has a turn table 23 wherein an abrasive cloth is stuck on an upper surface and a top ring 22 for pressing the wafer 16 against the abrasive cloth; a cleaning block 9 which is arranged in the second chamber 26 and has a cleaning unit for cleaning the wafer 16 after polishing, while supplying cleaning liquid, and a drying unit for drying the wafer 16 after cleaning; an exhaust means for performing exhaust from the first chamber 27; and an exhaust means for performing exhaust from the second chamber 26.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供可以安装在洁净室中的可以有效防止污染的抛光设备。解决方案：抛光设备设有：外挡板单元，将外挡板内侧分隔成第一室27和第二室26的隔板11，并具有用于通过晶片16的开口; 负载卸载块7，其输送用于容纳晶片的盒13; 抛光块6布置在第一室27中，并且具有转台23，其中研磨布粘附在上表面上，顶环22用于将晶片16压靠在研磨布上; 清洁块9布置在第二室26中，并且具有用于在抛光之后清洁晶片16同时供应清洁液体的清洁单元和用于在清洁之后干燥晶片16的干燥单元; 用于从第一室27进行排气的排气装置; 以及用于从第二室26排气的排气装置。（C）2004，JPO

4. 发明专利

JP2006191030A Polishing machine 有权
标题翻译：抛光机
公开(公告)号：JP2006191030A
公开(公告)日：2006-07-20
申请号：JP2005363897
申请日：2005-12-16
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： NISHI TOYOMI , TOGAWA TETSUJI , YAJIMA HIROMI , HIUGA KAZUAKI , KODAMA SHOICHI , IMOTO YUKIO , AOKI RIICHIRO , WATASE MASAKO , SHIGETA ATSUSHI , MISHIMA SHIRO , KONO YOSHISUKE
IPC分类号： H01L21/304 , B24B37/04 , B24B55/06 , B65G49/00
摘要： PROBLEM TO BE SOLVED: To provide a polishing machine which can be installed in a clean room that can efficiently prevent contamination. SOLUTION: The polishing machine is provided with a loading/unloading block 7 for the delivery of a cassette 13 housing a wafer 16, a carrier block 8 for moving the wafer 16 from the cassette 13, a polishing block 6 for polishing the wafer 16, a cleaning block 9 for cleaning and drying the wafer 16 after polishing, and a control block 10 for controlling the operation of the machine by forming a ceiling and surrounding wall plates so as to surround the whole of the blocks to constitute a box. The wafer 16 is polished by the polishing block 6, and the polished wafer 16 is moved from the polishing block 6 to the cleaning block 9. Then the wafer 16 is cleaned and dried, and then taken out of the polishing machine. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种可以安装在可以有效防止污染的洁净室中的抛光机。解决方案：抛光机设置有用于传送容纳晶片16的盒13的装载/卸载块7，用于从盒13移动晶片16的载体块8，用于抛光晶片16的抛光块6 晶片16，用于在抛光之后清洁和干燥晶片16的清洁块9，以及用于通过形成天花板和围绕壁板来围绕整个块以构成盒子来控制机器的操作的控制块10 。抛光块6抛光晶片16，抛光晶片16从抛光块6移动到清洁块9.然后将晶片16清洗干燥，然后从抛光机中取出。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2005029820A Plating method, method of producing semiconductor device, and plating device 审中-公开
标题翻译：电镀方法，制造半导体器件的方法和镀层器件
公开(公告)号：JP2005029820A
公开(公告)日：2005-02-03
申请号：JP2003194254
申请日：2003-07-09
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： YAHIRO KAZUYUKI , KANEKO HISAFUMI , MATSUDA TETSURO , TOYODA HIROSHI , MORITA TOSHIYUKI , MISHIMA SHIRO , NAGAMATSU TAKAHITO , SAITO AKIKO , MISHIMA KOJI , SUZUKI HIDENAO , IDE KUNIHITO , NOMURA KAZUFUMI
IPC分类号： C25D7/12 , C25D17/00 , C25D21/00 , C25D21/08 , C25D21/10 , H01L21/288 , H01L21/3205 , H01L23/52
摘要： PROBLEM TO BE SOLVED: To provide a plating method capable of securely burying platings into a recessed part, a method of producing a semiconductor device hardly causing disconnection, and a plating device capable of washing a substrate uniformly.
SOLUTION: A wafer W is rotated by the rotation of a wafer holder 25. Further, water is fed onto the wafer W from a water feeding nozzle 40, and the wafer W is washed. The washing of the wafer W is performed while moving the water feeding nozzle 40 and changing the rotational frequency or the like of the wafer holder 25. After the washing, in a state wherein the wafer W is rotated, the feed of the water from the water feeding nozzle 40 is stopped, and the dewatering of the wafer W is performed. After the dewatering, voltage is applied to the space between an anode electrode 31 and a cathode electrode 28. Also, a plating liquid is fed from the water feeding nozzle 40 onto the wafer W, thereby plating the surface of the wafer W.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够将电镀牢固地埋入凹部中的电镀方法，几乎不会断开的半导体装置的制造方法以及能够均匀地洗涤基板的电镀装置。解决方案：通过晶片保持器25的旋转使晶片W旋转。此外，水从供水喷嘴40供给到晶片W上，并且晶片W被洗涤。在移动给水嘴40并改变晶片保持器25的旋转频率等的同时进行晶片W的洗涤。在清洗之后，在晶片W旋转的状态下，从供水喷嘴40停止，并且执行晶片W的脱水。脱水后，向阳极电极31和阴极电极28之间的空间施加电压。此外，电镀液体从供水喷嘴40供给到晶片W，由此电镀晶片W的表面。
版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2009272655A Polishing apparatus 有权
标题翻译：抛光装置
公开(公告)号：JP2009272655A
公开(公告)日：2009-11-19
申请号：JP2009190599
申请日：2009-08-20
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： NISHI TOYOMI , TOGAWA TETSUJI , YAJIMA HIROMI , HIUGA KAZUAKI , KODAMA SHOICHI , IMOTO YUKIO , AOKI RIICHIRO , WATASE MASAKO , SHIGETA ATSUSHI , MISHIMA SHIRO , KONO YOSHISUKE
IPC分类号： H01L21/304 , B24B37/04
摘要： PROBLEM TO BE SOLVED: To provide a polishing apparatus which can be installed in a clean room capable of efficiently preventing contaminations. SOLUTION: The polishing apparatus is provided with a polishing block 6 for polishing a target to be polished, a cleaning block 9 for cleaning and drying the target after polishing, a transporter 8 for transporting the polished target from the polishing block 6 to the cleaning block 9, a first chamber 27 wherein the polishing block 6 is disposed, and a second chamber 26 wherein the transporter 8 and the cleaning block 9 are disposed. The polishing block 6 has a cleaner which includes a turnable 23 and a top ring 22 for supporting the target on the turnable 23 and roughly cleans the polished target on the top ring 22. After being roughly cleaned, the target is removed from the top ring 22 and then is transported to the cleaning block 9 by the transporter 8 and is cleaned and dried in the cleaning block 9. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种可以安装在能够有效防止污染的洁净室中的抛光装置。解决方案：抛光装置设置有用于抛光抛光对象物的抛光块6，抛光后清理和干燥靶材的清洁块9，用于将抛光对象从抛光块6传送到清洁块9，其中设置有抛光块6的第一室27和其中设置有运送器8和清洁块9的第二室26。抛光块6具有清洁器，其包括可转动23和用于将目标物支撑在可转动件23上的顶环22，并大致清洁顶环22上的抛光目标。在粗略清洁之后，将靶从顶环 22，然后通过运送器8运送到清洁块9，并在清洁块9中进行清洁和干燥。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2010016229A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2010016229A
公开(公告)日：2010-01-21
申请号：JP2008175692
申请日：2008-07-04
申请人： Toshiba Corp , 株式会社東芝
发明人： WATABE TADAYOSHI , TOYODA HIROSHI , MISHIMA SHIRO
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To prevent leakage in wiring using a selective top barrier, thereby improving the reliability of the wiring.
SOLUTION: A method of manufacturing a semiconductor device having buried wiring includes: forming a sacrificial film 103 of a material different from that of an inter-wiring insulating film 102 on the insulating film 102 and then selectively etching the sacrificial film 103 and inter-wiring insulating film 102 to form a groove 105 for wiring; burying and forming a conductive film 107 principally composed of Cu in the groove 105 for wiring; forming the top barrier layer 108 selectively on an upper surface of the conductive film 107; and removing the sacrificial film 103 to remove metal residues 108a.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了防止使用选择性顶部屏障的布线的泄漏，从而提高布线的可靠性。解决方案：制造具有掩埋布线的半导体器件的方法包括：在绝缘膜102上形成与布线间绝缘膜102不同的材料的牺牲膜103，然后选择性地蚀刻牺牲膜103和布线绝缘膜102，以形成用于布线的槽105; 在槽105中埋设并形成主要由Cu构成的导电膜107用于布线; 在导电膜107的上表面上选择性地形成顶部势垒层108; 并除去牺牲膜103以去除金属残留物108a。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2005163080A Plating apparatus and plating method 审中-公开
标题翻译：电镀设备和电镀方法
公开(公告)号：JP2005163080A
公开(公告)日：2005-06-23
申请号：JP2003401773
申请日：2003-12-01
申请人： Toshiba Corp , 株式会社東芝
发明人： TOYODA HIROSHI , MATSUI YOSHITAKA , YAHIRO KAZUYUKI , YAMABE SUMISHIGE , MISHIMA SHIRO , NAGAMATSU TAKAHITO
IPC分类号： C25D5/02 , C25D5/18 , C25D7/12 , C25D17/00 , C25D17/10 , C25D21/00 , H01L21/00 , H01L21/288 , H01L21/768
CPC分类号： C25D7/123 , C25D17/001 , C25D17/002 , C25D17/10 , C25D21/00 , H01L21/2885 , H01L21/76877
摘要： PROBLEM TO BE SOLVED: To provide a plating apparatus which inhibits the formation of voids and improves the in-plane thickness uniformity of a plated film, and to provide a plating method. SOLUTION: The plating apparatus 1 comprises a plating liquid tank 2 for storing a plating liquid therein, and a holder 3 for holding a wafer W. The plating liquid tank 2 has an anode 5 to which voltage between itself and the seed layer 103 of the wafer W is applied, and a sacrificial anode 7 which can be electrically connected to the seed layer 103, arranged therein. The sacrificial anode 7 is composed of a substance having an oxidation-reduction potential less noble than that of a metal that forms the seed layer 103. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供抑制空隙形成并提高镀膜的面内厚度均匀性的电镀装置，并提供电镀方法。解决方案：电镀装置1包括用于在其中储存电镀液的电镀液槽2和用于保持晶片W的保持器3.镀液槽2具有阳极5，阳极5在其之间和种子层之间施加电压施加晶片W的103，以及可以与种子层103电连接的牺牲阳极7。牺牲阳极7由具有比形成种子层103的金属的氧化还原电位低的物质组成。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2010080525A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2010080525A
公开(公告)日：2010-04-08
申请号：JP2008244600
申请日：2008-09-24
申请人： Toshiba Corp , 株式会社東芝
发明人： MISHIMA SHIRO
IPC分类号： H01L21/3205 , C25D5/02 , C25D7/12 , H01L21/288 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device which suppresses growth of plating from a side wall part side of a recess, and reduces generation of a void.
SOLUTION: The method of manufacturing a semiconductor device includes: a process for forming a seed film 3 on at least a bottom part 1b and a side wall part 1c of the recess 1a of a wafer W having the recess 1a on a surface; a process for forming a plating suppression film 4 on the seed film 3 so as to expose at least a part 3a of the seed film 3 positioned on the bottom part 1b of the recess 1a, and cover a part 3b of the seed film 3 positioned on the side wall part 1c of the recess 1a; a process for supplying a current to the seed film 3 and forming a plated film 5 by an electrolytic plating method so that the plating film is embedded in the recess 1a with the plating suppression film 4 formed; and a process for thermally treating the plated film 5. The plating suppression film 4 is formed of material which has higher resistivity than constitutional material of the seed film 3 and is different from constitutional material of the plated film 5.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造半导体器件的方法，该半导体器件抑制从凹槽的侧壁部分侧的电镀生长，并且减少空隙的产生。解决方案：半导体器件的制造方法包括：在至少具有凹部1a的晶片W的凹部1a的底部1b和侧壁部1c的表面上形成种子膜3的工序， ; 在种皮膜3上形成电镀抑制膜4的工序，以露出位于凹部1a的底部1b上的种子膜3的至少一部分3a，并覆盖定位的种皮膜3的部分3b 在凹部1a的侧壁部1c上; 用于通过电解电镀法向种皮膜3提供电流并形成电镀膜5的方法，以便在形成有电镀抑制膜4的情况下将电镀膜嵌入到凹部1a中; 以及对镀膜5进行热处理的方法。电镀抑制膜4由比种晶膜3的构成材料高的电阻率与电镀膜5的结构材料不同的材料形成。 C）2010，JPO＆INPIT

10. 发明专利

JP2010093043A Semiconductor device, method for forming pattern, and production process of semiconductor device 审中-公开
标题翻译：半导体器件，形成图案的方法和半导体器件的制造工艺
公开(公告)号：JP2010093043A
公开(公告)日：2010-04-22
申请号：JP2008261324
申请日：2008-10-08
申请人： Toshiba Corp , 株式会社東芝
发明人： MISHIMA SHIRO
IPC分类号： H01L21/027 , G03F7/20 , H01L21/28 , H01L21/3205 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To control a frontage part of an opening from being expanded, thus enabling an embedded conductive object to be easily embedded in the opening. SOLUTION: In chip regions C1a and C1b off from the center of a semiconductor wafer W1 to the left, an inclined plane is formed in the depth direction only on a right sidewall of the right and left sidewalls of openings 13a and 13b while in chip regions C1d and C1e off from the center of the semiconductor wafer W1 to the right, an inclined plane is formed in the depth direction only on a left sidewall of the right and left sidewalls of openings 13d and 13e. At a chip region C1c near the center of the semiconductor wafer W1, an inclined plane is not formed on either a right or left sidewall of the opening 13c. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了控制开口的正面部分被扩展，从而使嵌入的导电物体能够容易地嵌入在开口中。解决方案：在从半导体晶片W1的中心向左偏离的芯片区域C1a和C1b中，仅在开口13a和13b的右侧壁和左侧壁的右侧壁上在深度方向上形成倾斜平面，同时在芯片区域C1d和C1e从半导体晶片W1的中心向右偏离时，仅在开口13d和13e的右侧壁和左侧壁的左侧壁上在深度方向上形成倾斜平面。在半导体晶片W1的中心附近的芯片区域C1c处，在开口部13c的右侧壁或左侧壁上不形成倾斜面。版权所有（C）2010，JPO＆INPIT

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