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1. 发明专利

JP2005029820A Plating method, method of producing semiconductor device, and plating device 审中-公开
标题翻译：电镀方法，制造半导体器件的方法和镀层器件
公开(公告)号：JP2005029820A
公开(公告)日：2005-02-03
申请号：JP2003194254
申请日：2003-07-09
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： YAHIRO KAZUYUKI , KANEKO HISAFUMI , MATSUDA TETSURO , TOYODA HIROSHI , MORITA TOSHIYUKI , MISHIMA SHIRO , NAGAMATSU TAKAHITO , SAITO AKIKO , MISHIMA KOJI , SUZUKI HIDENAO , IDE KUNIHITO , NOMURA KAZUFUMI
IPC分类号： C25D7/12 , C25D17/00 , C25D21/00 , C25D21/08 , C25D21/10 , H01L21/288 , H01L21/3205 , H01L23/52
摘要： PROBLEM TO BE SOLVED: To provide a plating method capable of securely burying platings into a recessed part, a method of producing a semiconductor device hardly causing disconnection, and a plating device capable of washing a substrate uniformly.
SOLUTION: A wafer W is rotated by the rotation of a wafer holder 25. Further, water is fed onto the wafer W from a water feeding nozzle 40, and the wafer W is washed. The washing of the wafer W is performed while moving the water feeding nozzle 40 and changing the rotational frequency or the like of the wafer holder 25. After the washing, in a state wherein the wafer W is rotated, the feed of the water from the water feeding nozzle 40 is stopped, and the dewatering of the wafer W is performed. After the dewatering, voltage is applied to the space between an anode electrode 31 and a cathode electrode 28. Also, a plating liquid is fed from the water feeding nozzle 40 onto the wafer W, thereby plating the surface of the wafer W.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够将电镀牢固地埋入凹部中的电镀方法，几乎不会断开的半导体装置的制造方法以及能够均匀地洗涤基板的电镀装置。解决方案：通过晶片保持器25的旋转使晶片W旋转。此外，水从供水喷嘴40供给到晶片W上，并且晶片W被洗涤。在移动给水嘴40并改变晶片保持器25的旋转频率等的同时进行晶片W的洗涤。在清洗之后，在晶片W旋转的状态下，从供水喷嘴40停止，并且执行晶片W的脱水。脱水后，向阳极电极31和阴极电极28之间的空间施加电压。此外，电镀液体从供水喷嘴40供给到晶片W，由此电镀晶片W的表面。
版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2005133160A Substrate treatment device and method 审中-公开
标题翻译：基板处理装置和方法
公开(公告)号：JP2005133160A
公开(公告)日：2005-05-26
申请号：JP2003371319
申请日：2003-10-30
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： SUZUKI HIDENAO , MISHIMA KOJI , KANDA HIROYUKI , NOMURA KAZUFUMI , IDE KUNIHITO , YAHIRO KAZUYUKI , TOYODA HIROSHI , MATSUDA TETSURO
IPC分类号： C25D7/12 , C25D17/00 , C25D17/06 , C25D21/10 , H01L21/288 , H01L21/3205 , H01L21/68 , H01L21/683
CPC分类号： H01L21/2885 , C25D7/123 , C25D17/001 , C25D17/06
摘要： PROBLEM TO BE SOLVED: To prevent the generation of defects caused by microbubbles, particles or the like slightly present in an electrolytic solution such as a plating liquid, and to improve the yield. SOLUTION: The substrate treatment device comprises: a substrate holding part 14 holding a substrate W; a first electrode 20 contacted with the substrate W and energizing the face to be treated in the substrate W; a second electrode 42 arranged at the position confronted with the face to be treated in the substrate held by the substrate holding part 14; and an electrolytic solution injection means 44 injecting an electrolytic solution 26 inside a region held between the face to be treated in the substrate held by the substrate holding part 14 and the second electrode 42. The substrate holding part 14 rotates the substrate W while repeating acceleration or deceleration and/or normal rotation or reverse rotation under electrolytic treatment. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了防止微电解产生的缺陷，微电解液等电解液中存在的微粒等，提高产率。基板处理装置包括：保持基板W的基板保持部14; 第一电极20与基板W接触并对基板W中待处理的面进行激励; 第二电极42，其布置在与由待保护的基板保持部分14保持的基板中的被处理面相对的位置; 以及电解液注入装置44，其在保持在由基板保持部分14保持的基板中的被处理面之间的区域内注入电解液26和第二电极42.基板保持部14在重复加速的同时旋转基板W 或在电解处理下减速和/或正常旋转或反向旋转。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2005163080A Plating apparatus and plating method 审中-公开
标题翻译：电镀设备和电镀方法
公开(公告)号：JP2005163080A
公开(公告)日：2005-06-23
申请号：JP2003401773
申请日：2003-12-01
申请人： Toshiba Corp , 株式会社東芝
发明人： TOYODA HIROSHI , MATSUI YOSHITAKA , YAHIRO KAZUYUKI , YAMABE SUMISHIGE , MISHIMA SHIRO , NAGAMATSU TAKAHITO
IPC分类号： C25D5/02 , C25D5/18 , C25D7/12 , C25D17/00 , C25D17/10 , C25D21/00 , H01L21/00 , H01L21/288 , H01L21/768
CPC分类号： C25D7/123 , C25D17/001 , C25D17/002 , C25D17/10 , C25D21/00 , H01L21/2885 , H01L21/76877
摘要： PROBLEM TO BE SOLVED: To provide a plating apparatus which inhibits the formation of voids and improves the in-plane thickness uniformity of a plated film, and to provide a plating method. SOLUTION: The plating apparatus 1 comprises a plating liquid tank 2 for storing a plating liquid therein, and a holder 3 for holding a wafer W. The plating liquid tank 2 has an anode 5 to which voltage between itself and the seed layer 103 of the wafer W is applied, and a sacrificial anode 7 which can be electrically connected to the seed layer 103, arranged therein. The sacrificial anode 7 is composed of a substance having an oxidation-reduction potential less noble than that of a metal that forms the seed layer 103. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供抑制空隙形成并提高镀膜的面内厚度均匀性的电镀装置，并提供电镀方法。解决方案：电镀装置1包括用于在其中储存电镀液的电镀液槽2和用于保持晶片W的保持器3.镀液槽2具有阳极5，阳极5在其之间和种子层之间施加电压施加晶片W的103，以及可以与种子层103电连接的牺牲阳极7。牺牲阳极7由具有比形成种子层103的金属的氧化还原电位低的物质组成。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2010205755A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2010205755A
公开(公告)日：2010-09-16
申请号：JP2009046313
申请日：2009-02-27
申请人： Toshiba Corp , 株式会社東芝
发明人： KIKUTANI KEISUKE , YAHIRO KAZUYUKI , SHIOBARA HIDESHI , MATSUNAGA KENTARO , ORI TOMOYA
IPC分类号： H01L21/3213
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, capable of reducing the number of processes to reduce manufacturing cost in forming a pattern having a dimension exceeding the exposure resolution limit of a photolithographic method.
SOLUTION: This method for manufacturing the semiconductor device includes the steps of forming a film used as a mask material in processing a processed film 2 on the processed film 2 by a CVD method, in that case, forming a first region 3 functioning as a mask in a first temperature condition, forming a second region 4 functioning as a reflection preventing film in a second temperature condition changed from the first temperature condition on the first region 3 in the same chamber, and forming a first mask material film 5 made of the first and second regions 3 and 4.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造半导体器件的方法，其能够减少在形成尺寸超过光刻方法的曝光分辨率极限的图案时降低制造成本的工艺数量。解决方案：制造半导体器件的方法包括以下步骤：通过CVD法在加工膜2上处理加工膜2时形成用作掩模材料的膜，在这种情况下，形成第一区域3的功能作为第一温度条件下的掩模，形成在同一室内的第一区域3上从第一温度条件变化的第二温度条件下起防反射膜作用的第二区域4，并形成第一掩模材料膜5 的第一和第二区域3和4.版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2010141046A Nonvolatile semiconductor memory and semiconductor memory device 审中-公开
标题翻译：非线性半导体存储器和半导体存储器件
公开(公告)号：JP2010141046A
公开(公告)日：2010-06-24
申请号：JP2008314761
申请日：2008-12-10
申请人： Toshiba Corp , 株式会社東芝
发明人： NAKAI TSUKASA , FUKUMIZU HIROYUKI , NOJIRI YASUHIRO , YAHIRO KAZUYUKI , OTSUKA KENICHI
IPC分类号： H01L27/10 , H01L45/00 , H01L49/00
摘要： PROBLEM TO BE SOLVED: To acquire high recording density and low power consumption operation, and to reduce a probability of incorrect switching.
SOLUTION: This nonvolatile semiconductor memory includes a resistance changing film 62 whose electric resistivity is changed according to the application of a voltage or a current, and electrodes 61 and 64 which are so provided as to sandwich the resistance changing film 62 in the film thickness direction. The resistance changing film 62 is formed by dissolving at least one kind of an additional element selected out of hydrogen, boron, nitrogen, fluorine, silicon and titanium into a film containing carbon as a main component.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：获得高记录密度和低功耗操作，并降低错误切换的可能性。解决方案：该非易失性半导体存储器包括电阻率根据电压或电流的施加而改变的电阻变化膜62，以及设置为将电阻变化膜62夹在其中的电极61和64 膜厚度方向。电阻变化膜62通过将从氢，硼，氮，氟，硅和钛中选出的至少一种附加元素溶解在含有碳作为主要成分的膜中而形成。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2011014640A Nonvolatile semiconductor memory device 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：JP2011014640A
公开(公告)日：2011-01-20
申请号：JP2009155863
申请日：2009-06-30
申请人： Toshiba Corp , 株式会社東芝
发明人： NAKAI TSUKASA , FUKUMIZU HIROYUKI , NOJIRI YASUHIRO , YAHIRO KAZUYUKI , KISHIDA MOTOYA , SATO SUKEHIRO
IPC分类号： H01L27/10 , C23C14/06 , C23C16/30 , H01L45/00 , H01L49/00
CPC分类号： H01L45/04 , H01L27/2409 , H01L27/2481 , H01L45/1233 , H01L45/126 , H01L45/14 , H01L45/1616 , H01L45/1625
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device which reduces power consumption and suppresses malfunction.SOLUTION: A variable resistance layer 63 is composed of a mixture including a first compound 631 including carbon C and at least any element of one kind or more selected from an element group A, and at least any second compound 632 of one kind or more selected from a compound group G2. Density of the first compound 631 in the variable resistance layer 63 is 30 vol.% or more to 70 vol.% or less. An element group G1 includes hydrogen, boron, nitrogen, silicon, and titanium. A compound group G2 includes silicon oxide, silicon oxynitride, silicon nitride, carbon nitride, boron nitride, aluminum nitride, aluminum oxide, and silicon carbide.
摘要翻译：要解决的问题：提供一种降低功耗并抑制故障的非易失性半导体存储装置。解决方案：可变电阻层63由包括碳C的第一化合物631和至少一种或多种其它元素的混合物组成选自元素组A和选自化合物组G2中的至少一种或多种第二化合物632。可变电阻层63中的第一化合物631的密度为30体积％以上至70体积％以下。元素组G1包括氢，硼，氮，硅和钛。化合物组G2包括氧化硅，氮氧化硅，氮化硅，碳氮化物，氮化硼，氮化铝，氧化铝和碳化硅。

7. 发明专利

JP2009277908A Semiconductor device manufacturing method and semiconductor device 审中-公开
标题翻译：半导体器件制造方法和半导体器件
公开(公告)号：JP2009277908A
公开(公告)日：2009-11-26
申请号：JP2008128073
申请日：2008-05-15
申请人： Toshiba Corp , 株式会社東芝
发明人： IDAKA TOSHIAKI , YAHIRO KAZUYUKI
IPC分类号： H01L29/78 , H01L21/283 , H01L21/768
CPC分类号： H01L21/3105 , H01L29/7843
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method that suppresses cracking when a silicon nitride film functioning as a stress liner imparting a stress to a channel of a transistor is formed, and the semiconductor device.
SOLUTION: The method of manufacturing the semiconductor device in which silicon nitride films 11 and 12 are formed covering an n-channel type transistor 20 formed on a semiconductor substrate 1 to apply a tensile stress in a channel length direction to the channel of the n-channel type transistor 20 includes the stages of: forming the silicon nitride film 11 as a first layer on the n-channel type transistor 20; irradiating the silicon nitride film 11 as the first layer with ultraviolet rays; and forming the silicon nitride film 12 thinner than the silicon nitride film 11 as the first layer as at least one layer on the silicon nitride film 11 as the first layer after the ultraviolet irradiation, thus forming the silicon nitride films formed to apply the tensile stress divisionally by multiple steps.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决问题的方案：提供一种半导体器件制造方法，该半导体器件制造方法在形成用作对晶体管的沟道施加应力的应力衬垫的氮化硅膜时抑制开裂。解决方案：制造其中形成氮化硅膜11和12的半导体器件的制造方法，覆盖形成在半导体衬底1上的n沟道型晶体管20，以将沟道长度方向的拉伸应力施加到沟道长度方向的沟道 n沟道型晶体管20包括以下阶段：在n沟道型晶体管20上形成作为第一层的氮化硅膜11; 用紫外线照射作为第一层的氮化硅膜11; 并且在紫外线照射之后，在作为第一层的氮化硅膜11上形成比作为第一层的氮化硅膜11更薄的氮化硅膜12作为第一层，由此形成氮化硅膜以施加拉伸应力分几个步骤。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2010165950A Nonvolatile semiconductor memory and method of manufacturing the same 审中-公开
标题翻译：非线性半导体存储器及其制造方法
公开(公告)号：JP2010165950A
公开(公告)日：2010-07-29
申请号：JP2009008192
申请日：2009-01-16
申请人： Toshiba Corp , 株式会社東芝
发明人： YAMAMOTO KAZUHIKO , YAHIRO KAZUYUKI , NAKAI TSUKASA
IPC分类号： H01L27/10 , H01L29/06 , H01L29/66 , H01L45/00 , H01L49/00
CPC分类号： H01L45/12 , H01L27/2409 , H01L27/2463 , H01L45/065 , H01L45/1233 , H01L45/149 , H01L45/1616 , H01L45/1625 , H01L45/1675
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile memory element which uses a carbon-based material for a variable resistance film and can be stably operated by stabilizing characteristics at an interface between a carbon film and an electrode and thus stabilizing a variable resistance characteristic, and to provide a method of manufacturing the memory element. SOLUTION: The nonvolatile semiconductor memory using a carbon-based film as a variable resistance layer includes a lower electrode 12 provided on a substrate 11, a buffer layer 13 provided on the lower electrode 12 and made of a film containing nitrogen and carbon as its main component, a variable resistance layer 14 which is provided on the buffer layer 13 and made of a film containing carbon as its main component, and whose electric resistivity varies with voltage application or electric continuity, and an upper electrode 16 provided on the variable resistance layer 14. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种使用碳基材料用于可变电阻膜的非易失性存储元件，并且可以通过在碳膜和电极之间的界面处的稳定特性稳定地操作，从而稳定可变电阻特征，并提供一种制造存储元件的方法。解决方案：使用碳基膜作为可变电阻层的非易失性半导体存储器包括设置在基板11上的下电极12，设置在下电极12上并由含有氮和碳的膜制成的缓冲层13 作为其主要成分的可变电阻层14设置在缓冲层13上，由以碳为主要成分的膜构成，其电阻随电压施加或电连续性而变化，上电极16 可变电阻层14.版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2005223059A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2005223059A
公开(公告)日：2005-08-18
申请号：JP2004028098
申请日：2004-02-04
申请人： Toshiba Corp , 株式会社東芝
发明人： HASUNUMA MASAHIKO , TOYODA HIROSHI , YAHIRO KAZUYUKI
IPC分类号： H01L21/3205 , H01L23/52
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device with a copper wiring inhibiting the shortening of a lifetime due to an EM fault and an SM fault and having a high reliability.
SOLUTION: The semiconductor device has a wiring layer composed of copper or a copper alloy containing oxygen and chlorine in a mean concentration of 1.0×10
16 to 2.0×10
18 atoms/cm
3 respectively.
COPYRIGHT: (C)2005,JPO&NCIPI

10. 发明专利

JPH1167905A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1167905A
公开(公告)日：1999-03-09
申请号：JP22504597
申请日：1997-08-21
申请人： TOSHIBA CORP
发明人： KUBO MAKOTO , TOMITA KENICHI , YAHIRO KAZUYUKI
IPC分类号： H01L21/768 , H01L21/316 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device, in which a flat insulating film, containing a reflow SiO2 film, formed by APL (advanced planarization layer) process, a TEOS-O3 film or a SOG (spin-on-glass) film can be formed, and the generation of blisters and the chipping of metal pattern can be completely avoided. SOLUTION: After an Al wiring 6, having a TiN film 4 has been formed, heat treatment is conducted at a substrate temperature of 400 to 450 deg.C in a forming gas atmosphere of H2 gas, N2 gas or an H2 and N2 forming gas atmosphere, by sinter prior to the formation of an inter-layer insulating film 8 by an insulating film, containing a large quantity of moisture, such as a reflow SiO2 film or a TEOS-O3 film, an SOG film, etc.

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