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1. 发明授权

US07652355B2 Integrated circuit shield structure 有权
标题翻译：集成电路屏蔽结构
公开(公告)号：US07652355B2
公开(公告)日：2010-01-26
申请号：US11832642
申请日：2007-08-01
申请人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
发明人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
IPC分类号： H01L23/552
CPC分类号： H01L23/5227 , H01L23/5225 , H01L2924/0002 , H03H2001/0078 , H01L2924/00
摘要： Embodiments of the invention provide an integrated circuit structure comprising: a substrate; a shield structure comprising a shield member and a ground strap formed on the substrate, wherein the shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion.
摘要翻译：本发明的实施例提供一种集成电路结构，包括：基板; 屏蔽结构，其包括形成在所述基板上的屏蔽构件和接地带，其中所述屏蔽构件包括非金属部分，并且所述接地带包括金属部分。

2. 发明申请

US20050079658A1 Heterojunction bipolar transistor with self-aligned emitter and sidewall base contact 有权
公开(公告)号：US20050079658A1
公开(公告)日：2005-04-14
申请号：US10683142
申请日：2003-10-09
申请人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-Fu Chu
发明人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-Fu Chu
IPC分类号： H01L21/331 , H01L29/08 , H01L29/737 , H01L21/8222
CPC分类号： H01L29/66242 , H01L29/0817 , H01L29/7378
摘要： A heterojunction bipolar transistor (HBT), and manufacturing method therfor, comprising a semiconductor substrate having a collector region is provided. A base contact layer is formed over the collector region, and a base trench is formed in the base contact layer and the collector region. An intrinsic base structure having a sidewall portion and a bottom portion is formed in the base trench. An insulating spacer is formed over the sidewall portion of the intrinsic base structure, and an emitter structure is formed over the insulating spacer and the bottom portion of the intrinsic base structure. An interlevel dielectric layer is formed over the base contact layer and the emitter structure. Connections are formed through the interlevel dielectric layer to the collector region, the base contact layer, and the emitter structure. The intrinsic base structure is silicon and at least one of silicon-germanium, silicon-germanium-carbon, and combinations thereof.

3. 发明申请

US20050196931A1 Self-aligned lateral heterojunction bipolar transistor 有权
标题翻译：自对准横向异质结双极晶体管
公开(公告)号：US20050196931A1
公开(公告)日：2005-09-08
申请号：US11123748
申请日：2005-05-04
申请人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-fu Chu
发明人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-fu Chu
IPC分类号： H01L21/331 , H01L29/737
CPC分类号： H01L29/66242 , H01L29/737
摘要： A lateral heterojunction bipolar transistor (HBT), comprising a semiconductor substrate having having a first insulating layer over the semiconductor substrate. A base trench is formed in a first silicon layer over the first insulating layer to form a collector layer over an exposed portion of the semiconductor substrate and an emitter layer over the first insulating layer. A semiconductive layer is formed on the sidewalls of the base trench to form a collector structure in contact with the collector layer and an emitter structure in contact with the emitter layer. A base structure is formed in the base trench. A plurality of connections is formed through an interlevel dielectric layer to the collector layer, the emitter layer, and the base structure. The base structure preferably is a compound semiconductive material of silicon and at least one of silicon-germanium, silicon-germanium-carbon, and combinations thereof.
摘要翻译：一种横向异质结双极晶体管（HBT），包括在半导体衬底上具有第一绝缘层的半导体衬底。基底沟槽形成在第一绝缘层上的第一硅层中，以在半导体衬底的暴露部分和第一绝缘层上的发射极层之上形成集电极层。半导体层形成在基底沟槽的侧壁上，以形成与集电极层接触的集电极结构和与发射极层接触的发射极结构。基底结构形成在基底沟槽中。通过层间电介质层到集电极层，发射极层和基底结构形成多个连接。基底结构优选是硅的化合物半导体材料和硅 - 锗，硅 - 锗 - 碳及其组合中的至少一种。

4. 发明申请

US20050145953A1 Heterojunction BiCMOS integrated circuits and method therefor 审中-公开
标题翻译：异质结BiCMOS集成电路及其方法
公开(公告)号：US20050145953A1
公开(公告)日：2005-07-07
申请号：US10752454
申请日：2004-01-05
申请人： Lap Chan , Jia Zheng , Purakh Verma , Jian Li , Shao-fu Chu
发明人： Lap Chan , Jia Zheng , Purakh Verma , Jian Li , Shao-fu Chu
IPC分类号： H01L21/331 , H01L21/8249 , H01L27/06 , H01L31/113
CPC分类号： H01L29/66242 , H01L21/8249 , H01L27/0623
摘要： A method of manufacturing a BiCMOS integrated circuit including a CMOS transistor having a gate structure, and a heterojunction bipolar transistor having an extrinsic base structure. A substrate is provided, and a polysilicon layer is formed over the substrate. The gate structure and the extrinsic base structure are formed in the polysilicon layer. A plurality of contacts is formed through the interlevel dielectric layer to the CMOS transistor and the heterojunction bipolar transistor.
摘要翻译：一种制造包括具有栅极结构的CMOS晶体管的BiCMOS集成电路的方法和具有外在基极结构的异质结双极晶体管。提供衬底，并且在衬底上形成多晶硅层。栅极结构和非本征基极结构形成在多晶硅层中。多个触点通过层间介质层形成到CMOS晶体管和异质结双极晶体管。

5. 发明申请

US20050101096A1 SELF-ALIGNED LATERAL HETEROJUNCTION BIPOLAR TRANSISTOR 有权
标题翻译：自对准侧向异相双极晶体管
公开(公告)号：US20050101096A1
公开(公告)日：2005-05-12
申请号：US10703284
申请日：2003-11-06
申请人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-Fu Chu
发明人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-Fu Chu
IPC分类号： H01L21/331 , H01L29/737 , H01L21/8222
CPC分类号： H01L29/66242 , H01L29/737
摘要： A method for manufacturing a lateral heterojunction bipolar transistor (HBT) is provided comprising a semiconductor substrate having a first insulating layer over the semiconductor substrate. A base trench is formed in a first silicon layer over the first insulating layer to form a collector layer over an exposed portion of the semiconductor substrate and an emitter layer over the first insulating layer. A semiconductive layer is formed on the sidewalls of the base trench to form a collector structure in contact with the collector layer and an emitter structure in contact with the emitter layer. A base structure is formed in the base trench. A plurality of connections is formed through an interlevel dielectric layer to the collector layer, the emitter layer, and the base structure. The base structure preferably is a compound semiconductive material of silicon and at least one of silicon-germanium, silicon-germanium-carbon, and combinations thereof.
摘要翻译：提供一种用于制造横向异质结双极晶体管（HBT）的方法，包括半导体衬底上的第一绝缘层的半导体衬底。基底沟槽形成在第一绝缘层上的第一硅层中，以在半导体衬底的暴露部分和第一绝缘层上的发射极层之上形成集电极层。半导体层形成在基底沟槽的侧壁上，以形成与集电极层接触的集电极结构和与发射极层接触的发射极结构。基底结构形成在基底沟槽中。通过层间电介质层到集电极层，发射极层和基底结构形成多个连接。基底结构优选是硅的化合物半导体材料和硅 - 锗，硅 - 锗 - 碳及其组合中的至少一种。

6. 发明授权

US08003529B2 Method of fabrication an integrated circuit 有权
标题翻译：集成电路制造方法
公开(公告)号：US08003529B2
公开(公告)日：2011-08-23
申请号：US12693405
申请日：2010-01-25
申请人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
发明人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
IPC分类号： H01L21/44
CPC分类号： H01L23/5227 , H01L23/5225 , H01L2924/0002 , H03H2001/0078 , H01L2924/00
摘要： A method of forming an integrated circuit is disclosed. The method includes providing a substrate and forming on the substrate a shield structure comprising a shield member and a ground strap. The shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion.
摘要翻译：公开了形成集成电路的方法。该方法包括提供衬底并在衬底上形成包括屏蔽构件和接地带的屏蔽结构。屏蔽构件包括非金属部分，并且接地带包括金属部分。

7. 发明申请

US20100120244A1 INTEGRATED CIRCUIT SHIELD STRUCTURE AND METHOD OF FABRICATION THEREOF 有权
标题翻译：集成电路屏蔽结构及其制造方法
公开(公告)号：US20100120244A1
公开(公告)日：2010-05-13
申请号：US12693405
申请日：2010-01-25
申请人： Suh Fei LIM , Kok Wai CHEW , Sanford Shao-Fu CHU , Michael Chye Huat CHENG
发明人： Suh Fei LIM , Kok Wai CHEW , Sanford Shao-Fu CHU , Michael Chye Huat CHENG
IPC分类号： H01L21/02
CPC分类号： H01L23/5227 , H01L23/5225 , H01L2924/0002 , H03H2001/0078 , H01L2924/00
摘要： A method of forming an integrated circuit is disclosed. The method includes providing a substrate and forming on the substrate a shield structure comprising a shield member and a ground strap. The shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion.
摘要翻译：公开了形成集成电路的方法。该方法包括提供衬底并在衬底上形成包括屏蔽构件和接地带的屏蔽结构。屏蔽构件包括非金属部分，并且接地带包括金属部分。

8. 发明申请

US20050116254A1 Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth 有权
标题翻译：横向异质结双极晶体管和使用选择性外延生长的制造方法
公开(公告)号：US20050116254A1
公开(公告)日：2005-06-02
申请号：US10725670
申请日：2003-12-01
申请人： Purakh Verma , Shao-Fu Chu , Lap Chan , Jia Zheng , Jian Li
发明人： Purakh Verma , Shao-Fu Chu , Lap Chan , Jia Zheng , Jian Li
IPC分类号： H01L21/331 , H01L29/737 , H01L21/338 , H01L21/8222 , H01L29/732 , H01L29/739 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L29/66242 , H01L29/737
摘要： A method for manufacturing a heterojunction bipolar transistor is provided. An intrinsic collector structure is formed on a substrate. An extrinsic base structure partially overlaps the intrinsic collector structure. An intrinsic base structure is formed adjacent the intrinsic collector structure and under the extrinsic base structure. An emitter structure is formed adjacent the intrinsic base structure. An extrinsic collector structure is formed adjacent the intrinsic collector structure. A plurality of contacts is formed through an interlevel dielectric layer to the extrinsic collector structure, the extrinsic base structure, and the emitter structure.
摘要翻译：提供了一种用于制造异质结双极晶体管的方法。本征收集器结构形成在衬底上。外部基本结构部分地与本征收集器结构重叠。内部基本结构形成在本征收集器结构附近和在非本征基础结构之下。在本征基础结构附近形成发射极结构。外部收集器结构形成在本征收集器结构附近。多个触点通过层间电介质层与外部基极结构，外部基极结构和发射极结构形成。

9. 发明申请

US20050101038A1 Method and apparatus for a heterojunction bipolar transistor using self-aligned epitaxy 有权
标题翻译：使用自对准外延的异质结双极晶体管的方法和装置
公开(公告)号：US20050101038A1
公开(公告)日：2005-05-12
申请号：US10703297
申请日：2003-11-06
申请人： Purakh Verma , Shao-Fu Chu , Lap Chan , Jian Li , Jia Zheng
发明人： Purakh Verma , Shao-Fu Chu , Lap Chan , Jian Li , Jia Zheng
IPC分类号： H01L21/331 , H01L29/737 , H01L21/00
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A heterojunction bipolar transistor (HBT), and manufacturing method therefor, comprising a semiconductor substrate having a collector region, a number of insulating layers over the semiconductor substrate, at least one of the number of insulating layers having a base cavity over the collector region, a base structure of a compound semiconductive material in the base cavity, a window in the insulating layer over the base cavity, an emitter structure in the window, an interlevel dielectric layer, and connections through the interlevel dielectric layer to the base structure, the emitter structure, and the collector region. The base structure and the emitter structure preferably are formed in the same processing chamber.
摘要翻译：一种异质结双极晶体管（HBT）及其制造方法，包括具有集电极区域，半导体衬底上的多个绝缘层的半导体衬底，在集电极区域上具有基腔的多个绝缘层中的至少一个，基腔中的复合半导体材料的基底结构，在基底腔上的绝缘层中的窗口，窗口中的发射极结构，层间介电层以及通过层间介电层到基底结构的连接，发射极结构和收集器区域。基底结构和发射极结构优选地形成在相同的处理室中。

10. 发明申请

US20050098834A1 HETEROJUNCTION BICMOS SEMICONDUCTOR 失效
标题翻译：异常BICMOS半导体
公开(公告)号：US20050098834A1
公开(公告)日：2005-05-12
申请号：US10705163
申请日：2003-11-06
申请人： Jia Zheng , Lap Chan , Shao-fu Chu
发明人： Jia Zheng , Lap Chan , Shao-fu Chu
IPC分类号： H01L21/331 , H01L21/8249 , H01L27/06 , H01L27/108 , H01L21/8238 , H01L29/04
CPC分类号： H01L29/66242 , H01L21/8249 , H01L27/0623
摘要： A BiCMOS semiconductor, and manufacturing method therefore, is provided. A semiconductor substrate having a collector region is provided. A pseudo-gate is formed over the collector region. An emitter window is formed in the pseudo-gate to form an extrinsic base structure. An undercut region beneath a portion of the pseudo-gate is formed to provide an intrinsic base structure in the undercut region. An emitter structure is formed in the emitter window over the intrinsic base structure. An interlevel dielectric layer is formed over the semiconductor substrate, and connections are formed through the interlevel dielectric layer to the collector region, the extrinsic base structure, and the emitter structure. The intrinsic base structure comprises a compound semiconductive material such as silicon and silicon-germanium, or silicon-germanium-carbon, or combinations thereof.
摘要翻译：因此，提供BiCMOS半导体及其制造方法。提供具有集电极区域的半导体衬底。在集电极区域上形成伪栅极。在伪栅极中形成发射器窗口以形成外部基极结构。在伪栅极的一部分下面的底切区域形成为在底切区域中提供内部基极结构。发射极结构在内部基极结构的发射极窗口中形成。在半导体衬底上形成层间电介质层，并且通过层间电介质层到集电极区域，非本征基极结构和发射极结构形成连接。本征基础结构包括诸如硅和硅 - 锗的复合半导体材料或硅 - 锗 - 碳或其组合。

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