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1. 发明申请

US20050196931A1 Self-aligned lateral heterojunction bipolar transistor 有权
标题翻译：自对准横向异质结双极晶体管
公开(公告)号：US20050196931A1
公开(公告)日：2005-09-08
申请号：US11123748
申请日：2005-05-04
申请人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-fu Chu
发明人： Jian Li , Lap Chan , Purakh Verma , Jia Zheng , Shao-fu Chu
IPC分类号： H01L21/331 , H01L29/737
CPC分类号： H01L29/66242 , H01L29/737
摘要： A lateral heterojunction bipolar transistor (HBT), comprising a semiconductor substrate having having a first insulating layer over the semiconductor substrate. A base trench is formed in a first silicon layer over the first insulating layer to form a collector layer over an exposed portion of the semiconductor substrate and an emitter layer over the first insulating layer. A semiconductive layer is formed on the sidewalls of the base trench to form a collector structure in contact with the collector layer and an emitter structure in contact with the emitter layer. A base structure is formed in the base trench. A plurality of connections is formed through an interlevel dielectric layer to the collector layer, the emitter layer, and the base structure. The base structure preferably is a compound semiconductive material of silicon and at least one of silicon-germanium, silicon-germanium-carbon, and combinations thereof.
摘要翻译：一种横向异质结双极晶体管（HBT），包括在半导体衬底上具有第一绝缘层的半导体衬底。基底沟槽形成在第一绝缘层上的第一硅层中，以在半导体衬底的暴露部分和第一绝缘层上的发射极层之上形成集电极层。半导体层形成在基底沟槽的侧壁上，以形成与集电极层接触的集电极结构和与发射极层接触的发射极结构。基底结构形成在基底沟槽中。通过层间电介质层到集电极层，发射极层和基底结构形成多个连接。基底结构优选是硅的化合物半导体材料和硅 - 锗，硅 - 锗 - 碳及其组合中的至少一种。

2. 发明申请

US20050145953A1 Heterojunction BiCMOS integrated circuits and method therefor 审中-公开
标题翻译：异质结BiCMOS集成电路及其方法
公开(公告)号：US20050145953A1
公开(公告)日：2005-07-07
申请号：US10752454
申请日：2004-01-05
申请人： Lap Chan , Jia Zheng , Purakh Verma , Jian Li , Shao-fu Chu
发明人： Lap Chan , Jia Zheng , Purakh Verma , Jian Li , Shao-fu Chu
IPC分类号： H01L21/331 , H01L21/8249 , H01L27/06 , H01L31/113
CPC分类号： H01L29/66242 , H01L21/8249 , H01L27/0623
摘要： A method of manufacturing a BiCMOS integrated circuit including a CMOS transistor having a gate structure, and a heterojunction bipolar transistor having an extrinsic base structure. A substrate is provided, and a polysilicon layer is formed over the substrate. The gate structure and the extrinsic base structure are formed in the polysilicon layer. A plurality of contacts is formed through the interlevel dielectric layer to the CMOS transistor and the heterojunction bipolar transistor.
摘要翻译：一种制造包括具有栅极结构的CMOS晶体管的BiCMOS集成电路的方法和具有外在基极结构的异质结双极晶体管。提供衬底，并且在衬底上形成多晶硅层。栅极结构和非本征基极结构形成在多晶硅层中。多个触点通过层间介质层形成到CMOS晶体管和异质结双极晶体管。

3. 发明申请

US20050098834A1 HETEROJUNCTION BICMOS SEMICONDUCTOR 失效
标题翻译：异常BICMOS半导体
公开(公告)号：US20050098834A1
公开(公告)日：2005-05-12
申请号：US10705163
申请日：2003-11-06
申请人： Jia Zheng , Lap Chan , Shao-fu Chu
发明人： Jia Zheng , Lap Chan , Shao-fu Chu
IPC分类号： H01L21/331 , H01L21/8249 , H01L27/06 , H01L27/108 , H01L21/8238 , H01L29/04
CPC分类号： H01L29/66242 , H01L21/8249 , H01L27/0623
摘要： A BiCMOS semiconductor, and manufacturing method therefore, is provided. A semiconductor substrate having a collector region is provided. A pseudo-gate is formed over the collector region. An emitter window is formed in the pseudo-gate to form an extrinsic base structure. An undercut region beneath a portion of the pseudo-gate is formed to provide an intrinsic base structure in the undercut region. An emitter structure is formed in the emitter window over the intrinsic base structure. An interlevel dielectric layer is formed over the semiconductor substrate, and connections are formed through the interlevel dielectric layer to the collector region, the extrinsic base structure, and the emitter structure. The intrinsic base structure comprises a compound semiconductive material such as silicon and silicon-germanium, or silicon-germanium-carbon, or combinations thereof.
摘要翻译：因此，提供BiCMOS半导体及其制造方法。提供具有集电极区域的半导体衬底。在集电极区域上形成伪栅极。在伪栅极中形成发射器窗口以形成外部基极结构。在伪栅极的一部分下面的底切区域形成为在底切区域中提供内部基极结构。发射极结构在内部基极结构的发射极窗口中形成。在半导体衬底上形成层间电介质层，并且通过层间电介质层到集电极区域，非本征基极结构和发射极结构形成连接。本征基础结构包括诸如硅和硅 - 锗的复合半导体材料或硅 - 锗 - 碳或其组合。

4. 发明申请

US20050170580A1 Double polysilicon bipolar transistor 有权
标题翻译：双晶硅双极晶体管
公开(公告)号：US20050170580A1
公开(公告)日：2005-08-04
申请号：US11057259
申请日：2005-02-12
申请人： Purakh Verma , Shao-fu Chu
发明人： Purakh Verma , Shao-fu Chu
IPC分类号： H01L21/331 , H01L29/08 , H01L29/732 , H01L29/737 , H01L21/8249 , H01L21/8222
CPC分类号： H01L29/66287 , H01L29/0804 , H01L29/0821 , H01L29/732 , H01L29/7375
摘要： A bipolar transistor, with a substrate having a collector region and a base structure provided thereon. An emitter structure is formed over the base structure and an extrinsic base structure is formed over the base structure and over the collector region beside and spaced from the emitter structure. A dielectric layer is deposited over the substrate and connections are formed to the extrinsic base structure, the emitter structure and the collector region.
摘要翻译：一种双极晶体管，其基底具有集电极区域和基底结构。在基底结构上形成发射极结构，并且在基极结构之上形成外部基极结构，并且在发射极结构旁边和间隔开的集电极区上方形成发射极结构。电介质层沉积在衬底上，并且连接被形成为非本征基极结构，发射极结构和集电极区。

5. 发明申请

US20050057335A1 Method of manufacturing 3-D spiral stacked inductor on semiconductor material 有权
标题翻译：在半导体材料上制造三维螺旋堆叠电感器的方法
公开(公告)号：US20050057335A1
公开(公告)日：2005-03-17
申请号：US10962007
申请日：2004-10-08
申请人： Choon-Beng Sia , Kiat Yeo , Shao-fu Chu , Cheng Ng , Kok Chew , Wang Goh
发明人： Choon-Beng Sia , Kiat Yeo , Shao-fu Chu , Cheng Ng , Kok Chew , Wang Goh
IPC分类号： H01F41/04 , H01F17/00 , H01L21/02 , H01L27/08 , H01F27/02
CPC分类号： H01L28/10 , H01L27/08 , Y10T29/4902 , Y10T29/4906 , Y10T29/49073 , Y10T29/49165
摘要： A method of manufacturing a 3-D spiral stacked inductor is provided having a substrate with a plurality of turns in a plurality of levels wherein the number of levels increases from an inner turn to the outer turn of the inductor. First and second connecting portions are respectively connected to an inner turn and an outermost turn, and a dielectric material contains the first and second connecting portions and the plurality of turns over the substrate.
摘要翻译：提供了一种制造3-D螺旋堆叠电感器的方法，其具有多个电平的多个匝数的基板，其中电平的数量从电感器的内部匝数增加到外部匝数。第一连接部分和第二连接部分分别连接到内匝和最外匝，电介质材料包含基片上的第一和第二连接部分和多个匝。

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