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1. 发明授权

US08003529B2 Method of fabrication an integrated circuit 有权
标题翻译：集成电路制造方法
公开(公告)号：US08003529B2
公开(公告)日：2011-08-23
申请号：US12693405
申请日：2010-01-25
申请人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
发明人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
IPC分类号： H01L21/44
CPC分类号： H01L23/5227 , H01L23/5225 , H01L2924/0002 , H03H2001/0078 , H01L2924/00
摘要： A method of forming an integrated circuit is disclosed. The method includes providing a substrate and forming on the substrate a shield structure comprising a shield member and a ground strap. The shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion.
摘要翻译：公开了形成集成电路的方法。该方法包括提供衬底并在衬底上形成包括屏蔽构件和接地带的屏蔽结构。屏蔽构件包括非金属部分，并且接地带包括金属部分。

2. 发明授权

US07652355B2 Integrated circuit shield structure 有权
标题翻译：集成电路屏蔽结构
公开(公告)号：US07652355B2
公开(公告)日：2010-01-26
申请号：US11832642
申请日：2007-08-01
申请人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
发明人： Suh Fei Lim , Kok Wai Chew , Sanford Shao-Fu Chu , Michael Chye Huat Cheng
IPC分类号： H01L23/552
CPC分类号： H01L23/5227 , H01L23/5225 , H01L2924/0002 , H03H2001/0078 , H01L2924/00
摘要： Embodiments of the invention provide an integrated circuit structure comprising: a substrate; a shield structure comprising a shield member and a ground strap formed on the substrate, wherein the shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion.
摘要翻译：本发明的实施例提供一种集成电路结构，包括：基板; 屏蔽结构，其包括形成在所述基板上的屏蔽构件和接地带，其中所述屏蔽构件包括非金属部分，并且所述接地带包括金属部分。

3. 发明授权

US07570144B2 Integrated transformer and method of fabrication thereof 有权
标题翻译：集成变压器及其制造方法
公开(公告)号：US07570144B2
公开(公告)日：2009-08-04
申请号：US11750341
申请日：2007-05-18
申请人： Chee Chong Lim , Kok Wai Chew , Kiat Seng Yeo , Suh Fei Lim , Manh Anh Do , Lap Chan
发明人： Chee Chong Lim , Kok Wai Chew , Kiat Seng Yeo , Suh Fei Lim , Manh Anh Do , Lap Chan
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F17/0013 , H01F19/08 , H01F27/2804 , H01F41/041 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , Y10T29/4902 , H01L2924/00
摘要： An integrated transformer structure includes a first coil element associated with a transverse axis, the first coil element having at least one turn. The first coil element includes a first portion provided on a first lateral level, and a second portion provided on a second lateral level. The first and second lateral levels being mutually spaced apart along said transverse axis. The first and second portions being displaced laterally from said axis by different respective distances. At least one crossover portion of the first coil element, in which the first coil element being configured to provide a conducting path through at least a portion of the first portion of the first coil element to the crossover portion, through the crossover portion and subsequently through at least a portion of the second portion of the first coil element, in which any change of flow direction along said path is less than 90° in a lateral direction.
摘要翻译：集成变压器结构包括与横向轴线相关联的第一线圈元件，第一线圈元件具有至少一匝。第一线圈元件包括设置在第一横向水平面上的第一部分和设置在第二横向水平面上的第二部分。第一和第二横向水平面沿着所述横向轴线相互间隔开。第一和第二部分从所述轴线横向移位不同的相应距离。所述第一线圈元件的至少一个交叉部分，其中所述第一线圈元件被配置为提供通过所述交叉部分穿过所述交叉部分的所述第一线圈元件的所述第一部分的至少一部分的导电路径，并且随后通过第一线圈元件的第二部分的至少一部分，其中沿着所述路径的流动方向的任何变化在横向方向上小于90°。

4. 发明授权

US08242872B2 Transformer with effective high turn ratio 有权
标题翻译：变压器有效高匝数比
公开(公告)号：US08242872B2
公开(公告)日：2012-08-14
申请号：US11779892
申请日：2007-07-19
申请人： Chee Chong Lim , Kok Wai Chew , Kiat Seng Yeo , Suh Fei Lim , Manh Anh Do , Lap Chan
发明人： Chee Chong Lim , Kok Wai Chew , Kiat Seng Yeo , Suh Fei Lim , Manh Anh Do , Lap Chan
IPC分类号： H01F5/00 , H01F27/28
CPC分类号： H01F27/2804 , H01F17/0013 , H01F27/006 , H01F2017/0073 , H01L2924/3011 , Y10T29/4902
摘要： Embodiments of the invention provide a transformer comprising: a first coil element having a transverse axis along a transverse direction, the first coil element having p turns where p is greater than or equal to 1; and a second coil element having a transverse axis generally parallel to the transverse axis of the first coil element, the second coil element having n turns, where n is greater than or equal to 5p; wherein the first and second coil elements are arranged to provide electromagnetic coupling between the coil elements along a portion of a length of the second coil element in both a transverse direction parallel to the transverse axes and a lateral direction, wherein the lateral direction is a direction normal to the transverse axes.
摘要翻译：本发明的实施例提供了一种变压器，包括：第一线圈元件，其沿着横向具有横向轴线，所述第一线圈元件具有p匝，其中p大于或等于1; 以及第二线圈元件，其具有大致平行于所述第一线圈元件的横向轴线的横轴，所述第二线圈元件具有n匝，其中n大于或等于5p; 其中所述第一和第二线圈元件布置成沿平行于横向轴线的横向方向和横向方向沿着所述第二线圈元件的长度的一部分在所述线圈元件之间提供电磁耦合，其中所述横向方向是垂直于横轴。

5. 发明申请

US20080284552A1 INTEGRATED TRANSFORMER AND METHOD OF FABRICATION THEREOF 有权
标题翻译：一体化变压器及其制造方法
公开(公告)号：US20080284552A1
公开(公告)日：2008-11-20
申请号：US11750341
申请日：2007-05-18
申请人： Chee Chong Lim , Kok Wai Chew , Kiat Seng Yeo , Suh Fei Lim , Manh Anh Do , Lap Chan
发明人： Chee Chong Lim , Kok Wai Chew , Kiat Seng Yeo , Suh Fei Lim , Manh Anh Do , Lap Chan
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F17/0013 , H01F19/08 , H01F27/2804 , H01F41/041 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , Y10T29/4902 , H01L2924/00
摘要： An integrated transformer structure includes a first coil element associated with a transverse axis, the first coil element having at least one turn. The first coil element includes a first portion provided on a first lateral level, and a second portion provided on a second lateral level. The first and second lateral levels being mutually spaced apart along said transverse axis. The first and second portions being displaced laterally from said axis by different respective distances. At least one crossover portion of the first coil element, in which the first coil element being configured to provide a conducting path through at least a portion of the first portion of the first coil element to the crossover portion, through the crossover portion and subsequently through at least a portion of the second portion of the first coil element, in which any change of flow direction along said path is less than 90° in a lateral direction.
摘要翻译：集成变压器结构包括与横向轴线相关联的第一线圈元件，第一线圈元件具有至少一匝。第一线圈元件包括设置在第一横向水平面上的第一部分和设置在第二横向水平面上的第二部分。第一和第二横向水平面沿着所述横向轴线相互间隔开。第一和第二部分从所述轴线横向移位不同的相应距离。所述第一线圈元件的至少一个交叉部分，其中所述第一线圈元件被配置为提供通过所述交叉部分穿过所述交叉部分的所述第一线圈元件的所述第一部分的至少一部分的导电路径，并且随后通过第一线圈元件的第二部分的至少一部分，其中沿着所述路径的流动方向的任何变化在横向方向上小于90°。

6. 发明授权

US06709918B1 Method for making a metal-insulator-metal (MIM) capacitor and metal resistor for a copper back-end-of-line (BEOL) technology 有权
标题翻译：用于铜后端（BEOL）技术的金属绝缘体金属（MIM）电容器和金属电阻器的制造方法
公开(公告)号：US06709918B1
公开(公告)日：2004-03-23
申请号：US10307674
申请日：2002-12-02
申请人： Chit Hwei Ng , Jian Xun Li , Kok Wai Chew , Tjin Tjin Tjoa , Chaw Sing Ho , Shao Fu Sanford Chu
发明人： Chit Hwei Ng , Jian Xun Li , Kok Wai Chew , Tjin Tjin Tjoa , Chaw Sing Ho , Shao Fu Sanford Chu
IPC分类号： H01L218242
CPC分类号： H01L28/20 , H01L23/5223 , H01L23/5228 , H01L28/40 , H01L2924/0002 , Y10S438/959 , H01L2924/00
摘要： A method for making concurrently metal-insulator-metal (MIM) capacitors and a metal resistors in a Cu damascene back-end-of-line process is achieved. The method forms a Cu capacitor bottom metal plate using a dual-damascene process. A Si3N4 or SiC is deposited to form a capacitor dielectric layer on the Cu bottom plate. A metal layer having an upper etch-stop layer is deposited and patterned to form concurrently capacitor top plates and metal resistors. The patterning is terminated in the capacitor dielectric layer to prevent Cu particle contamination. An insulating layer is deposited and via holes are etched to the capacitor top plates and the metal resistors using the upper etch-stop layer to prevent overetching and damage. The method provides a MIM capacitor using only one additional photoresist mask while improving process yield.
摘要翻译：实现了一种在金铜绝缘体金属（MIM）电容器和金属电阻器Cu铜镶嵌后端工艺中的制造方法。该方法使用双镶嵌工艺形成Cu电容器底部金属板。沉积Si 3 N 4或SiC以在Cu底板上形成电容器电介质层。具有上蚀刻停止层的金属层被沉积并图案化以形成电容器顶板和金属电阻器。图案化终止在电容器电介质层中以防止Cu颗粒污染。沉积绝缘层，并且使用上蚀刻停止层将电容器顶板和金属电阻器的通孔蚀刻以防止过蚀刻和损坏。该方法提供了仅使用一种附加光致抗蚀剂掩模的MIM电容器，同时提高了工艺产量。

7. 发明授权

US06841847B2 3-D spiral stacked inductor on semiconductor material 有权
标题翻译：半导体材料上的3-D螺旋堆叠电感
公开(公告)号：US06841847B2
公开(公告)日：2005-01-11
申请号：US10131336
申请日：2002-09-04
申请人： Choon-Beng Sia , Kiat Seng Yeo , Shao-fu Sanford Chu , Cheng Yeow Ng , Kok Wai Chew , Wang Ling Goh
发明人： Choon-Beng Sia , Kiat Seng Yeo , Shao-fu Sanford Chu , Cheng Yeow Ng , Kok Wai Chew , Wang Ling Goh
IPC分类号： H01F41/04 , H01F17/00 , H01L21/02 , H01L27/08 , H01L29/00
CPC分类号： H01L28/10 , H01L27/08 , Y10T29/4902 , Y10T29/4906 , Y10T29/49073 , Y10T29/49165
摘要： A 3-D spiral stacked inductor is provided having a substrate with a plurality of turns in a plurality of levels wherein the number of levels increases from an inner turn to the outer turn of the inductor. First and second connecting portions are respectively connected to an inner turn and an outermost turn, and dielectric material contains the first and second connecting portions and the plurality of turns over the substrate.
摘要翻译：提供一种三维螺旋堆叠电感器，其具有多个级别的多个匝数的基板，其中电平的数量从电感器的内部转弯到外部转弯。第一连接部分和第二连接部分分别连接到内匝和最外匝，并且电介质材料包含第一和第二连接部分以及基板上的多个匝。

8. 发明授权

US07721414B2 Method of manufacturing 3-D spiral stacked inductor on semiconductor material 有权
标题翻译：在半导体材料上制造三维螺旋堆叠电感器的方法
公开(公告)号：US07721414B2
公开(公告)日：2010-05-25
申请号：US10962007
申请日：2004-10-08
申请人： Choon-Beng Sia , Kiat Seng Yeo , Shao-fu Sanford Chu , Cheng Yeow Ng , Kok Wai Chew , Wang Ling Goh
发明人： Choon-Beng Sia , Kiat Seng Yeo , Shao-fu Sanford Chu , Cheng Yeow Ng , Kok Wai Chew , Wang Ling Goh
IPC分类号： H01F7/06 , H01F3/00
CPC分类号： H01L28/10 , H01L27/08 , Y10T29/4902 , Y10T29/4906 , Y10T29/49073 , Y10T29/49165
摘要： A method of manufacturing a 3-D spiral stacked inductor is provided having a substrate with a plurality of turns in a plurality of levels wherein the number of levels increases from an inner turn to the outer turn of the inductor. First and second connecting portions are respectively connected to an inner turn and an outermost turn, and a dielectric material contains the first and second connecting portions and the plurality of turns over the substrate.
摘要翻译：提供了一种制造3-D螺旋堆叠电感器的方法，其具有多个电平的多个匝数的基板，其中电平的数量从电感器的内部匝数增加到外部匝数。第一连接部分和第二连接部分分别连接到内匝和最外匝，电介质材料包含基片上的第一和第二连接部分和多个匝。

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