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61. 发明授权

US07782239B2 Multi-stage resettable sigma-delta converters 有权
标题翻译：多级可复位Σ-Δ转换器
公开(公告)号：US07782239B2
公开(公告)日：2010-08-24
申请号：US12259697
申请日：2008-10-28
申请人： Johan Peter Vanderhaegen , Christoph Lang
发明人： Johan Peter Vanderhaegen , Christoph Lang
IPC分类号： H03M1/66
CPC分类号： H03M3/39 , H03M3/414
摘要： A resettable multi-stage sigma-delta analog-to-digital (A/D) converter enables a sampled analog signal to be resolve with fewer cycles than a resettable single sigma-delta A/D converter. The resettable multi-stage converter includes a cascade of at least two resettable sigma-delta loops having a total number of integrators and an allocation of delays, a digital decimation filter, the digital decimation filter being coupled to the at least two resettable sigma-delta loops and the digital decimation filter includes a cascade of integrators, a number of the integrators in the cascade of integrators for the decimation filter being equal to the total number of integrators in the cascade of at least two resettable sigma-delta loops and an allocation of delays in the cascade of integrators being equal to the allocation of delays in the cascade of at least two resettable sigma-delta loops, a plurality of A/D converters having a resolution that is less than a resolution of the resettable multi-stage sigma-delta A/D converter, a plurality of digital-to-analog (D/A) converters, the plurality of A/D converters and the plurality of D/A converters coupling the cascade of at least two resettable sigma-delta loops to the digital decimation filter, and a reset line coupled to the integrators in the cascade of integrators for the at least two resettable sigma-delta loops and coupled to the integrators in the cascade of integrators for the digital decimation filter.
摘要翻译：可复位多级Σ-Δ模数（A / D）转换器使采样模拟信号能够以比可复位单Σ-ΔA / D转换器更少的周期来解决。可复位多级转换器包括具有总数量积分器和延迟分配的至少两个可复位Σ-Δ环路的级联，数字抽取滤波器，数字抽取滤波器耦合到至少两个可复位Σ- 环路和数字抽取滤波器包括级联的积分器，用于抽取滤波器的积分器级联中的多个积分器等于至少两个可复位Σ-Δ回路级联中的积分器的总数，并且分配积分器级联中的延迟等于至少两个可复位Σ-Δ环路级联中的延迟分配，多个A / D转换器具有小于可复位多级Σ-Δ环的分辨率的分辨率， ΔA/ D转换器，多个数模（D / A）转换器，多个A / D转换器和多个D / A转换器耦合至少tw的级联 o可复位的Σ-Δ回路到数字抽取滤波器，以及复位线，耦合到用于至少两个可复位Σ-Δ回路的积分器级联中的积分器，并且耦合到用于数字抽取滤波器的积分器级联中的积分器。

62. 发明申请

US20080297264A1 Oscillating Circuit 有权
标题翻译：振荡电路
公开(公告)号：US20080297264A1
公开(公告)日：2008-12-04
申请号：US11794780
申请日：2005-12-09
申请人： Hans-Dieter Schwarz , Arnd Gangei , Wolfram Bauer , Gerhard Wucher , Christoph Lang , Ermin Esch , Michael Veith , Thomas Mayer , Markus Brockmann
发明人： Hans-Dieter Schwarz , Arnd Gangei , Wolfram Bauer , Gerhard Wucher , Christoph Lang , Ermin Esch , Michael Veith , Thomas Mayer , Markus Brockmann
IPC分类号： H03B5/30
CPC分类号： G01C19/56
摘要： An oscillating circuit includes an analog oscillation element. The oscillating circuit includes at least one analog-to-digital conversion device. A method is for operating an oscillating circuit, in which a mechanical oscillator oscillates at a natural frequency. The oscillation amplitude is measured and digitized. A digital control signal is generated from this with the aid of a digital amplitude controller. A driving signal is generated, in turn, from the digital control signal, the driving signal driving the mechanical oscillator with the aid of a drive unit. This control loop stabilizes the oscillation amplitude.
摘要翻译：振荡电路包括模拟振荡元件。振荡电路包括至少一个模拟 - 数字转换装置。一种用于操作振荡电路的方法，其中机械振荡器以固有频率振荡。振荡幅度被测量和数字化。借助于数字幅度控制器从其产生数字控制信号。驱动信号依次由数字控制信号产生，驱动信号借助于驱动单元驱动机械振荡器。该控制回路稳定振荡幅度。

63. 发明授权

US07313958B2 Rotational rate sensor 有权
标题翻译：转速传感器
公开(公告)号：US07313958B2
公开(公告)日：2008-01-01
申请号：US10471635
申请日：2002-09-25
申请人： Rainer Willig , Jochen Franz , Burkhard Kuhlmann , Joerg Hauer , Udo-Martin Gomez , Dieter Maurer , Christian Doering , Wolfram Bauer , Udo Bischof , Reinhard Neul , Johannes Classen , Christoph Lang , Jens Frey
发明人： Rainer Willig , Jochen Franz , Burkhard Kuhlmann , Joerg Hauer , Udo-Martin Gomez , Dieter Maurer , Christian Doering , Wolfram Bauer , Udo Bischof , Reinhard Neul , Johannes Classen , Christoph Lang , Jens Frey
IPC分类号： G01C19/00
CPC分类号： G01C19/5747
摘要： A rotational rate sensor having a substrate and a Coriolis element is proposed, the Coriolis element being situated over a surface of a substrate; a driving arrangement being provided, by which the Coriolis element is induced to vibrations parallel to a first axis; a detection arrangement being provided, by which an excursion of the Coriolis elements is detectable on the basis of a Coriolis force in a second axis that is provided to be essentially perpendicular to the first axis; the first and second axis being parallel to the surface of the substrate; sensor elements that are designated to be at least partially movable with respect to the substrate being provided; a force-conveying arrangement being provided; the force-conveying arrangement being provided to convey a static force effect between the substrate and at least one of the sensor elements.
摘要翻译：提出了具有基板和科里奥利元件的旋转速率传感器，科里奥利元件位于基板的表面上方; 提供了一种驱动装置，通过该驱动装置将科里奥利元件引入平行于第一轴线的振动; 提供了一种检测装置，通过该检测装置可以基于设置成基本上垂直于第一轴线的第二轴线中的科里奥利力检测科里奥利元件的偏移; 所述第一和第二轴平行于所述基板的表面; 指定为相对于所述基板至少部分移动的传感器元件; 提供力传递装置; 所述力输送装置被提供以在所述基底和所述传感器元件中的至少一个之间传递静态力效应。

64. 发明申请

US20070299635A1 Removing electrical noise in systems with ADCs 有权
标题翻译：消除带有ADC的系统中的电气噪声
公开(公告)号：US20070299635A1
公开(公告)日：2007-12-27
申请号：US11475607
申请日：2006-06-26
申请人： Christoph Lang , Fernando Pancorbo
发明人： Christoph Lang , Fernando Pancorbo
IPC分类号： G06F17/10 , G06F17/40
CPC分类号： H03M1/0678 , H03M1/0626 , H03M1/12
摘要： Signal processing systems and methods are described that include a multi-analog receiver front end with adaptive filtering. The multi-analog receiver front end uses two or more analog-to-digital converters (ADCs) to remove additive electrical noise present in the analog front end. The multiple ADCs are followed in the signal processing path by digital statistical signal processing. The multi-analog receiver front end adaptively determines the passband of a digital filter in a system with input signals having a wide frequency range of interest, and controls filtering of the input signals to the narrow frequency range that includes an input signal. The multi-analog receiver front end, through removal of additive noise, provides higher signal-to-noise ratios for a given power dissipation and chip area when compared to receiver front ends which do not use the multiple ADCs.
摘要翻译：描述信号处理系统和方法，其包括具有自适应滤波的多模拟接收器前端。多模拟接收机前端使用两个或更多个模数转换器（ADC）来消除模拟前端中存在的附加电噪声。通过数字统计信号处理在信号处理路径中跟随多个ADC。多模拟接收器前端通过输入信号具有较宽的频率范围自适应地确定系统中的数字滤波器的通带，并且将输入信号的滤波控制到包括输入信号的窄频率范围。与不使用多个ADC的接收机前端相比，通过去除附加噪声，多模拟接收机前端为给定的功耗和芯片面积提供了更高的信噪比。

65. 发明授权

US5478801A Process for producing tubular parts of high-T.sub.C superconductor material 失效
标题翻译：制造高TC超导体材料的管状部件的方法
公开(公告)号：US5478801A
公开(公告)日：1995-12-26
申请号：US267018
申请日：1994-06-21
申请人： Christoph Lang , Iris Kullmer , Joachim Bock
发明人： Christoph Lang , Iris Kullmer , Joachim Bock
IPC分类号： B28B1/24 , C01G1/00 , C01G29/00 , C04B35/45 , C04B35/622 , H01B12/00 , H01B13/00 , H01L39/24 , H01L39/12
CPC分类号： H01L39/2419 , C04B35/4521 , C04B35/622 , Y10S505/739 , Y10S505/741
摘要： The invention relates to a process for producing cylindrical or round parts of high-T.sub.c superconductor material comprising bismuth, strontium, calcium, copper and oxygen. In this process, a pre-prepared finely-divided oxide mixture with organic additives is first introduced at room temperature into a casting mold. The shaped mixture is then converted into the superconducting shaped part by subsequent thermal treatment.
摘要翻译：本发明涉及一种用于生产包含铋，锶，钙，铜和氧的高Tc超导材料的圆柱形或圆形部件的方法。在该方法中，首先将预先制备的具有有机添加剂的细分的氧化物混合物在室温下引入铸模中。然后通过随后的热处理将成型的混合物转化成超导成型部件。

66. 发明授权

US08786118B2 Energy-efficient wireless communication scheme for wind turbines 有权
标题翻译：节能型风力发电机无线通信方案
公开(公告)号：US08786118B2
公开(公告)日：2014-07-22
申请号：US13189467
申请日：2011-07-22
申请人： Christoph Lang , Mahito Ando , Ralf Schmidt , Lakshmi Venkatraman , Peter Volkmer
发明人： Christoph Lang , Mahito Ando , Ralf Schmidt , Lakshmi Venkatraman , Peter Volkmer
IPC分类号： F03D9/00
CPC分类号： G01D21/00 , F03D7/047 , F05B2260/80 , F05B2270/17 , F05B2270/808 , Y02E10/723
摘要： A method of operating a wind turbine includes providing a wind turbine having a plurality of blades. A respective sensor is attached to each of the blades. First measurements of a structural characteristic of each of the blades are repeatedly taken by use of the sensors. A tolerance band is established for the measurements. Signals indicative of the first measurements are wirelessly transmitted only if the first measurements are outside of the tolerance band. The transmitted signals are received at a controller. An actuator signal is sent from the controller to at least one actuator associated with the blades. The sending is in response to the receiving of the transmitted signals. At least one of the blades is actuated dependent upon the actuator signal. The actuating is performed by the at least one actuator. Second measurements of the structural characteristic of each of the blades are repeatedly taken by use of the sensors after the actuating step. The wirelessly transmitting, receiving, sending and actuating steps are repeated for the second measurements.
摘要翻译：一种操作风力涡轮机的方法包括提供具有多个叶片的风力涡轮机。相应的传感器附接到每个叶片。通过使用传感器来重复地进行每个叶片的结构特征的第一测量。建立了测量公差带。仅当第一测量值超出公差带宽时，指示第一测量的信号才被无线传输。所发送的信号在控制器处被接收。致动器信号从控制器发送到与叶片相关联的至少一个致动器。发送是响应于所发送的信号的接收。至少一个叶片根据致动器信号被致动。致动由至少一个致动器执行。在致动步骤之后，通过使用传感器来重复地进行每个叶片的结构特征的第二测量。对第二次测量重复无线发送，接收，发送和启动步骤。

67. 发明授权

US07924195B2 Hardware-efficient reconstruction for periodic non-uniformly sampled signals 有权
标题翻译：周期性非均匀采样信号的硬件高效重建
公开(公告)号：US07924195B2
公开(公告)日：2011-04-12
申请号：US12395505
申请日：2009-02-27
申请人： Johan Vanderhaegen , Christoph Lang , Frank Hofmann
发明人： Johan Vanderhaegen , Christoph Lang , Frank Hofmann
IPC分类号： H03M1/66
CPC分类号： H03M1/1265
摘要： Method and apparatus for signal reconstruction enabling the sharing of analog-to-digital converter resources among signals. Embodiments include a signal reconstruction method that allows reconstruction of multiple non-uniformly sampled signals while avoiding unwanted side effects such as aliasing.
摘要翻译：用于信号重构的方法和装置，使得能够在信号之间共享模拟 - 数字转换器资源。实施例包括允许重构多个非均匀采样的信号同时避免诸如混叠的不期望的副作用的信号重建方法。

68. 发明授权

US07839227B2 Oscillating circuit having an analog oscillating element 有权
标题翻译：具有模拟振荡元件的振荡电路
公开(公告)号：US07839227B2
公开(公告)日：2010-11-23
申请号：US11794780
申请日：2005-12-09
申请人： Hans-Dieter Schwarz , Arnd Gangei , Wolfram Bauer , Gerhard Wucher , Christoph Lang , Ermin Esch , Michael Veith , Thomas Mayer , Markus Brockmann
发明人： Hans-Dieter Schwarz , Arnd Gangei , Wolfram Bauer , Gerhard Wucher , Christoph Lang , Ermin Esch , Michael Veith , Thomas Mayer , Markus Brockmann
IPC分类号： H03B5/30
CPC分类号： G01C19/56
摘要： An oscillating circuit includes an analog oscillation element. The oscillating circuit includes at least one analog-to-digital conversion device. A method is for operating an oscillating circuit, in which a mechanical oscillator oscillates at a natural frequency. The oscillation amplitude is measured and digitized. A digital control signal is generated from this with the aid of a digital amplitude controller. A driving signal is generated, in turn, from the digital control signal, the driving signal driving the mechanical oscillator with the aid of a drive unit. This control loop stabilizes the oscillation amplitude.
摘要翻译：振荡电路包括模拟振荡元件。振荡电路包括至少一个模拟 - 数字转换装置。一种用于操作振荡电路的方法，其中机械振荡器以固有频率振荡。振荡幅度被测量和数字化。借助于数字幅度控制器从其产生数字控制信号。驱动信号依次由数字控制信号产生，驱动信号借助于驱动单元驱动机械振荡器。该控制回路稳定振荡幅度。

69. 发明申请

US20100103012A1 Multi-Stage Resettable Sigma-Delta Converters 有权
标题翻译：多级可复位Σ-Δ转换器
公开(公告)号：US20100103012A1
公开(公告)日：2010-04-29
申请号：US12259697
申请日：2008-10-28
申请人： Johan Peter Vanderhaegen , Christoph Lang
发明人： Johan Peter Vanderhaegen , Christoph Lang
IPC分类号： H03M3/00
CPC分类号： H03M3/39 , H03M3/414
摘要： A resettable multi-stage sigma-delta analog-to-digital (A/D) converter enables a sampled analog signal to be resolve with fewer cycles than a resettable single sigma-delta A/D converter. The resettable multi-stage converter includes a cascade of at least two resettable sigma-delta loops having a total number of integrators and an allocation of delays, a digital decimation filter, the digital decimation filter being coupled to the at least two resettable sigma-delta loops and the digital decimation filter includes a cascade of integrators, a number of the integrators in the cascade of integrators for the decimation filter being equal to the total number of integrators in the cascade of at least two resettable sigma-delta loops and an allocation of delays in the cascade of integrators being equal to the allocation of delays in the cascade of at least two resettable sigma-delta loops, a plurality of A/D converters having a resolution that is less than a resolution of the resettable multi-stage sigma-delta A/D converter, a plurality of digital-to-analog (D/A) converters, the plurality of A/D converters and the plurality of D/A converters coupling the cascade of at least two resettable sigma-delta loops to the digital decimation filter, and a reset line coupled to the integrators in the cascade of integrators for the at least two resettable sigma-delta loops and coupled to the integrators in the cascade of integrators for the digital decimation filter.
摘要翻译：可复位多级Σ-Δ模数（A / D）转换器使采样模拟信号能够以比可复位单Σ-ΔA / D转换器更少的周期来解决。可复位多级转换器包括具有总数量积分器和延迟分配的至少两个可复位Σ-Δ环路的级联，数字抽取滤波器，数字抽取滤波器耦合到至少两个可复位Σ- 环路和数字抽取滤波器包括级联的积分器，用于抽取滤波器的积分器级联中的多个积分器等于至少两个可复位Σ-Δ环路级联中的积分器的总数，并且分配积分器级联中的延迟等于至少两个可复位Σ-Δ环路级联中的延迟分配，多个A / D转换器具有小于可复位多级Σ-Δ环的分辨率的分辨率， ΔA/ D转换器，多个数模（D / A）转换器，多个A / D转换器和多个D / A转换器耦合至少tw的级联 o可复位的Σ-Δ回路到数字抽取滤波器，以及复位线，耦合到用于至少两个可复位Σ-Δ回路的积分器级联中的积分器，并且耦合到用于数字抽取滤波器的积分器级联中的积分器。

70. 发明申请

US20090210185A1 System and method for measuring DC offset in a sensor output by modulating a signal-independent operating parameter of the sensor 有权
标题翻译：通过调制传感器的信号无关操作参数来测量传感器输出中的直流偏移的系统和方法
公开(公告)号：US20090210185A1
公开(公告)日：2009-08-20
申请号：US12070641
申请日：2008-02-20
申请人： Pedram Lajevardi , Valdimir Plamenov Petkov , Christoph Lang
发明人： Pedram Lajevardi , Valdimir Plamenov Petkov , Christoph Lang
IPC分类号： G01D18/00 , G06F19/00
CPC分类号： G01D3/036
摘要： A sensor circuit enables detection of DC offset in a sensor output signal. The sensor circuit includes a sensor that generates a sensor output signal corresponding to a physical signal coupled to an input of the sensor, and a modulator that generates a modulation signal, the modulator being coupled to the sensor to modulate a physical parameter of the sensor and to enable a DC offset to be separated from the sensor output signal. To enable the circuit to measure the DC offset even though the sensor output signal is inversely proportional to the output signal, the circuit includes a feedback circuit configured to generate a feedback signal. The feedback signal is coupled to the input of the sensor to enable the physical parameter of the sensor to be modulated without modulating a portion of the sensor output signal attributable to the physical signal being converted to an electrical signal by the sensor.
摘要翻译：传感器电路能够检测传感器输出信号中的直流偏移。该传感器电路包括一个传感器，该传感器产生一个对应于耦合到该传感器输入端的物理信号的传感器输出信号，以及一个调制器，产生一个调制信号，该调制器耦合到该传感器以调制该传感器的一个物理参数，以使DC偏移与传感器输出信号分离。为了使电路测量DC偏移，即使传感器输出信号与输出信号成反比，电路包括被配置为产生反馈信号的反馈电路。反馈信号耦合到传感器的输入，以使得能够调制传感器的物理参数，而不需要将由归因于物理信号的传感器输出信号的一部分转换成电信号传感器。

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