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61. 发明授权

US5232875A Method and apparatus for improving planarity of chemical-mechanical planarization operations 失效
标题翻译：改善化学机械平面化操作平面性的方法和装置
公开(公告)号：US5232875A
公开(公告)日：1993-08-03
申请号：US961565
申请日：1992-10-15
申请人： Mark E. Tuttle , Trung T. Doan , Angus C. Fox , Gurtej S. Sandhu , Hugh E. Stroupe
发明人： Mark E. Tuttle , Trung T. Doan , Angus C. Fox , Gurtej S. Sandhu , Hugh E. Stroupe
IPC分类号： B24B1/00 , B24B37/10 , H01L21/00 , H01L21/304
CPC分类号： B24B37/102 , H01L21/67023 , Y10S438/959
摘要： A method and apparatus for improving planarity of chemical mechanical planarization of semiconductor wafers. The wafer is affixed to the planar surface of a wafer carrier. A planar platen, on which is mounted a polishing pad, is moved about in a plane parallel to the pad surface with either an orbital, fixed-direction vibratory, or random-direction vibratory motion. In one embodiment of the invention, pressure between the surface of the wafer to be polished and the moving polishing pad is generated by the force of gravity acting on at least the wafer and the carrier; in another it is provided by a mechanical force applied normal to the wafer surface. The polishing pad is wetted with a slurry having abrasive particles suspended in a liquid which may be chemically reactive with respect to at least one material on the wafer.
摘要翻译：一种用于改善半导体晶片的化学机械平面化的平面性的方法和装置。晶片固定在晶片载体的平面上。安装有抛光垫的平面压板在与轨道，固定方向振动或随机振动运动平行的平面中移动。在本发明的一个实施例中，待抛光的晶片的表面与移动的抛光垫之间的压力通过作用于至少晶片和载体的重力产生; 在另一个中，它由通常施加于晶片表面的机械力提供。抛光垫用具有悬浮在液体中的研磨颗粒的浆液润湿，该液体可以相对于晶片上的至少一种材料具有化学反应性。

62. 发明授权

US5229331A Method to form self-aligned gate structures around cold cathode emitter tips using chemical mechanical polishing technology 失效
标题翻译：使用化学机械抛光技术在冷阴极发射器尖端周围形成自对准栅极结构的方法
公开(公告)号：US5229331A
公开(公告)日：1993-07-20
申请号：US837453
申请日：1992-02-14
申请人： Trung T. Doan , J. Brett Rolfson , Tyler A. Lowrey , David A. Cathey
发明人： Trung T. Doan , J. Brett Rolfson , Tyler A. Lowrey , David A. Cathey
IPC分类号： H01J1/304 , H01J9/02 , H01L21/3105
CPC分类号： H01J9/025 , H01L21/31053 , H01J2201/30426 , H01J2201/319 , H01J2209/0226
摘要： A chemical mechanical polishing process for the formation of self-aligned gate structures surrounding an electron emission tip for use in field emission displays in which the emission tip is i) optionally sharpened through oxidation, ii) deposited with a conformal insulating material, iii) deposited with a flowable insulating material, which is reflowed below the level of the tip, iv) optionally deposited with another insulating material, v) deposited with a conductive material layer, and vi) optionally, deposited with a buffering material, vii) planarized with a chemical mechanical planarization (CMP) step, to expose the conformal insulating layer, viii) wet etched to remove the insulating material and thereby expose the emission tip, afterwhich ix) the emitter tip may be coated with a material having a lower work function than silicon.
摘要翻译：用于形成围绕用于场发射显示器中的电子发射尖端的自对准栅极结构的化学机械抛光工艺，其中发射尖端i）可选地通过氧化锐化，ii）用保形绝缘材料沉积，iii）沉积具有可流动的绝缘材料，其被回流到尖端的水平面以下，iv）任选地沉积有另外的绝缘材料，v）沉积有导电材料层，以及vi）任选地沉积有缓冲材料，vii）化学机械平面化（CMP）步骤，暴露保形绝缘层，viii）湿式蚀刻以去除绝缘材料，从而暴露发射尖端，之后ix）发射极尖端可以涂覆具有比硅功函数低的材料。

63. 发明授权

US5132236A Method of semiconductor manufacture using an inverse self-aligned mask 失效
标题翻译：使用逆自对准掩模的半导体制造方法
公开(公告)号：US5132236A
公开(公告)日：1992-07-21
申请号：US738175
申请日：1991-07-30
申请人： Trung T. Doan
发明人： Trung T. Doan
IPC分类号： H01L21/033 , H01L21/266 , H01L21/8238
CPC分类号： H01L21/266 , H01L21/0337 , H01L21/8238 , Y10S148/102
摘要： A process for fabricating a CMOS integrated circuit having both P-channel and N-channel areas in the substrate. The process forms a single self-aligned mask to define the positions of both of the channel areas on the substrate. The process includes: depositing a maskable material on the substrate; photopatterning and etching the maskable material to expose a pattern of areas on the substrate; tailoring the pattern of areas as P-channel or N-channel; depositing a second material over the maskable material and over the tailored areas of the substrate; chemically mechanically polishing (CMP) the second material to an endpoint of the maskable material; selectively etching the maskable material to expose a second pattern of areas on the substrate aligned with the first pattern of areas; and then tailoring the second pattern of areas as P-channel or N-channel.
摘要翻译：一种用于制造在衬底中具有P沟道和N沟道区域的CMOS集成电路的工艺。该过程形成单个自对准掩模以限定衬底上两个通道区域的位置。该方法包括：将可屏蔽材料沉积在基底上; 照相图案化和蚀刻可屏蔽材料以暴露衬底上的区域图案; 将区域的图案定制为P通道或N通道; 将第二材料沉积在所述可屏蔽材料上方和所述基材的所述定制区域上; 将第二材料化学机械抛光（CMP）到可屏蔽材料的端点; 选择性地蚀刻可屏蔽材料以暴露与第一图案区域对准的衬底上的第二图案区域; 然后将第二种区域划分为P信道或N信道。

64. 发明授权

US08097514B2 Method for an integrated circuit contact 失效
标题翻译：集成电路接触方法
公开(公告)号：US08097514B2
公开(公告)日：2012-01-17
申请号：US12565280
申请日：2009-09-23
申请人： Charles H. Dennison , Trung T. Doan
发明人： Charles H. Dennison , Trung T. Doan
IPC分类号： H01L21/336
CPC分类号： H01L21/31144 , H01L21/76807 , H01L21/76808 , H01L21/76829 , Y10S438/95 , Y10S438/97
摘要： A support material for a semiconductor device is processed. An opening having a width is etched into the support material for the semiconductor device using a first etch mask. A portion of the opening is etched using a second etch mask without alignment thereof to the width of the opening.
摘要翻译：对半导体器件的支撑材料进行处理。使用第一蚀刻掩模将具有宽度的开口蚀刻到用于半导体器件的支撑材料中。使用第二蚀刻掩模蚀刻开口的一部分，而不对准开口的宽度。

65. 发明授权

US07927190B2 Retaining ring with shaped surface 有权
公开(公告)号：US07927190B2
公开(公告)日：2011-04-19
申请号：US12049650
申请日：2008-03-17
申请人： Hung Chih Chen , Steven M. Zuniga , Charles C. Garretson , Douglas R. McAllister , Jian Lin , Stacy Meyer , Sidney P. Huey , Jeonghoon Oh , Trung T. Doan , Jeffrey Schmidt , Martin S. Wohlert , Kerry F. Hughes , James C. Wang , Danny Cam Toan Lu , Romain Beau De Lamenie , Venkata R. Balagani , Aden Martin Allen , Michael Jon Fong
发明人： Hung Chih Chen , Steven M. Zuniga , Charles C. Garretson , Douglas R. McAllister , Jian Lin , Stacy Meyer , Sidney P. Huey , Jeonghoon Oh , Trung T. Doan , Jeffrey Schmidt , Martin S. Wohlert , Kerry F. Hughes , James C. Wang , Danny Cam Toan Lu , Romain Beau De Lamenie , Venkata R. Balagani , Aden Martin Allen , Michael Jon Fong
IPC分类号： B24B5/00
CPC分类号： B24B37/32 , Y10T29/49815
摘要： A retaining ring can be shaped by machining or lapping the bottom surface of the ring to form a shaped profile in the bottom surface. The bottom surface of the retaining ring can include flat, sloped and curved portions. The lapping can be performed using a machine that dedicated for use in lapping the bottom surface of retaining rings. During the lapping the ring can be permitted to rotate freely about an axis of the ring. The bottom surface of the retaining ring can have curved or flat portions.

66. 发明授权

US07871934B2 Method for an integrated circuit contact 失效
标题翻译：集成电路接触方法
公开(公告)号：US07871934B2
公开(公告)日：2011-01-18
申请号：US11841906
申请日：2007-08-20
申请人： Charles H. Dennison , Trung T. Doan
发明人： Charles H. Dennison , Trung T. Doan
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/76807 , H01L21/76808 , H01L21/76829 , Y10S438/95 , Y10S438/97
摘要： A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect trough. The process includes the steps of: forming an insulating layer on the surface of a substrate; forming an etch stop layer on the surface of the insulating layer; forming an opening in the etch stop layer; etching to a first depth through the opening in the etch stop layer and into the insulating layer to form an interconnect trough; forming a photoresist mask on the surface of the etch stop layer and in the trough; and continuing to etch through the insulating layer until reaching the surface of the substrate to form a contact hole. The above process may be repeated one or more times during the formation of multilevel metal integrated circuits.
摘要翻译：在集成电路和器件的制造中提供用于形成垂直触点的工艺。该过程消除了对精确掩模对准的需要，并允许独立于互连槽的蚀刻来控制接触孔的蚀刻。该方法包括以下步骤：在衬底的表面上形成绝缘层; 在绝缘层的表面上形成蚀刻停止层; 在蚀刻停止层中形成开口; 蚀刻到穿过蚀刻停止层中的开口的第一深度并进入绝缘层以形成互连槽; 在蚀刻停止层和槽中的表面上形成光致抗蚀剂掩模; 并且继续蚀刻通过绝缘层直到到达衬底的表面以形成接触孔。在形成多级金属集成电路期间，可以重复上述过程一次或多次。

67. 发明申请

US20100282164A1 METHODS AND SYSTEMS FOR CONTROLLING TEMPERATURE DURING MICROFEATURE WORKPIECE PROCESSING, E.G., CVD DEPOSITION 有权
标题翻译：微生物加工过程中控制温度的方法和系统，E.G.，CVD沉积
公开(公告)号：US20100282164A1
公开(公告)日：2010-11-11
申请号：US12840153
申请日：2010-07-20
申请人： Kevin L. Beaman , Trung T. Doan , Lyle D. Breiner , Ronald A. Weimer , Er-Xuan Ping , David J. Kubista , Cem Basceri , Lingyi A. Zheng
发明人： Kevin L. Beaman , Trung T. Doan , Lyle D. Breiner , Ronald A. Weimer , Er-Xuan Ping , David J. Kubista , Cem Basceri , Lingyi A. Zheng
IPC分类号： C23C16/00 , B05C11/00
CPC分类号： C23C16/00 , C23C16/46
摘要： The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature.
摘要翻译：本公开提供了用于控制温度的方法和系统。该方法在沉积工艺中控制温度，例如通过CVD沉积热反射材料方面具有特别的用途。一个示例性实施例提供了一种方法，其涉及监测沉积室外的第一温度和沉积室内的第二温度。通过（a）将控制温度与目标温度进行比较，可以根据斜坡分布来增加沉积室中的内部温度，以及（b）响应于比较的结果，选择性地将热量输送到沉积室。目标温度可以根据斜坡分布来确定，但是一个实现中的控制温度在第一温度和第二温度之间交替。

68. 发明授权

US07588677B2 Methods and apparatus for electrical, mechanical and/or chemical removal of conductive material from a microelectronic substrate 失效
公开(公告)号：US07588677B2
公开(公告)日：2009-09-15
申请号：US11451723
申请日：2006-06-12
申请人： Whonchee Lee , Scott G. Meikle , Scott E. Moore , Trung T. Doan
发明人： Whonchee Lee , Scott G. Meikle , Scott E. Moore , Trung T. Doan
IPC分类号： B23H5/06
CPC分类号： C25F7/00 , B23H5/08 , B24B37/042 , B24B37/046 , B24B37/20 , H01L21/32125
摘要： A method and apparatus for removing conductive material from a microelectronic substrate. In one embodiment, the method can include engaging a microelectronic substrate with a polishing surface of a polishing pad, electrically coupling a conductive material of the microelectronic substrate to a source of electrical potential, and oxidizing at least a portion of the conductive material by passing an electrical current through the conductive material from the source of electrical potential. For example, the method can include positioning first and second electrodes apart from a face surface of the microelectronic substrate and disposing an electrolytic fluid between the face surface and the electrodes with the electrodes in fluid communication with the electrolytic fluid. The method can further include removing the portion of conductive material from the microelectronic substrate by moving at least one of the microelectronic and the polishing pad relative to the other. Accordingly, metals such as platinum can be anisotropically removed from the microelectronic substrate. The characteristics of the metal removal can be controlled by controlling the characteristics of the electrical signal applied to the microelectronic substrate, and the characteristics of a liquid disposed between the microelectronic substrate and the polishing pad.

69. 发明授权

US07422635B2 Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces 失效
标题翻译：用于加工微型工件的方法和装置，例如用于在微型工件上沉积材料
公开(公告)号：US07422635B2
公开(公告)日：2008-09-09
申请号：US10652461
申请日：2003-08-28
申请人： Lingyi A. Zheng , Trung T. Doan , Lyle D. Breiner , Er-Xuan Ping , Kevin L. Beaman , Ronald A. Weimer , David J. Kubista , Cem Basceri
发明人： Lingyi A. Zheng , Trung T. Doan , Lyle D. Breiner , Er-Xuan Ping , Kevin L. Beaman , Ronald A. Weimer , David J. Kubista , Cem Basceri
IPC分类号： C23C16/00 , C23C16/455 , H01L21/306
CPC分类号： C23C16/45546 , C23C16/45578 , C23C16/4583
摘要： The present disclosure suggests several systems and methods for batch processing of microfeature workpieces, e.g., semiconductor wafers or the like. One exemplary implementation provides a method of depositing a reaction product on each of a batch of workpieces positioned in a process chamber in a spaced-apart relationship. A first gas may be delivered to an elongate first delivery conduit that includes a plurality of outlets spaced along a length of the conduit. A first gas flow may be directed by the outlets to flow into at least one of the process spaces between adjacent workpieces along a first vector that is transverse to the direction in which the workpieces are spaced. A second gas may be delivered to an elongate second delivery conduit that also has outlets spaced along its length. A second gas flow of the second gas may be directed by the outlets to flow into the process spaces along a second vector that is transverse to the first direction.
摘要翻译：本公开提出了用于批量处理微特征工件（例如半导体晶片等）的几种系统和方法。一个示例性实施方案提供了一种在间隔开的关系中将反应产物沉积在处理室中的一批工件的每一个上的方法。第一气体可以被输送到细长的第一输送管道，该第一输送管道包括沿管道的长度间隔开的多个出口。第一气流可以由出口引导，沿着横向于工件间隔开的方向的第一向量流入相邻工件之间的至少一个工艺空间。第二气体可以被输送到细长的第二输送管道，该第二输送管道也具有沿其长度间隔开的出口。第二气体的第二气流可以由出口引导，沿着横向于第一方向的第二向量流入处理空间。

70. 发明授权

US07323230B2 Coating for aluminum component 有权
标题翻译：铝组件涂层
公开(公告)号：US07323230B2
公开(公告)日：2008-01-29
申请号：US10910096
申请日：2004-08-02
申请人： Trung T. Doan , Kenny King-Tai Ngan
发明人： Trung T. Doan , Kenny King-Tai Ngan
IPC分类号： H05H1/24 , H05H1/30 , C23C14/00
CPC分类号： C23C16/20 , C23C16/0227 , C23C16/0272 , C23C16/56
摘要： A coated aluminum component for a substrate processing chamber comprises an aluminum component having a surface; a first aluminum oxide layer formed on the surface of the aluminum component, the aluminum oxide layer having a surface comprising penetrating surface features; and a second aluminum oxide layer on the first aluminum oxide layer, the second aluminum oxide layer substantially completely filling the penetrating surface features of the first aluminum oxide layer. A method of forming the coated aluminum component is also described.
摘要翻译：用于基板处理室的涂覆铝部件包括具有表面的铝部件; 形成在铝部件的表面上的第一氧化铝层，所述氧化铝层具有包括穿透表面特征的表面; 和在第一氧化铝层上的第二氧化铝层，第二氧化铝层基本上完全填充第一氧化铝层的穿透表面特征。还描述了形成涂覆的铝组分的方法。

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