专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2020063566A1 COMPOSITE RIGHT-HAND LEFT-HAND DISTRIBUTED ATTENUATOR 审中-公开
公开(公告)号：WO2020063566A1
公开(公告)日：2020-04-02
申请号：PCT/CN2019/107445
申请日：2019-09-24
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： TAGHIZADEH ANSARI, Kimia , ROSS, Tyler Neil
IPC分类号： H03H11/24
摘要： A variable loss attenuator is provided. Two or more controllable stages each include a differential or single-ended π network. Each π network includes one or more series elements connected in series between the signal input and the signal output. Each series element includes a series transistor, which may potentially be provided without an inductor in parallel. Each π network includes a plurality of shunt elements each including at least one respective shunt transistor. An input stage connects to the first controllable stage and an output stage connects from the last controllable stage. Intermediate stages connect the controllable stages to one another. Each of the input stage, output stage, and intermediate stages include a right-handed transmission line component and coupled between the signal input and a first one of the controllable stages. Shunt inductors are located at inputs and outputs of each of the controllable stages.

2. 发明申请

WO2011080536A1 ADJUSTABLE MOS RESISTOR 审中-公开
标题翻译：可调电阻
公开(公告)号：WO2011080536A1
公开(公告)日：2011-07-07
申请号：PCT/IB2009/055956
申请日：2009-12-28
申请人： NXP B.V. , KOHSIEK, Cord-Heinrich
发明人： KOHSIEK, Cord-Heinrich
IPC分类号： H03H11/24
CPC分类号： H03H11/245
摘要： A variety of circuits, methods and devices are implemented for providing an adjustable resistance. According to one such implementation an adjustable resistive device includes a metal-oxide semiconductor (MOS) transistor having a gate, a drain, a source, and a body. First circuitry controls a resistance from drain to source by applying a gate voltage that is a function of a variable control input. Second circuitry adjusts a voltage at the body according to a drain voltage and a source voltage, whereby the resistance from drain to source is substantially linear for a given value of the variable control input and over a voltage range.
摘要翻译：实现了各种电路，方法和装置以提供可调电阻。根据一种这样的实施方案，可调电阻器件包括具有栅极，漏极，源极和主体的金属氧化物半导体（MOS）晶体管。第一电路通过施加作为可变控制输入的函数的栅极电压来控制从漏极到源极的电阻。第二电路根据漏极电压和源极电压来调节电压，由此对于给定的可变控制输入值和电压范围，漏极到源极的电阻基本上是线性的。

3. 发明申请

WO2005064791A1 可変アッテネータ审中-公开
标题翻译：可变衰减器
公开(公告)号：WO2005064791A1
公开(公告)日：2005-07-14
申请号：PCT/JP2004/018223
申请日：2004-12-07
申请人：松下電器産業株式会社 , 小島厳
发明人：小島厳
IPC分类号： H03H11/24
CPC分类号： H03H11/245 , H03G1/007
摘要：　実効的に連続制御可能で製造上のばらつきの小さい可変アッテネータを提供する。　本発明の可変アッテネータは、第１の信号入力端子と、第１の信号出力端子と、制御電圧を入力する第１の制御端子と、制御電圧をＭ個（Ｍは２以上の正整数）の制御信号に変換するアナログ／デジタル変換器と、第１の信号入力端子と第１の信号出力端子との間に並列及び／又は直列に接続され、いずれかの制御信号によってインピーダンスを可変されるＮ個（ＮはＮ≧Ｍの正整数）の可変インピーダンス素子と、を有する。
摘要翻译：提供可变衰减器，其可有效且连续地控制并且具有小的制造不规则性。可变衰减器包括：第一信号输入端; 第一信号输出端; 用于输入控制电压的第一控制端; 用于将控制电压转换为M（M是不小于2的整数）的模拟/数字转换器; 并且N（N是满足N≥M的正整数）可变阻抗元件并联和/或串联连接在第一信号输入端和第一信号输出端之间并具有由任何控制信号改变的阻抗。

4. 发明申请

WO00001070A1 AN 'ON-CHIP' HIGHER-TO-LOWER VOLTAGE INPUT STAGE 审中-公开
标题翻译：一个“片上”高电压输入级
公开(公告)号：WO00001070A1
公开(公告)日：2000-01-06
申请号：PCT/GB1998/001900
申请日：1998-06-30
IPC分类号： H03H11/24 , H03K19/0185
CPC分类号： H03K19/00315
摘要： The present invention concerns an input stage of an integrated circuit comprising first and second voltage dividers that are used to divide an input voltage and a reference voltage. The input voltage capable of having a value greater than that which is used to supply the voltage dividers. The voltage dividers providing divided output voltages that are used to control a comparator that produces an amplified digital output voltage.
摘要翻译：本发明涉及一种集成电路的输入级，其包括用于分压输入电压和参考电压的第一和第二分压器。该输入电压能够具有大于用于提供分压器的值的值。分压器提供分压输出电压，用于控制产生放大数字输出电压的比较器。

5. 发明申请

WO98054893A3 VIDEO SIGNAL EQUALIZATION SYSTEM 审中-公开
标题翻译：视频信号均衡系统
公开(公告)号：WO98054893A3
公开(公告)日：1999-06-17
申请号：PCT/US1998/010768
申请日：1998-05-26
IPC分类号： H03H11/24 , H04B3/14 , H04N7/10 , H04N5/21
CPC分类号： H03H11/24 , H04B3/145 , H04N7/102 , H04N7/108
摘要： An equalization system for compensating the attenuation of high-frequency signals in a twisted wire cable. An equalizing circuit comprises a number of operational amplifiers with a variable impedance connected in a feedback path. The variable impedance comprises a varactor diode whose capacitance changes with the magnitude of a reverse bias voltage. The reverse bias voltage is controlled using a digital-to-analog converter and a gain amplifier to increase the gain of the operational amplifiers at high frequencies. A microprocessor selects the appropriate reverse bias voltages depending on the length of the twisted wire cable to be compensated.
摘要翻译：均衡系统，用于补偿双绞线中高频信号的衰减。均衡电路包括连接在反馈路径中的具有可变阻抗的多个运算放大器。可变阻抗包括其容值随着反向偏置电压的大小而变化的变容二极管。使用数模转换器和增益放大器来控制反向偏置电压，以提高高频运算放大器的增益。微处理器根据要补偿的绞合线缆的长度来选择适当的反向偏置电压。

6. 发明申请

WO2021116795A1 AN ELECTRONIC CIRCUIT THAT GENERATES A HIGH-IMPEDANCE LOAD AND AN ASSOCIATED METHOD 审中-公开
公开(公告)号：WO2021116795A1
公开(公告)日：2021-06-17
申请号：PCT/IB2020/060645
申请日：2020-11-12
申请人： INSIAVA (PTY) LTD.
发明人： SUNTKEN, Artur, Wilhelm , FAURÉ, Nicolaas, Mattheus
IPC分类号： H03H11/24
摘要： An electronic circuit configured to present a high-impedance load between a load point (VL) and a reference point includes a capacitive element (C) provided between a first node (Node A) and the reference point, a first element (D1) connected in parallel with the capacitive element (C), a first switching element (S1) provided in series between the first node (A) and a voltage source point, a second switching element (S2) provided between the first node (A) and a second node (Node B), a second element (D2) connected between the second switching element (S2), the load point, and the reference point, and timing control logic configured to implement three stages. In a charging stage, the first switching element (S1) is closed and the second switching element (S2) to charge a nodal voltage vD(t) at the first node (A). In discharge stage, the first switching element (Si) is open and the second switching element (S2) is open to enable discharging of the capacitive element (C) through the first element (D1). In a transfer stage, the second switching element (S2) is closed to connect the first node (A) and the second node (B), after which the second switching element (S2) is opened and the second element (D2) is biased to present the high-impedance load.

7. 发明申请

WO2017147243A1 ATTENUATION CIRCUITS WITH LOW INSERTION LOSS, AND MODULES AND DEVICES USING SAME 审中-公开
标题翻译：具有低插入损耗的衰减电路，以及使用相同的模块和器件
公开(公告)号：WO2017147243A1
公开(公告)日：2017-08-31
申请号：PCT/US2017/019044
申请日：2017-02-23
申请人： SKYWORKS SOLUTIONS, INC.
发明人： SRIRATTANA, Nuttapong
IPC分类号： H03H11/24 , H03H7/25 , H03G1/00
CPC分类号： H04B1/40 , H01P1/22 , H01P5/02 , H03H11/245
摘要： An attenuation circuit with a low insertion loss is provided. The attenuation circuit includes an input to receive an input signal, an output to provide an attenuated signal, an attenuator coupled between the input and the output, the attenuator being configured to attenuate the input signal, an isolation switch constructed to isolate the attenuator from the input or the output when in a bypass mode, and a bypass switch coupled in parallel with the attenuator to couple the input to the output when in the bypass mode.
摘要翻译：提供具有低插入损耗的衰减电路。衰减电路包括接收输入信号的输入，提供衰减信号的输出，耦合在输入和输出之间的衰减器，衰减器配置成衰减输入信号，隔离开关构造成将衰减器与输入或处于旁路模式时的输出，旁路开关与衰减器并联以在旁路模式下将输入耦合至输出。

8. 发明申请

WO2017095519A1 LOW PHASE SHIFT, HIGH FREQUENCY ATTENUATOR 审中-公开
标题翻译：低相移，高频衰减器
公开(公告)号：WO2017095519A1
公开(公告)日：2017-06-08
申请号：PCT/US2016/054929
申请日：2016-09-30
申请人： PEREGRINE SEMICONDUCTOR CORPORATION
发明人： SHARMA, Vikas
IPC分类号： H03H7/24 , H01P1/22 , H03H11/24
CPC分类号： H03H11/245 , H01P1/227 , H03H7/24 , H03H11/28 , H03K5/08 , H03K17/687
摘要： A wideband RF attenuator circuit that has a reduced impact on the phase of an applied signal when switched between an attenuation state and a non-attenuating reference or bypass state. A low phase shift attenuation at high RF frequencies can be achieved by utilizing a switched signal path attenuator topology with multiple distributed transmission line elements per signal path to provide broadband operation, distribute parasitic influences, and improve isolation to achieve higher attenuation at higher frequencies while still maintaining low phase shift operational characteristics. In an alternative embodiment, extension to even higher frequencies can be achieved by utilizing a quarter-wave transmission line element at the signal interfaces of each signal path, thereby improving insertion loss and power handling.
摘要翻译：宽带RF衰减器电路当在衰减状态和非衰减参考或旁路状态之间切换时，对所施加信号的相位具有减小的影响。通过利用每个信号路径具有多个分布式传输线元件的开关信号路径衰减器拓扑结构来实现高RF频率下的低相移衰减，以提供宽带操作，分配寄生影响并改善隔离以在较高频率下实现更高的衰减，同时仍然保持低相移操作特性。在一个替代实施例中，通过在每个信号路径的信号接口处利用四分之一波长传输线元件可以实现对甚至更高频率的扩展，从而改善插入损耗和功率处理。

9. 发明申请

WO2012015849A1 RF ISOLATION SWITCH CIRCUIT 审中-公开
标题翻译：射频隔离开关电路
公开(公告)号：WO2012015849A1
公开(公告)日：2012-02-02
申请号：PCT/US2011/045427
申请日：2011-07-26
申请人： QUALCOMM INCORPORATED , YAN, Hongyan , SANKARANARAYANAN, Janakiram Ganesh , ASURI, Bhushan Shanti , KHATRI, Himanshu , PANIKKATH, Vinod V.
发明人： YAN, Hongyan , SANKARANARAYANAN, Janakiram Ganesh , ASURI, Bhushan Shanti , KHATRI, Himanshu , PANIKKATH, Vinod V.
IPC分类号： H03K17/06 , H03K17/16 , H03K17/687 , H03H11/32 , H03H7/42 , H04B1/04 , H03H11/24 , H04B1/48 , H01P1/22
CPC分类号： H03K17/063 , H03K17/161 , H03K17/687 , H03K2017/066 , H03K2217/0018 , H03K2217/0054
摘要： In a first aspect, an RF switch includes a main transistor and a gate-to-source shorting circuit. When the RF switch is turned off, the gate-to- source shorting circuit is turned on to short the source and gate of the main transistor together, thereby preventing a Vgs from developing that would cause the main transistor to leak. When the RF switch is turned on, the gate-to-source shorting circuit is turned off to decouple the source from the gate. The gate is supplied with a digital logic high voltage to turn on the main transistor. In a second aspect, an RF switch includes a main transistor that has a bulk terminal. When the RF switch is turned off, the bulk is connected to ground through a high resistance. When the RF switch is turned on, the source and bulk are shorted together thereby reducing the threshold voltage of the main transistor.
摘要翻译：在第一方面中，RF开关包括主晶体管和栅极至源极短路电路。当RF开关关闭时，栅极 - 源极短路电路导通，将主晶体管的源极和栅极连接在一起，从而防止Vgs发展，导致主晶体管泄漏。当RF开关导通时，栅极 - 源极短路电路被关闭，以使源极与栅极分离。门提供数字逻辑高电压以接通主晶体管。在第二方面，RF开关包括具有大容量端子的主晶体管。当RF开关关闭时，体积通过高电阻连接到地。当RF开关导通时，源极和体积短路在一起，从而降低主晶体管的阈值电压。

10. 发明申请

WO2011152896A1 BROADBAND ANALOG RADIO-FREQUENCY COMPONENTS 审中-公开
标题翻译：宽带模拟无线电频率组件
公开(公告)号：WO2011152896A1
公开(公告)日：2011-12-08
申请号：PCT/US2011/024542
申请日：2011-02-11
申请人： NEWLANS, INC. , GUPTA, Dev, V. , LAI, Zhiguo
发明人： GUPTA, Dev, V. , LAI, Zhiguo
IPC分类号： H03F3/45 , H03H11/04 , H03H11/24 , H04L25/03
CPC分类号： H03F3/45183 , H03F1/223 , H03F3/19 , H03F3/45188 , H03F3/45197 , H03F3/45201 , H03F2200/264 , H03F2200/36 , H03F2203/45318 , H03F2203/45374 , H03F2203/45644 , H03F2203/45686 , H03F2203/45702 , H03H7/24 , H03H7/25 , H03H7/482 , H03H7/487 , H03H11/1256 , H03H11/53 , H03H2210/017 , H03H2210/021 , H03H2210/028 , H03H2210/036 , H03H2210/04
摘要： Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.
摘要翻译：宽带模拟射频设备可用于为可扩展的模拟信号处理器创建构建块，该处理器的工作频率可达50 MHz至20 GHz或更高。示例器件包括使用深亚微米CMOS技术实现的积分器（跨导体），数字控制衰减器，缓冲器和可扩展的夏季。由于器件是用CMOS实现的，所以迹线/器件尺寸与信号波长的比率与印刷电路板中实现的低频器件的比率大致相同。将此扩展与高增益/高带宽相结合，可实现宽带模拟信号处理的反馈和可编程性。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式