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1. 发明申请

WO2008055272A2 INTEGRATING DATA FROM SYMMETRIC AND ASYMMETRIC MEMORY 审中-公开
标题翻译：集成对称和非对称内存的数据
公开(公告)号：WO2008055272A2
公开(公告)日：2008-05-08
申请号：PCT/US2007/083671
申请日：2007-11-05
申请人： VIRIDENT SYSTEMS, INC. , KARAMCHETI, Vijay , OKIN, Kenneth A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
发明人： KARAMCHETI, Vijay , OKIN, Kenneth A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
IPC分类号： G06F12/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.
摘要翻译：存储在主存储器的对称和非对称存储器组件中的数据通过将第一数据识别为具有适合于存储在非对称存储器组件中的访问特性而被集成。第一个数据包含在要写入非对称内存组件的数据集合中。在要写入不对称存储器组件的数据集合内识别出一定数量的数据。在数据集合内将数据量与容量阈值进行比较，以确定对非对称存储器组件的块写入是否通过数据量来证明合理。如果证明合理，数据收集将加载到非对称内存组件。

2. 发明申请

WO2008055271A2 SEAMLESS APPLICATION ACCESS TO HYBRID MAIN MEMORY 审中-公开
标题翻译：无缝应用访问混合主存储器
公开(公告)号：WO2008055271A2
公开(公告)日：2008-05-08
申请号：PCT/US2007/083669
申请日：2007-11-05
申请人： VIRIDENT SYSTEMS, INC. , KARAMCHETI, Vijay , OKIN, Kenneth A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
发明人： KARAMCHETI, Vijay , OKIN, Kenneth A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
IPC分类号： G06F12/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components are identified. Data associated with the virtual address from the first physical addresses and data associated with the virtual addresses from the second physical addresses are accessed. The data associated with the symmetric and asymmetric memory components is accessed by the application without providing the application with an indication of whether the data is accessed within the symmetric memory component or the asymmetric memory component.
摘要翻译：接收来自应用程序的命令以访问与映射到主存储器的一个或多个虚拟地址相关联的数据结构。识别具有映射到对称存储器组件的组成地址的数据结构的虚拟地址的第一子集以及具有映射到非对称存储器组件的组成地址的数据结构的虚拟地址的第二子集。访问与来自第一物理地址的虚拟地址相关联的数据和与来自第二物理地址的虚拟地址相关联的数据。与对称和非对称存储器组件相关联的数据被应用程序访问，而不向应用程序提供在对称存储器组件或非对称存储器组件内是否访问数据的指示。

3. 发明申请

WO2008055270A2 WRITING TO ASYMMETRIC MEMORY 审中-公开
标题翻译：写入非对称记忆
公开(公告)号：WO2008055270A2
公开(公告)日：2008-05-08
申请号：PCT/US2007/083668
申请日：2007-11-05
申请人： VIRIDENT SYSTEMS, INC. , KARAMCHETI, Vijay , OKIN, Kenneth, A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
发明人： KARAMCHETI, Vijay , OKIN, Kenneth, A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
IPC分类号： G06F12/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A memory controller writes to a virtual address associated with data residing within an asymmetric memory component of main memory that is within a computer system and that has a symmetric memory component, while preserving proximate other data residing within the asymmetric memory component. The symmetric memory component within the main memory of the computer system is configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component during the writing of that address. The asymmetric memory component is configured to enable block write operations in which writing to an address within a region of the asymmetric memory component affects the availability of other addresses within the region of the asymmetric memory component during the block write operations involving the address.
摘要翻译：存储器控制器写入与驻留在计算机系统内的主存储器的不对称存储器组件内并且具有对称存储器组件的数据相关联的虚拟地址，同时保留驻留在不对称内存组件。计算机系统的主存储器中的对称存储器组件被配置为启用随机存取写入操作，其中写入对称存储器组件的块内的地址而不影响对称存储器组件的块期间其他地址的可用性该地址的写作。非对称存储器组件被配置为启用块写入操作，其中在涉及地址的块写入操作期间，写入到非对称存储器组件的区域内的地址影响非对称存储器组件的区域内的其他地址的可用性。 p>

4. 发明申请

WO2008055269A2 ASYMMETRIC MEMORY MIGRATION IN HYBRID MAIN MEMORY 审中-公开
标题翻译：混合主存储器中的不对称存储器迁移
公开(公告)号：WO2008055269A2
公开(公告)日：2008-05-08
申请号：PCT/US2007/083666
申请日：2007-11-05
申请人： VIRIDENT SYSTEMS, INC. , KARAMCHETI, Vijay , OKIN, Kenneth, A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
发明人： KARAMCHETI, Vijay , OKIN, Kenneth, A. , GANAPATHY, Kumar , SINGHAI, Ashish , PAREKH, Rajesh
IPC分类号： G06F12/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.
摘要翻译：通过接收来自应用程序的命令来读取与映射到主存储器的虚拟地址相关联的数据来管理主存储器。存储器控制器确定虚拟地址被映射到主存储器的对称存储器组件中的一个，并且访问指示如何与虚拟地址相关联的数据被访问的存储器使用特性。存储器控制器确定与虚拟地址具有适合于主存储器的非对称存储器组件的访问特征，并将与虚拟地址相关联的数据加载到主存储器的非对称存储器组件。在加载和使用存储器管理单元之后，从应用程序接收到用于读取与虚拟地址相关联的数据的命令，并且从非对称存储器组件检索与虚拟地址相关联的数据。

5. 发明申请

WO2009079478A1 DISTRIBUTING METADATA ACROSS MULTIPLE DIFFERENT DISRUPTION REGIONS WITHIN AN ASYMMETRIC MEMORY SYSTEM 审中-公开
标题翻译：在非对称存储器系统中分布多个不同的不同区域的元数据
公开(公告)号：WO2009079478A1
公开(公告)日：2009-06-25
申请号：PCT/US2008/086887
申请日：2008-12-15
申请人： VIRIDENT SYSTEMS, INC. , KARAMCHETI, Vijay , SINGHAI, Ashish
发明人： KARAMCHETI, Vijay , SINGHAI, Ashish
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7207 , G06F2212/7208
摘要： Metadata that corresponds to application data is distributed across different disruption regions of an asymmetric memory component such that metadata is written in the same disruption region as the application data to which it corresponds. A first block of application data is written to a first disruption region and a second block of application data is written to a second disruption region. A first block of metadata corresponding to the first block of application data and a second block of metadata corresponding to the second block of application data both are generated. The first block of metadata is written to the first disruption region and the second block of metadata is written to the second disruption region such that the first and second blocks of metadata are written to the same disruption regions as the blocks of application data to which they correspond.
摘要翻译：对应于应用数据的元数据分布在非对称存储器组件的不同中断区域上，使得元数据被写入与其对应的应用数据相同的中断区域。应用数据的第一块被写入第一中断区域，并且第二应用数据块被写入第二中断区域。生成对应于第一应用数据块的元数据的第一块和对应于第二应用数据块的第二元数据块。元数据的第一块被写入第一中断区域，并且第二块元数据被写入第二中断区域，使得第一和第二元数据块被写入到与它们的应用数据块相同的中断区域对应。

6. 发明申请

WO2014144580A1 MANAGING THE WRITE PERFORMANCE OF AN ASYMMETRIC MEMORY SYSTEM 审中-公开
标题翻译：管理不对称存储系统的写性能
公开(公告)号：WO2014144580A1
公开(公告)日：2014-09-18
申请号：PCT/US2014/029053
申请日：2014-03-14
申请人： VIRIDENT SYSTEMS INC.
发明人： KARAMCHETI, Vijay , SINGHAI, Ashish , MONDAL, Shibabrata , KUMAR, Ajith
IPC分类号： G06F13/00
CPC分类号： G06F3/061 , G06F3/0611 , G06F3/0655 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F9/4881 , G06F9/5016 , G06F12/0246 , G06F2212/7206 , G06F2212/7208
摘要： Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
摘要翻译：一些实现包括管理基于托管的非易失性随机存取存储器（NVRAM）的存储子系统的方法。该方法包括：在主机计算设备上的设备驱动器处接收写入请求写入相应的数据单元的写入请求基于NVRAM的存储子系统; 将写请求分类为写请求的子组，其中各子组内的写请求是相互排斥的; 确定基于NVRAM的存储子系统的几个NVRAM设备中的每一个的负载状况; 根据所述基于NVRAM的存储子系统的NVRAM设备的负载条件，识别至少一个NVRAM设备上的目标位置以服务特定的写请求子组; 以及通过将对应的数据单元写入到基于NVRAM的存储子系统的至少一个NVRAM设备上的所识别的目标位置来为特定的写请求组提供服务。

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