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1. 发明申请

WO2019125706A1 EFFICIENT SHARING OF NON-VOLATILE MEMORY 审中-公开
公开(公告)号：WO2019125706A1
公开(公告)日：2019-06-27
申请号：PCT/US2018/062687
申请日：2018-11-28
申请人： MICROSOFT TECHNOLOGY LICENSING, LLC
发明人： BADAM, Anirudh , GOVINDAN, Sriram , SHARMA, Bikash , KHESSIB, Badriddine , NARAYANAN, Iyswarya , GANESAN, Aishwarya
IPC分类号： G06F9/50
CPC分类号： G06F3/0604 , G06F3/0631 , G06F3/0685 , G06F9/5016 , G06F12/0802 , G06F2209/508 , G06F2212/60
摘要： In the embodiment a determination is made, for one or more applications being executed by the computing system, of an amount of the first or second memory being used by the one or more applications. Based on the determination, a portion of the memory resources of the third memory are configured to function with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is not sufficient for the memory needs of the one or more applications and a portion of the memory resources of the third memory are removed from functioning with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is more than is needed for the memory needs of the one or more applications.

2. 发明申请

WO2019086835A1 INITIALISATION OF A STORAGE DEVICE 审中-公开
公开(公告)号：WO2019086835A1
公开(公告)日：2019-05-09
申请号：PCT/GB2018/052997
申请日：2018-10-17
申请人： ARM LTD
发明人： WANG, Wei , ELSASSER, Wendy Arnott , DIESTELHORST, Stephan
IPC分类号： G06F12/02 , G06F13/16 , G11C7/20 , G06F12/0891
CPC分类号： G06F3/0632 , G06F3/0607 , G06F3/0653 , G06F3/0659 , G06F3/0685 , G06F12/0238 , G06F12/0891 , G06F13/16 , G06F13/1626 , G06F2212/7203 , G06F2212/7205 , G11C7/20
摘要： The present techniques generally relate to devices, method and/or systems for responding to a request for accessing a portion of a memory prior to completion of a requested operation to place the portion of the memory in an initialized state. In one example implementation, a memory controller may delay initiation of a write operation addressed to a particular portion of the memory until completion of a pending request to initialize the particular portion of the memory. In another example implementation, a memory controller may return values to service a request for a read operation comprising values representing an initialized state without accessing the particular portion of the memory responsive to a presence of a pending request to initialize the particular portion of the memory.

3. 发明申请

WO2018031372A1 HARDWARE-BASED SOFTWARE-RESILIENT USER PRIVACY EXPLOITING EPHEMERAL DATA RETENTION OF VOLATILE MEMORY 审中-公开
标题翻译：基于硬件的软件弹性用户隐私开发易失性存储器的现有数据保留
公开(公告)号：WO2018031372A1
公开(公告)日：2018-02-15
申请号：PCT/US2017/045334
申请日：2017-08-03
申请人： QUALCOMM INCORPORATED
发明人： LE ROY, Vincent Pierre , MCLEAN, Ivan
IPC分类号： G06F21/79
CPC分类号： G06F21/567 , G06F1/30 , G06F3/0619 , G06F3/0653 , G06F3/0685 , G06F21/6245 , G06F21/79 , G06F2221/034
摘要： Various features relate to the providing Software-Resilient User Privacy within smartphones or other devices by storing and processing all pertinent values needed for user privacy -- such as security keys and access attempt counters -- in hardware, such as within a System-on-a-Chip (SoC) processor formed on an integrated circuit (IC). For example, an on-die ephemeral Volatile Memory (eVM) device may be employed for storing access attempt counters or other parameters used to control malicious attack countermeasures. In one example, the eVM employs static random-access memory (SRAM) formed on the die and exploits capacitive remanence to recover stored counter values even if power is disconnected, then reconnected. On-chip NVM may be used for permanent storage of other privacy values, such as a device-unique secret key that is generated locally on the device and not known to the chip vendor, the device Original Equipment Manufacturer (OEM)) or the owner/user of the device.
摘要翻译：通过在硬件中存储和处理用户隐私所需的所有相关值（例如安全密钥和访问尝试计数器），各种功能涉及在智能电话或其他设备中提供软件 - 弹性用户隐私，诸如在集成电路（IC）上形成的片上系统（SoC）处理器内。例如，可以使用片上临时易失性存储器（eVM）设备来存储访问尝试计数器或用于控制恶意攻击对策的其他参数。在一个示例中，eVM使用在管芯上形成的静态随机存取存储器（SRAM）并利用电容剩磁来恢复存储的计数器值，即使断电，然后重新连接。片上NVM可以用于永久存储其他隐私值，例如设备本地生成且芯片供应商，设备原始设备制造商（OEM）或设备所有者不知道的设备唯一密钥 /设备的用户。

4. 发明申请

WO2017204990A1 DATA ACCESS BETWEEN COMPUTING NODES 审中-公开
标题翻译：数据访问间计算节点
公开(公告)号：WO2017204990A1
公开(公告)日：2017-11-30
申请号：PCT/US2017/029954
申请日：2017-04-27
申请人： INTEL CORPORATION
发明人： GUIM BERNAT, Francesc , DURAN GONZALEZ, Alejandro , KUMAR, Karthik , WILLHALM, Thomas , RAMANUJAN, Raj K.
IPC分类号： G06F12/02 , G06F3/06 , G06F9/50
CPC分类号： G06F3/0619 , G06F3/065 , G06F3/0685 , G06F12/0284 , G06F2212/2542
摘要： Technology for an apparatus is described. The apparatus can receive a command to copy data. The command can indicate a first address, a second address and an offset value. The apparatus can determine a first non-uniform memory access (NUMA) domain ID for the first address and a second NUMA domain ID for the second address. The apparatus can identify a first computing node with memory that corresponds to the first NUMA domain ID and a second computing node with memory that corresponds to the second NUMA domain ID. The apparatus can generate an instruction for copying data in a first memory range of the first computing node to a second memory range of the second computing node. The first memory range can be defined by the first address and the offset value and the second memory range can be defined by the second address and the offset value.
摘要翻译：描述了一种设备的技术。该设备可以接收复制数据的命令。该命令可以指示第一地址，第二地址和偏移值。该装置可确定第一地址的第一非统一存储器访问（NUMA）域ID和第二地址的第二NUMA域ID。该设备可以识别具有对应于第一NUMA域ID的存储器的第一计算节点和具有对应于第二NUMA域ID的存储器的第二计算节点。该设备可以生成用于将第一计算节点的第一存储器范围中的数据复制到第二计算节点的第二存储器范围的指令。第一个存储器范围可以由第一个地址和偏移值定义，第二个存储器范围可以由第二个地址和偏移值定义。

5. 发明申请

WO2017196614A1 SELECTIVE DATA PERSISTENCE IN COMPUTING SYSTEMS 审中-公开
标题翻译：计算系统中的选择性数据持久性
公开(公告)号：WO2017196614A1
公开(公告)日：2017-11-16
申请号：PCT/US2017/030939
申请日：2017-05-04
申请人： MICROSOFT TECHNOLOGY LICENSING, LLC
发明人： GABRYJELSKI, Henry
IPC分类号： G06F12/02
CPC分类号： G06F3/0619 , G06F3/0647 , G06F3/0659 , G06F3/067 , G06F3/0685 , G06F12/0246 , G06F2212/1028 , G06F2212/7208 , Y02D10/13
摘要： Embodiments of selective data persistence in computing devices and associated methods of operations are disclosed therein. In one embodiment, a method includes receiving a command to initiate persistence of data currently contained in a volatile memory module to a non-volatile memory module of a hybrid memory device. The method also includes determining whether the data in the volatile memory module is valid data. In response to determining that the data currently contained in the volatile memory module is valid data, causing the data to be copied from the volatile memory module to the non-volatile memory module. in response to determining that the data is not valid data, discarding the data currently contained in the volatile memory module.
摘要翻译：其中公开了计算设备和相关操作方法中的选择性数据持久性的实施例。在一个实施例中，一种方法包括：接收用于启动当前包含在易失性存储器模块中的数据到混合存储器装置的非易失性存储器模块的持久性的命令。该方法还包括确定易失性存储器模块中的数据是否是有效数据。响应于确定当前包含在易失性存储器模块中的数据是有效数据，导致将数据从易失性存储器模块复制到非易失性存储器模块。响应于确定该数据不是有效数据，丢弃当前包含在易失性存储器模块中的数据。

6. 发明申请

WO2017164809A1 CONTROL MODULES, MULTI-LEVEL DATA STORAGE DEVICES, MULTI-LEVEL DATA STORAGE METHODS, AND COMPUTER READABLE MEDIA 审中-公开
标题翻译：控制模块，多级数据存储设备，多级数据存储方法和计算机可读介质
公开(公告)号：WO2017164809A1
公开(公告)日：2017-09-28
申请号：PCT/SG2017/050128
申请日：2017-03-15
申请人： AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
发明人： JIN, Chao , XI, Weiya , YONG, Khai Leong
IPC分类号： G06F12/08
CPC分类号： G06F12/0238 , G06F3/0611 , G06F3/0647 , G06F3/0685 , G06F12/0864 , G06F16/185 , G06F2212/222 , G06F2212/261 , G06F2212/7207
摘要： A control module for a multi-level data storage device having a plurality of memory devices is disclosed. The control module may include: an access determination circuit configured to determine that access has been made to a piece of data stored on at least one of the plurality of memory devices, the piece of data associated with a level being one of a first level, a second level, or a third level; a level management circuit configured to change the level from the third level to the second level or from the second level to the first level upon determining that access has been made to the piece of data; and a memory controller configured to promote the piece of data in response to whether the level is the first level, the second level or the third level, wherein at least two levels of the first level, the second level, and the third level are associated with one of the plurality of memory devices.
摘要翻译：公开了一种用于具有多个存储器设备的多级数据存储设备的控制模块。所述控制模块可以包括：访问确定电路，其被配置为确定已经访问了存储在所述多个存储器设备中的至少一个存储器设备上的数据片，与所述数据块关联的所述数据片是第一级，第二级或第三级; 电平管理电路，被配置为在确定已访问所述数据段时，将所述电平从所述第三电平改变到所述第二电平或从所述第二电平改变到所述第一电平; 以及存储器控制器，被配置为响应于所述级别是所述第一级别，所述第二级别还是所述第三级别来提升所述数据块，其中所述第一级别，所述第二级别和所述第三级别中的至少两个级别相关联与多个存储设备中的一个配合使用。

7. 发明申请

WO2017141249A1 OPTIMIZED DATA DISTRIBUTION SYSTEM 审中-公开
标题翻译：优化的数据分配系统
公开(公告)号：WO2017141249A1
公开(公告)日：2017-08-24
申请号：PCT/IL2017/050205
申请日：2017-02-16
申请人： TECHNION RESEARCH & DEVELOPMENT FOUNDATION LIMITED
发明人： SHMUELI, Oded
IPC分类号： G06F12/00 , G06F12/02 , G06F3/06 , G06F17/30 , G11C8/00
CPC分类号： G06F3/0685 , G06F3/0605 , G06F3/0649 , G06F3/067 , G06F12/00 , G06F12/02 , G06F17/30 , G11C8/00
摘要： A method comprising using one or more hardware processors for automatically receiving two or more data objects and two or more data storage addresses, wherein each data storage address directs to one of two or more non -transitory computer readable storage medium locations. The method comprises the action of computing two or more parameter values for each of the data objects. The method comprises the action of grouping the data objects based on the parameter values and two or more predefined rules, thereby producing two or more groups. The method comprises the action of assigning each of the groups to one of the data storage addresses based on the predefined rules. The method comprises the action of storing each of the objects of the groups at one of the non-transitory computer readable storage medium locations based on the assigning.
摘要翻译：包括使用一个或多个硬件处理器来自动接收两个或更多个数据对象和两个或更多个数据存储地址的方法，其中每个数据存储地址指向两个或更多个非瞬态计算机可读存储介质位置。该方法包括为每个数据对象计算两个或更多个参数值的动作。该方法包括基于参数值和两个或更多个预定义规则对数据对象进行分组的动作，由此产生两个或更多个组。该方法包括基于预定义的规则将每个组分配给数据存储地址之一的动作。该方法包括基于分配将组中的每个对象存储在非暂时性计算机可读存储介质位置之一处的动作。

8. 发明申请

WO2017130067A1 CONGESTION MITIGATION IN A DISTRIBUTED STORAGE SYSTEM 审中-公开
标题翻译：在分布式存储系统中减少缓冲
公开(公告)号：WO2017130067A1
公开(公告)日：2017-08-03
申请号：PCT/IB2017/000128
申请日：2017-01-12
申请人： WEKA. IO LTD.
发明人： BEN DAYAN, Maor , PALMON, Omri , ZVIBEL, Liran , ARDITTI, Kanael , FILIBA, Tomer
IPC分类号： G06F3/06 , G06F17/30
CPC分类号： G06F3/0607 , G06F3/0604 , G06F3/061 , G06F3/0613 , G06F3/0619 , G06F3/0635 , G06F3/0643 , G06F3/0647 , G06F3/0656 , G06F3/0665 , G06F3/067 , G06F3/0673 , G06F3/0685 , G06F17/30194 , G06F17/302 , H04L43/0882 , H04L43/16 , H04L47/12 , H04L47/6275 , H04L47/70 , H04L49/90 , H04L67/06 , H04L67/1097 , H04L67/42
摘要： A system comprises a plurality of computing devices that are communicatively coupled via a network and have a file system distributed among them, and comprises one or more file system request buffers residing on one or more of the plurality of computing devices. File system choking management circuitry that resides on one or more of the plurality of computing devices is operable to separately control: a first rate at which a first type of file system requests (e.g., one of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers, and a second rate at which a second type of file system requests (e.g., another of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers.
摘要翻译：系统包括多个计算设备，所述多个计算设备经由网络可通信地耦合并且具有分布在其中的文件系统，并且包括驻留在所述多个计算设备中的一个或多个上的一个或多个文件系统请求缓冲区计算设备。驻留在多个计算设备中的一个或多个计算设备上的文件系统扼制管理电路可操作用于分别控制：第一类文件系统请求的第一速率（例如，数据请求，数据读取请求，数据写入请求，元数据请求，元数据读取请求和元数据写入请求）和第二类型的文件系统请求的第二速率（例如，数据请求，数据读取请求，数据写入请求中的另一个，元数据请求，元数据读取请求和元数据写入请求）从一个或多个缓冲区中提取。

9. 发明申请

WO2017095592A1 SYSTEM AND METHOD FOR MEMORY MANAGEMENT USING DYNAMIC PARTIAL CHANNEL INTERLEAVING 审中-公开
标题翻译：使用动态部分通道交错的存储器管理系统和方法
公开(公告)号：WO2017095592A1
公开(公告)日：2017-06-08
申请号：PCT/US2016/060405
申请日：2016-11-03
申请人： QUALCOMM INCORPORATED
发明人： DE, Subrato , STEWART, Richard , CHUN, Dexter Tamio
IPC分类号： G06F12/06 , G06F12/10 , G06F12/1027
CPC分类号： G11C7/1072 , G06F3/061 , G06F3/0653 , G06F3/0685 , G06F12/0607 , G06F12/10 , G06F12/1027 , G06F13/1657 , G06F2212/657 , Y02D10/13 , Y02D10/14
摘要： Systems and methods are disclosed for providing memory channel interleaving with selective power/performance optimization. One such method comprises configuring an interleaved zone for relatively higher performance tasks, a linear address zone for relatively lower power tasks, and a mixed interleaved-linear zone for tasks with intermediate performance requirements. A boundary is defined among different zones using a sliding threshold address. The zones are dynamically adjusted, and/or new zones dynamically created, by changing the sliding address in real-time based on system goals and application performance preferences. A request for high performance memory is allocated to a zone with lower power that minimally supports the required performance, or may be allocated to a low power memory zone with lower than required performance if the system parameters indicate a need for aggressive power conservation. Pages may be migrated between zones in order to free a memory device for powering down.
摘要翻译：公开了用于提供具有选择性功率/性能优化的存储信道交织的系统和方法。一种这样的方法包括配置用于相对较高性能任务的交织区域，用于相对较低功率任务的线性地址区域以及用于具有中等性能要求的任务的混合交织线性区域。使用滑动阈值地址在不同区域之间定义边界。根据系统目标和应用程序性能偏好，通过实时更改滑动地址，动态调整区域和/或动态创建新区域。如果系统参数表明需要进行大量节能，则将对高性能内存的请求分配给功耗较低的区域，以最小程度地支持所需的性能，或者将其分配给低功耗内存区域，并且性能低于所需性能。页面可能会在区域之间迁移，以释放内存设备的电源。

10. 发明申请

WO2017095567A1 WRITING DATA IN A STORAGE SYSTEM THAT INCLUDES A FIRST TYPE OF STORAGE DEVICE AND A SECOND TYPE OF STORAGE DEVICE 审中-公开
标题翻译：在存储系统中写入数据，其中包括第一类存储设备和第二类存储设备
公开(公告)号：WO2017095567A1
公开(公告)日：2017-06-08
申请号：PCT/US2016/059715
申请日：2016-10-31
申请人： PURE STORAGE, INC.
发明人： COLGROVE, John , KIRKPATRICK, Peter , VACHHARAJANI, Neil
IPC分类号： G06F3/06
CPC分类号： G06F12/023 , G06F3/0619 , G06F3/0631 , G06F3/0659 , G06F3/068 , G06F3/0683 , G06F3/0685 , G06F12/10 , G06F2212/1044
摘要： Writing data in a storage system that includes a first type of storage device and a second type of storage device, including: selecting, for one or more unprocessed write requests, a target storage device type from the first type of storage device and the second type of storage device; issuing a first group of write requests to the first type of storage device, the first group of write requests addressed to one or more locations selected in dependence upon an expected address translation to be performed by the first type of storage device; and issuing a second group of write requests to the second type of storage device, the second group of write requests addressed to one or more locations selected in dependence upon a layout of memory in the second type of storage device.
摘要翻译：将数据写入包括第一类型的存储设备和第二类型的存储设备的存储系统中，包括：针对一个或多个未处理的写入请求，从第一类型的存储设备中选择目标存储设备类型类型的存储设备和第二类型的存储设备; 向所述第一类型存储设备发出第一组写入请求，所述第一组写入请求被寻址到依赖于将由所述第一类型存储设备执行的预期地址转换而选择的一个或多个位置; 以及向第二类型存储设备发出第二组写入请求，第二组写入请求被寻址到依赖于第二类型存储设备中的存储器布局而选择的一个或多个位置。

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