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1. 发明申请

WO2010104610A8 STACKED MICROELECTRONIC ASSEMBLY WITH MICROELECTRONIC ELEMENTS HAVING VIAS EXTENDING THROUGH BOND PADS 审中-公开
标题翻译：具有通过粘结垫延伸的VIAS的微电子元件的堆叠微电子组件
公开(公告)号：WO2010104610A8
公开(公告)日：2011-11-17
申请号：PCT/US2010000777
申请日：2010-03-12
申请人： TESSERA INC , KRIMAN MOSHE , AVSIAN OSHER , HABA BELGACEM , HUMPSTON GILES , BURSHTYN DMITRI
发明人： KRIMAN MOSHE , AVSIAN OSHER , HABA BELGACEM , HUMPSTON GILES , BURSHTYN DMITRI
IPC分类号： H01L21/98 , H01L21/768 , H01L23/48 , H01L25/065
CPC分类号： H01L25/0657 , H01L21/76805 , H01L23/481 , H01L25/50 , H01L2224/02371 , H01L2224/0401 , H01L2224/13024 , H01L2224/24145 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/1461 , H01L2924/00
摘要： A stacked microelectronic assembly is provided which includes first and second stacked microelectronic elements (101, 102). Each of the first and second microelectronic elements can include a conductive layer (610) extending along a face (608) of such microelectronic element. At least one of the first and second microelectronic elements can include a recess (618) extending from the rear surface towards the front surface, and a conductive via (605) extending from the recess through the bond pad (603) and electrically connected to the bond pad, with a conductive layer (610) connected to the via and extending along a rear face (608) of the microelectronic element (101, 102) towards an edge (620) of the microelectronic element. A plurality of leads (224) can extend from the conductive layers (610) of the first and second microelectronic elements and a plurality of terminals (616) of the assembly can be electrically connected with the leads.
摘要翻译：提供堆叠的微电子组件，其包括第一和第二堆叠的微电子元件（101,102）。第一和第二微电子元件中的每一个可以包括沿着这种微电子元件的面（608）延伸的导电层（610）。第一和第二微电子元件中的至少一个可以包括从后表面朝向前表面延伸的凹槽（618），以及从凹部穿过接合焊盘（603）延伸并电连接到接合焊盘，其中导电层（610）连接到通孔并且沿着微电子元件（101,102）的后表面（608）朝着微电子元件的边缘（620）延伸。多个引线（224）可以从第一和第二微电子元件的导电层（610）延伸，并且组件的多个端子（616）可以与引线电连接。

2. 发明申请

WO2010104610A3 STACKED MICROELECTRONIC ASSEMBLY WITH MICROELECTRONIC ELEMENTS HAVING VIAS EXTENDING THROUGH BOND PADS 审中-公开
标题翻译：具有通过粘结垫延伸的VIAS的微电子元件的堆叠微电子组件
公开(公告)号：WO2010104610A3
公开(公告)日：2011-01-13
申请号：PCT/US2010000777
申请日：2010-03-12
申请人： TESSERA TECHNOLOGIES HUNGARY KFT , KRIMAN MOSHE , AVSIAN OSHER , HABA BELGACEM , HUMPSTON GILES , BURSHTYN DMITRI
发明人： KRIMAN MOSHE , AVSIAN OSHER , HABA BELGACEM , HUMPSTON GILES , BURSHTYN DMITRI
IPC分类号： H01L21/98 , H01L21/768 , H01L23/48 , H01L25/065
CPC分类号： H01L25/0657 , H01L21/76805 , H01L23/481 , H01L25/50 , H01L2224/02371 , H01L2224/0401 , H01L2224/13024 , H01L2224/24145 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/1461 , H01L2924/00
摘要： A cover assembly for a Lithium-ion battery container to improve the durability of the battery. A high pressure injection molded polymer is combined with flanges disposed on the current collecting posts of the battery to provide an improved seal for the battery cover, especially at the interface of the cover and the current collecting posts. The injection molded polymer is fused to the flanges, current collecting posts and container cover to result in a diffusion path of increased length for gases and/or liquids which are known to enter or escape from battery containers. Additional polymer layers can be applied to the assembly to further improve the seal.
摘要翻译：一种用于锂离子电池容器的盖组件，用于提高电池的耐久性。高压注塑聚合物与设置在电池的集流柱上的凸缘组合，为电池盖提供改进的密封，特别是在盖和集流柱的界面处。注塑聚合物与凸缘，集流柱和容器盖融合，以产生已知从电池容器进入或逸出的气体和/或液体的长度增大的扩散路径。另外的聚合物层可以施加到组件上以进一步改善密封。

3. 发明申请

WO2009020572A3 STACK PACKAGES USING RECONSTITUTED WAFERS 审中-公开
标题翻译：堆叠包装使用重复晶圆
公开(公告)号：WO2009020572A3
公开(公告)日：2009-05-22
申请号：PCT/US2008009353
申请日：2008-08-01
申请人： TESSERA TECH HUNGARY KFT , TESSERA INC , AVSIAN OSHER , GRINMAN ANDREY , HUMPSTON GILES , MARGALIT MOTI
发明人： AVSIAN OSHER , GRINMAN ANDREY , HUMPSTON GILES , MARGALIT MOTI
IPC分类号： H01L21/98 , H01L23/538 , H01L25/065
CPC分类号： H01L25/00 , H01L21/50 , H01L21/568 , H01L24/24 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/12105 , H01L2224/16225 , H01L2224/24145 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/06513 , H01L2225/06524 , H01L2225/06551 , H01L2225/06582 , H01L2924/01078 , H01L2924/12042 , H01L2924/15311 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A stacked microelectronic unit (80) is provided which has a top surface (34) and a bottom surface remote from the top surface and a plurality of vertically stacked microelectronic elements (12, 12A) therein, including at least one microelectronic element (12A) having a front face (14A) adjacent to the top surface and a rear face (16A) oriented towards the bottom surface. Each of the microelectronic elements (12, 12A) has traces (24, 24A) extending from contacts (22, 22A) at the front face beyond edges of the microelectronic element. A dielectric layer (116) contacts edges of the microelectronic elements and underlies the rear face of the at least one microelectronic element. Leads are connected to the traces (24, 24A) extending along the dielectric layer (116). Unit contacts (74), exposed at the top surface, are connected to the leads (66).
摘要翻译：提供堆叠微电子单元（80），其具有远离顶表面的顶表面（34）和底表面以及其中包括至少一个微电子元件（12A）的多个垂直堆叠微电子元件（12,12A）具有与顶面相邻的前面（14A）和面向底面的后面（16A）。微电子元件（12,12A）中的每一个具有从正面处的触点（22,22A）延伸超过微电子元件的边缘的迹线（24,24A）。介电层（116）接触微电子元件的边缘并位于至少一个微电子元件的背面之下。引线连接到沿电介质层（116）延伸的迹线（24,24A）。暴露在顶表面的单元触点（74）连接到引线（66）。

4. 发明申请

WO2009020572A8 STACK PACKAGES USING RECONSTITUTED WAFERS 审中-公开
标题翻译：使用重构波形的堆栈包
公开(公告)号：WO2009020572A8
公开(公告)日：2010-03-18
申请号：PCT/US2008009353
申请日：2008-08-01
申请人： TESSERA TECH HUNGARY KFT , TESSERA INC , AVSIAN OSHER , GRINMAN ANDREY , HUMPSTON GILES , MARGALIT MOTI
发明人： AVSIAN OSHER , GRINMAN ANDREY , HUMPSTON GILES , MARGALIT MOTI
IPC分类号： H01L21/98 , H01L23/538 , H01L25/065
CPC分类号： H01L25/00 , H01L21/50 , H01L21/568 , H01L24/24 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/12105 , H01L2224/16225 , H01L2224/24145 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/06513 , H01L2225/06524 , H01L2225/06551 , H01L2225/06582 , H01L2924/01078 , H01L2924/12042 , H01L2924/15311 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A stacked microelectronic unit (80) is provided which has a top surface (34) and a bottom surface remote from the top surface and a plurality of vertically stacked microelectronic elements (12, 12A) therein, including at least one microelectronic element (12A) having a front face (14A) adjacent to the top surface and a rear face (16A) oriented towards the bottom surface. Each of the microelectronic elements (12, 12A) has traces (24, 24A) extending from contacts (22, 22A) at the front face beyond edges of the microelectronic element. A dielectric layer (116) contacts edges of the microelectronic elements and underlies the rear face of the at least one microelectronic element. Leads are connected to the traces (24, 24A) extending along the dielectric layer (116). Unit contacts (74), exposed at the top surface, are connected to the leads (66).
摘要翻译：提供堆叠的微电子单元（80），其具有顶表面（34）和远离顶表面的底表面和其中的多个垂直堆叠的微电子元件（12,12A），其包括至少一个微电子元件（12A）具有与顶表面相邻的前表面（14A）和朝向底表面定向的后表面（16A）。微电子元件（12,12A）中的每一个具有从位于微电子元件的边缘的前面的触点（22,22A）延伸的迹线（24,24A）。电介质层（116）接触微电子元件的边缘并且位于至少一个微电子元件的后表面之下。引线连接到沿着电介质层（116）延伸的迹线（24,24A）。在顶表面暴露的单元触点（74）连接到引线（66）。

5. 发明申请

WO2005065424A3 MICRO PIN GRID ARRAY WITH WIPING ACTION 审中-公开
标题翻译：微型网格阵列与WIPING动作
公开(公告)号：WO2005065424A3
公开(公告)日：2006-07-20
申请号：PCT/US2004044088
申请日：2004-12-21
申请人： TESSERA INC , HABA BELGACEM , BEROZ MASUD , HUMPSTON GILES , PARK JAE M
发明人： HABA BELGACEM , BEROZ MASUD , HUMPSTON GILES , PARK JAE M
IPC分类号： H01R13/62 , H01L21/48 , H01L23/13 , H01R13/24
CPC分类号： H01L23/13 , H01L21/4846 , H01L2924/0002 , H01R13/2414 , H01R13/2464 , H01L2924/00
摘要： A microelectronic package includes a mounting structure (136), a microelectronic element associated with the mounting structure, and a plurality of conductive posts (146) physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts (146) project from the mounting structure (136) in an upward direction (Z), at least one of the conductive posts being an offset post. Each offset post has a base (154) connected to the mounting structure (136), the base of each offset post defining a centroid (156). Each offset post also defines an upper extremity (178) having a centroid (160), the centroid of the upper extremity being offset from the centroid (156) of the base (154) in a horizontal offset direction transverse to the upward direction (Z). The mounting structure (136) is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities (178) may wipe across a contact pad of an opposing circuit board.
摘要翻译：微电子封装包括安装结构（136），与安装结构相关联的微电子元件以及物理连接到安装结构并电连接到微电子元件的多个导电柱（146）。导电柱（146）从安装结构（136）沿向上的方向（Z）突出，至少一个导电柱是偏移柱。每个偏移柱具有连接到安装结构（136）的基部（154），每个偏移柱的基部限定重心（156）。每个偏移柱还限定具有质心（160）的上端（178），上端的质心在垂直于向上方向（Z）的水平偏移方向上偏离基座（154）的重心（156））。安装结构（136）适于允许每个偏移柱绕水平轴线倾斜，使得上端（178）可以擦拭相对电路板的接触垫。

6. 发明申请

WO2007133806A3 WAFER LEVEL SEMICONDUCTOR CHIP PACKAGES AND METHODS OF MAKING THE SAME 审中-公开
标题翻译： WAFER LEVEL SEMICONDUCTOR芯片包及其制造方法
公开(公告)号：WO2007133806A3
公开(公告)日：2008-04-24
申请号：PCT/US2007011747
申请日：2007-05-15
申请人： TESSERA INC , LIEW VICTOR , HABA BELGACEM , HUMPSTON GILES
发明人： LIEW VICTOR , HABA BELGACEM , HUMPSTON GILES
IPC分类号： H01L21/60 , H01L23/48
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/0231 , H01L2224/02333 , H01L2224/0401 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05644 , H01L2224/13099 , H01L2224/131 , H01L2224/1319 , H01L2224/16 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01067 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014
摘要： A wafer (20) having a front surface and contacts (28) exposed at the front surface is treated by forming electrically conductive risers (30) projecting upwardly from the contacts as, for example, by electroless plating, and then applying a flowable material over the front surface of the device, around the risers, to form a dielectric layer (36) with the risers exposed at a top surface (38) of the dielectric layer facing away from the device. Traces (42). extending over the top surface of the dielectric layer may be formed, and may be connected to at least some of the risers.
摘要翻译：具有前表面和暴露在前表面的接触件（28）的晶片（20）通过形成从接触件向上突出的导电立管（30）来进行处理，例如通过无电镀，然后将可流动材料施加在所述装置的前表面围绕所述立管形成介电层（36），所述提升板暴露在所述电介质层的远离所述装置的顶表面（38）处。痕迹（42）。可以在电介质层的顶表面上延伸，并且可以连接至至少一些立管。

7. 发明申请

WO2005086532A3 PACKAGED ACOUSTIC AND ELECTROMAGNETIC TRANSDUCER CHIPS 审中-公开
标题翻译：包装声音和电磁传感器卡
公开(公告)号：WO2005086532A3
公开(公告)日：2006-01-26
申请号：PCT/US2005006565
申请日：2005-03-01
申请人： TESSERA INC , HUMPSTON GILES , OSBORN PHILIP R , THOMPSON JESSE BURL , KUBOTA YOICHI , TSENG CHUNG-CHUAN , BURTZLAFF ROBERT , HABA BELGACEM , TUCKERMAN DAVID B , WARNER MICHAEL
发明人： HUMPSTON GILES , OSBORN PHILIP R , THOMPSON JESSE BURL , KUBOTA YOICHI , TSENG CHUNG-CHUAN , BURTZLAFF ROBERT , HABA BELGACEM , TUCKERMAN DAVID B , WARNER MICHAEL
IPC分类号： B81B7/00 , H01L23/495 , H04R19/00 , H04R19/04
CPC分类号： B81B7/0077 , B81B2201/0257 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05026 , H01L2224/05568 , H01L2224/05624 , H01L2224/16 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/01322 , H01L2924/07811 , H01L2924/09701 , H01L2924/10155 , H01L2924/10253 , H01L2924/12041 , H01L2924/19041 , H01L2924/3025 , H04R19/005 , H01L2924/00 , H01L2924/00014
摘要： Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as transducer of at least one of acoustic energy and electromagnetic energy, and the chip including a plurality of bond pads exposed to one of the front and rear faces. The packaged chip includes a package element having a dielectric element and a metal layer disposed on the dielectric element, the package element having an inner surface facing the chop and an outer surface facing away from the chip. The metal layer includes a plurality of contacts exposed at at least one of the inner and outer surfaces, the contacts conductively connected to the bond pads. The metal layer further includes a first opening for passage of the at least one of acoustic energy and electromagnetic energy in a direction of at least one of the said device and from said device.
摘要翻译：本文公开了封装芯片的各种实施例及其制造方法。本文公开的一种这样的封装芯片包括具有前表面，与正面相对的后表面的芯片和在前表面和后表面中的一个处的器件，该器件可操作为声能和电磁能中的至少一个的换能器并且所述芯片包括暴露于所述前表面和后表面中的一个的多个接合焊盘。封装芯片包括具有介电元件和设置在电介质元件上的金属层的封装元件，封装元件具有面向斩波的内表面和背离芯片的外表面。金属层包括暴露在内表面和外表面中的至少一个的多个触点，触点导电地连接到接合焊盘。金属层还包括第一开口，用于沿着所述装置和所述装置中的至少一个的方向通过声能和电磁能中的至少一个。

8. 发明申请

WO2009017835A3 SEMICONDUCTOR PACKAGING PROCESS USING THROUGH SILICON VIAS 审中-公开
标题翻译：半导体封装工艺使用硅酮VIAS
公开(公告)号：WO2009017835A3
公开(公告)日：2009-04-16
申请号：PCT/US2008009356
申请日：2008-07-31
申请人： TESSERA INC , HABA BELGACEM , HUMPSTON GILES , MARGALIT MOTI
发明人： HABA BELGACEM , HUMPSTON GILES , MARGALIT MOTI
IPC分类号： H01L21/60 , H01L23/12
CPC分类号： H01L21/76898 , H01L21/76805 , H01L23/3114 , H01L23/481 , H01L24/12 , H01L24/18 , H01L24/82 , H01L24/95 , H01L24/96 , H01L25/0657 , H01L25/50 , H01L2224/02372 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/13025 , H01L2224/2518 , H01L2224/82039 , H01L2225/06513 , H01L2225/06541 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/12044 , H01L2924/00
摘要： A microelectronic unit 400 can include a semiconductor element 401 having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts 403 at the front surface and a rear surface remote from the front surface. The semiconductor element 401 can have through holes 410 extending from the rear surface through the semiconductor element 401 and through the contacts 403. A dielectric layer 411 can line the through holes 410. A conductive layer 412 may overlie the dielectric layer 411 within the through holes 410. The conductive layer 412 can conduct ively interconnect the contacts 403 with unit contacts.
摘要翻译：微电子单元400可以包括具有前表面的半导体元件401，与前表面相邻的微电子半导体器件，在前表面处的触点403和远离前表面的后表面。半导体元件401可以具有从后表面延伸穿过半导体元件401并穿过触点403的通孔410.电介质层411可以将通孔410排成线。导电层412可以覆盖通孔内的电介质层411 410.导电层412可以导电地将触点403与单元触点互连。

9. 发明申请

WO2009017758A2 RECONSTITUTED WAFER STACK PACKAGING WITH AFTER-APPLIED PAD EXTENSIONS 审中-公开
标题翻译：重新填充的晶片堆叠后应用的垫片扩展
公开(公告)号：WO2009017758A2
公开(公告)日：2009-02-05
申请号：PCT/US2008009207
申请日：2008-07-25
申请人： TESSERA INC , MIRKARIMI LAURA , HABA BELGACEM , HUMPSTON GILES , OVRUTSKY DAVID
发明人： MIRKARIMI LAURA , HABA BELGACEM , HUMPSTON GILES , OVRUTSKY DAVID
IPC分类号： H01L25/065 , H01L21/98
CPC分类号： H01L21/50 , H01L24/24 , H01L24/96 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/02371 , H01L2224/04105 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/00
摘要： A stacked microelectronic unit is provided which can include a plurality of vertically stacked microelectronic elements (12, 12A) each having a front surface (117), contacts (22) exposed at the front surface, a rear surface (118) and edges (18, 20) extending between the front and rear surfaces. Traces (24) connected with the contacts may extend along the front surfaces towards edges of the microelectronic elements with the rear surface of at least one of the stacked microelectronic elements being adjacent to a top face (90) of the microelectronic unit. A plurality of conductors (66) may extend along edges of the microelectronic elements from the traces (24) to the top face (90). The conductors may be conductively connected with unit contacts (76) such that the unit contacts overlie the rear surface (118) of the at least one microelectronic element (12A) adjacent to the top face.
摘要翻译：提供了一种堆叠微电子单元，其可以包括多个垂直堆叠的微电子元件（12,12A），每个微电子元件具有前表面（117），暴露在前表面处的触点（22），后表面（118）和边缘，20）在前表面和后表面之间延伸。与触点连接的迹线（24）可以沿着前表面朝向微电子元件的边缘延伸，其中至少一个堆叠的微电子元件的后表面与微电子单元的顶面（90）相邻。多个导体（66）可以沿着微电子元件的边缘从迹线（24）延伸到顶面（90）。导体可以与单元触点（76）导电连接，使得单元接触覆盖邻近顶面的至少一个微电子元件（12A）的后表面（118）。

10. 发明申请

WO2008048666A3 MICROELECTRONIC PACKAGES AND METHODS THEREFOR 审中-公开
标题翻译：微电子封装及其方法
公开(公告)号：WO2008048666A3
公开(公告)日：2008-07-10
申请号：PCT/US2007022233
申请日：2007-10-17
申请人： TESSERA INC , HUMPSTON GILES , GAO GUILIAN , HABA BELGACEM
发明人： HUMPSTON GILES , GAO GUILIAN , HABA BELGACEM
IPC分类号： H01L23/498
CPC分类号： H01L23/4985 , H01L23/49811 , H01L24/48 , H01L2224/45014 , H01L2224/48091 , H01L2924/00014 , H01L2924/3011 , H01L2224/45015 , H01L2924/207
摘要： A microelectronic package 700 includes a microelectronic element 702 having contacts 706, a flexible substrate 712 spaced from and overlying the microelectronic element and a plurality of conductive posts 726 extending from the flexible substrate 712 and projecting away from the microelectronic element 702. The conductive posts are electrically interconnected with the microelectronic element. Each conductive post has a conductive base 728 that is in contact with the flexible substrate 712 and a conductive tip 730 that extends from the base, with the base of the conductive post having a larger diameter than the tip of the conductive post. In certain embodiments, the conductive base and the conductive tip have a cylindrical shape.
摘要翻译：微电子封装700包括微电子元件702，微电子元件702具有触点706，与微电子元件间隔开并且覆盖微电子元件的柔性衬底712以及从柔性衬底712延伸并远离微电子元件702突出的多个导电柱726。与微电子元件电互连。每个导电柱具有与柔性衬底712接触的导电基部728和从基部延伸的导电尖端730，其中导电柱的基部的直径大于导电柱的尖端的直径。在某些实施例中，导电基底和导电尖端具有圆柱形状。

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