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    • 4. 发明申请
    • HIGH PRESSURE COMPATIBLE VACUUM CHECK FOR SEMICONDUCTOR WAFER INCLUDING LIFT MECHANISM
    • 用于半导体波形的高压兼容真空检查,包括提升机构
    • WO2004044953A2
    • 2004-05-27
    • PCT/US2003/035017
    • 2003-11-03
    • SUPERCRITICAL SYSTEMS INC.
    • SUTTON, Thomas, R.BIBERGER, Maximilian, A.
    • H01L
    • H01L21/68742B25B11/005H01L21/6838
    • A vacuum chuck fir holding a semiconductor wafer during high pressure processing comprises a wafer platen, first through third lift pins, and an actuator mechanism. The wafer platen comprises a smooth surface, first through third lift pin holes, and a vacuum opening. In use, the vacuum opening applies vacuum to a surface of a semiconductor wafer, which chucks the semiconductor wafer to the wafer platen. The first through third lift pins mount within the first of third lift pin holes, respectively. The actuator mechanism couples the first through third lifting pins to the wafer platen. The actuator mechanism couples the first through third lifting pins to the wafer platen. The actuator mechanism operates to extend the first through third lift pins in unison above the smooth surface of the wafer platen. The actuator mechanism operates to retract the first through third lift pins in unison to at least flush with the smooth surface of the wafer platen.
    • 在高压处理期间保持半导体晶片的真空吸盘冷却包括晶片压板,第一至第三提升销和致动器机构。 晶片台板包括光滑表面,第一至第三提升销孔和真空开口。 在使用中,真空开口对半导体晶片的表面施加真空,半导体晶片将半导体晶片夹在晶圆台板上。 第一至第三提升销分别安装在第一个第三提升销孔内。 致动器机构将第一至第三提升销连接到晶片台板。 致动器机构将第一至第三提升销连接到晶片台板。 致动器机构用于在晶片压板的平滑表面上同时延伸第一至第三提升销。 致动器机构操作以使第一至第三升降销一致地至少与晶片台板的平滑表面齐平。
    • 5. 发明申请
    • HIGH PRESSURE PROCESSING CHAMBER FOR SEMICONDUCTOR SUBSTRATE INCLUDING FLOW ENHANCING FEATURES
    • 用于半导体基板的高压加工室,包括流动增强特性
    • WO2002084709A2
    • 2002-10-24
    • PCT/US2002/011461
    • 2002-04-10
    • SUPERCRITICAL SYSTEMS INC.
    • BIBERGER, Maximilian, A.LAYMAN, Frederick, P.SUTTON, Thomas, R.
    • H01L
    • H01L21/67051B08B3/02H01L21/67017H01L21/67069H01L21/6708H01L21/67126H01L21/6715
    • A high pressure chamber for processing of a semiconductor substrate comprises a high pressure processing cavity, a plurality of injection nozzles, and first and second outlet ports. The high pressure processing cavity holds the semiconductor substrate during high pressure processing. The plurality of injection nozzles are oriented into the high pressure processing cavity at a vortex angle and are operable to produce a vortex over a surface of the semiconductor substrate. The first and second outlet ports are located proximate to a center of the plurality of injection nozzles and are operable in a first time segment to provide an operating outlet out of the first outlet port and operable in a second time segment to provide the operating outlet out of the second outlet port. In an alternative embodiment, an upper surface of the high pressure processing cavity comprises a height variation. The height variation produces more uniform molecular speeds for a process fluid flowing over the semiconductor substrate.
    • 用于处理半导体衬底的高压室包括高压处理腔,多个注射喷嘴以及第一和第二出口。 高压处理腔在高压处理期间保持半导体衬底。 多个注射喷嘴以涡旋角度定向到高压处理空腔中,并且可操作以在半导体衬底的表面上产生涡流。 第一和第二出口端口位于多个注射喷嘴的中心附近,并且可在第一时间段中操作以将操作出口提供出第一出口端口并且可在第二时间段中操作以将操作出口 的第二个出口。 在替代实施例中,高压处理腔的上表面包括高度变化。 高度变化对流过半导体衬底的工艺流体产生更均匀的分子速度。