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    • 1. 发明申请
    • OUTPUT CIRCUITS WITH CLASS D AMPLIFIER
    • 具有D类放大器的输出电路
    • WO2008144134A1
    • 2008-11-27
    • PCT/US2008/060232
    • 2008-04-14
    • QUALCOMM IncorporatedWALKER, Brett C.SHI, Song Stone
    • WALKER, Brett C.SHI, Song Stone
    • H03F3/217
    • H03F3/217H03F2200/03H03F2200/345H03F2200/351
    • Output circuits using pulse width modulation (PWM) and/or pulse density modulation (PDM) are described. In one aspect, a PWM output circuit includes a PWM modulator that operates based on a square wave signal instead of a sawtooth or triangular wave signal. In another aspect, a PDM output circuit includes a PDM modulator that uses variable reference voltages to reduce variations in switching frequency. In yet another aspect, a dual-mode output circuit supports both PWM and PDM and includes a pulse modulator and a class D amplifier. The pulse modulator performs PWM on an input signal if a PWM mode is selected and performs PDM on the input signal if a PDM mode is selected. The class D amplifier receives a driver signal from the pulse modulator and generates an output signal.
    • 描述使用脉冲宽度调制(PWM)和/或脉冲密度调制(PDM)的输出电路。 一方面,PWM输出电路包括基于方波信号而不是锯齿波或三角波信号进行操作的PWM调制器。 在另一方面,PDM输出电路包括使用可变参考电压以减少开关频率变化的PDM调制器。 在另一方面,双模输出电路支持PWM和PDM,并且包括脉冲调制器和D类放大器。 如果选择了PWM模式,则脉冲调制器对输入信号执行PWM,如果选择了PDM模式,则在输入信号上执行PDM。 D类放大器从脉冲调制器接收驱动信号并产生一个输出信号。
    • 2. 发明申请
    • CONTINUOUSLY VARIABLE GAIN RADIO FREQUENCY DRIVER AMPLIFIER HAVING LINEAR IN DECIBEL GAIN CONTROL CHARACTERISTICS
    • 具有线性差分增益控制特性的连续可变增益射频驱动放大器
    • WO2004045226A2
    • 2004-05-27
    • PCT/US2003/036231
    • 2003-11-12
    • QUALCOMM INCORPORATED
    • BARNETT, KennethWALKER, Brett C.GARD, Kevin
    • H04Q7/00
    • H04B5/00H03F1/301H03G1/04H03G3/3036H03G3/3042H03G7/001
    • A radio frequency (RF) driver amplifier system and method that provides linear in decibel gain control is provided. The RF driver amplifier system comprises a linear transconductor receiving an input voltage and providing a controlled current based on input voltage received, temperature compensation circuitry for varying current from the linear transconductor according to absolute temperature, an exponential current controller receiving current varied according to temperature and providing an exponential current in response, and an inductive degeneration compensator receiving exponential current and providing a control current to driver amplifier circuitry , thereby compensating for inductive degeneration due to at least one inductor in the driver amplifier circuitry . Control current passes from the inductive degeneration compensator to the driver amplifier circuitry . Output gain from the driver amplifier circuitry varies linearly in decibels with respect to the input voltage.
    • 提供了一种提供线性分贝增益控制的射频(RF)驱动放大器系统和方法。 该RF驱动放大器系统包括接收输入电压并基于接收到的输入电压提供受控电流的线性跨导器,用于根据绝对温度改变来自线性跨导器的电流的温度补偿电路,接收根据温度变化的电流的指数电流控制器和 提供响应的指数电流,以及接收指数电流并向驱动器放大器电路提供控制电流从而补偿由于驱动器放大器电路中的至少一个电感器引起的电感负反馈的电感负反馈补偿器。 控制电流从感性负反馈补偿器传递到驱动器放大器电路。 来自驱动器放大器电路的输出增益相对于输入电压以分贝线性变化。
    • 3. 发明申请
    • WIRELESS COMMUNICATION DEVICE WITH PHASE-LOCKED LOOP OSCILLATOR
    • 具有锁相环振荡器的无线通信装置
    • WO2004006436A2
    • 2004-01-15
    • PCT/US2003/021232
    • 2003-07-02
    • QUALCOMM INCORPORATED
    • WALKER, Brett C.
    • H03L7/081
    • H03L7/18H03K23/667H03K23/68H03L7/081H03L7/1974
    • A frequency generating circuit utilizes a quad modulus prescaler in which two control signals are used to select the prescaler modulus. The modulus control signals are generated by a multistage counter in which two independent counting stages are used to generate the first and second modulus control signals. The first modulus control signal is at a first logic level when the associated counter is at a non-zero value and is at a second logic level when the associated counter reaches zero. The second modulus control signal is generated by a second counter and has a first logic value when the second counter is in a non-zero state and a second logic value when the second counter reaches zero.
    • 频率发生电路使用四模预分频器,其中使用两个控制信号来选择预分频器模数。 模数控制信号由多级计数器产生,其中使用两个独立的计数级来产生第一和第二模数控制信号。 当相关联的计数器处于非零值时,第一模数控制信号处于第一逻辑电平,并且当相关联的计数器达到零时处于第二逻辑电平。 第二模数控制信号由第二计数器产生,并且当第二计数器处于非零状态时具有第一逻辑值,当第二计数器达到零时具有第二逻辑值。
    • 5. 发明申请
    • MULTI-STANDARD TRANSMITTER SYSTEM AND METHOD FOR A WIRELESS COMMUNICATION SYSTEM
    • 用于无线通信系统的多标准发射机系统和方法
    • WO2003067841A2
    • 2003-08-14
    • PCT/US2003/003557
    • 2003-02-04
    • QUALCOMM, INCORPORATED
    • MOLLENKOPF, Steven M.SEE, AndrewWALKER, Brett C.
    • H04L27/20
    • H04L27/2017H04B1/0475H04L27/2092
    • A transmitter (108) converts a digital baseband signal input (150) for transmission by an antenna (114) to support multiple communication standards. An over-deviation phase multiplier (130) increases signal phase deviation by a factor of M. A digital phase modulator (176) applies trigonometric lookup tables. A digital intermediate frequency up-converter (132) up-shifts frequencies of desired signal content. First and second digital-to-analog converters (DACs) (134) and (136) use relatively low-bit operations, which add DAC noise (212). First and second low pass filters (138) and (140) apply rejection above frequencies of desired signal content. An analog I/Q modulator (142) converts from complex to real signals, adding an unwanted signal spaced from the desired signal content by an intermediate frequency multiple. A limiter (144) reduces amplitude modulated noise. An over-deviation phase divider (146) divides signal phase deviation by 1/M to reduce phase modulated noise.
    • 发射机(108)转换由天线(114)发射的数字基带信号输入(150)以支持多种通信标准。 超偏差相位乘法器(130)将信号相位偏差增加M倍。数字相位调制器(176)应用三角查找表。 数字中频上变频器(132)使期望的信号内容的频率上移。 第一和第二数模转换器(DAC)(134)和(136)使用相对低位的操作,这些操作增加了DAC噪声(212)。 第一和第二低通滤波器(138)和(140)在所需信号含量的频率之上施加抑制。 模拟I / Q调制器(142)从复信号转换为真信号,通过中频倍数添加与期望信号内容隔开的不想要的信号。 限制器(144)减小调幅噪声。 超偏差分相器(146)将信号相位偏差除以1 / M以减少相位调制噪声。