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1. 发明申请

WO0118870A3 Charge compensating semiconductor device and method for the production thereof 审中-公开
标题翻译：电荷补偿半导体器件和其制备方法
公开(公告)号：WO0118870A3
公开(公告)日：2001-08-02
申请号：PCT/EP0008707
申请日：2000-09-06
申请人： MAUDER ANTON , SCHULZE HANS-JOACHIM , DEBOY GERALD , STRACK HELMUT , INFINEON TECHNOLOGIES AG
发明人： MAUDER ANTON , SCHULZE HANS-JOACHIM , DEBOY GERALD , STRACK HELMUT
IPC分类号： H01L21/265 , H01L21/266 , H01L29/06 , H01L29/167 , H01L21/20
CPC分类号： H01L21/26513 , H01L21/266 , H01L29/0619 , H01L29/0634 , H01L29/167
摘要： A compensating component and a method for the production thereof are described. Compensating regions are produced by implanting sulfur or selenium in a p-conductive semiconductor layer or, are provided as p-conductive regions, which are doped with indium, thallium and/or palladium, in a cluster-like manner inside an n-conductive region.

2. 发明申请

WO0017937A2 METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT 审中-公开
标题翻译：方法的半导体元件
公开(公告)号：WO0017937A2
公开(公告)日：2000-03-30
申请号：PCT/DE9903081
申请日：1999-09-24
申请人： SIEMENS AG , DEBOY GERALD , STRACK HELMUT , HAEBERLEN OLIVER , RUEB MICHAEL , FRIZA WOLFGANG
发明人： DEBOY GERALD , STRACK HELMUT , HAEBERLEN OLIVER , RUEB MICHAEL , FRIZA WOLFGANG
IPC分类号： H01L21/265 , H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78
CPC分类号： H01L29/0634 , H01L21/26586 , H01L29/0619 , H01L29/0623 , H01L29/0649 , H01L29/0653 , H01L29/1095 , H01L29/41766 , H01L29/7802
摘要： The invention relates to a method for producing a semiconductor component comprising semiconductor areas (4, 5) of different conductivity types which are alternately positioned in a semiconductor body and in said semiconductor body (1) extend at least from one first zone (6) to near a second zone (1) and by way of variable dopage from trenches (11, 14) and their fillings generate an electric field which increases from both said zones (6, 1).
摘要翻译：本发明涉及一种半导体装置的制造与交替地布置在半导体本体中的半导体区域的方法（4,5）是在半导体本体延伸的交替不同的导电类型（1）的至少一个第一区域（6）的附近到第二区（1 ）通过挖沟（11的可变掺杂延伸，14）和它们的填充产生电场，这两个区域中的一个（6,1）具有从上升轮廓。

3. 发明申请

WO9923703A9 HIGH VOLTAGE RESISTANT EDGE STRUCTURE FOR SEMICONDUCTOR ELEMENTS 审中-公开
标题翻译：用于半导体元件的高电压边缘结构
公开(公告)号：WO9923703A9
公开(公告)日：1999-09-02
申请号：PCT/DE9803197
申请日：1998-11-02
申请人： SIEMENS AG , DEBOY GERALD , TIHANYI JENOE , STRACK HELMUT , GASSEL HELMUT , STENGL JENS PEER , WEBER HANS
发明人： DEBOY GERALD , TIHANYI JENOE , STRACK HELMUT , GASSEL HELMUT , STENGL JENS-PEER , WEBER HANS
IPC分类号： H01L29/06 , H01L29/417 , H01L29/739 , H01L29/78
CPC分类号： H01L29/0634 , H01L29/41766 , H01L29/7395 , H01L29/7396 , H01L29/7802
摘要： The invention relates to a high voltage resistant edge structure in the edge area of a semiconductor element, comprising floating guard rings of a first conductivity type and intermediate ring areas of a second conductivity type arranged between said floating guard rings. The conductivity and/or geometry of the floating guard rings and/or intermediate ring areas is adjusted in such a way that the charge carriers are fully cleared when a blocking voltage is applied. The inventive edge structure enables the electrical field to be modulated on both the surface and in the volume of the semiconductor body. By dimensioning the inventive edge structure in an appropriate manner, maximum field intensity can be applied depthwise in a simple manner i.e. in the vertical pn transition area. An appropriate edge structure enabling a "soft" volume electrical-field run out to be continuously obtained by means of an extensive p and n doped concentration area.
摘要翻译：本发明涉及一种在具有浮置所述第一导电类型的保护环的半导体器件的边缘区域中的耐高压的边缘结构和设置在所述第二导电类型的浮置保护环中间环区，导电性和/或浮置保护环和/或所述中间环区的几何结构之间以这样的方式被设置其施加反向电压时完全清除电荷载体。根据本发明的边缘结构实现了在半导体本体的表面和体积中的电场的调制。通过根据本发明的边缘结构的合适的尺寸，可以容易地降低场强的最大值，即，在垂直pn结的区域。在这种情况下总是可以指定在宽范围的p型和n型掺杂，其允许在该卷的“软”的电场的泄漏浓度的匹配边缘结构。

4. 发明申请

WO2004055962A3 RESONANCE CONVERTER WITH VOLTAGE CONTROL AND METHOD FOR DRIVING VARIABLE LOADS 审中-公开
标题翻译：与功率控制和驱动方法变载荷谐振变换器
公开(公告)号：WO2004055962A3
公开(公告)日：2005-02-17
申请号：PCT/EP0314428
申请日：2003-12-17
申请人： FRAUNHOFER GES FORSCHUNG , INFINEON TECHNOLOGIES AG , RADECKER MATTHIAS , DEBOY GERALD
发明人： RADECKER MATTHIAS , DEBOY GERALD
IPC分类号： H02M3/28 , H02M7/539
CPC分类号： H02M3/28 , H02M2001/0058 , Y02B70/1491
摘要： The invention relates to a resonance converter for driving variable loads, wherein an input signal which is supplied by a switch (103) which is controlled by a control device (109) is initially converted into an output signal by a transformer (105). The dimensions and circuitry of the transformer (105) are such that the transformation ratio between the input signal and output signal ranges from 5:1 to 100:1 when nominal power is supplied to the variable load (107). The switching frequency of the switch (103) is controlled on the basis of phase displacement between the switch current and the load current for a modifiable load and/or variable input voltage, a variable dependent on the input voltage and a variable dependent on the output voltage. The inventive resonance converter enables variable loads to be driven efficiently with the aid of a transformer.
摘要翻译：在用于通过由控制装置（109）控制的开关驱动可变负载（107）所涉及的谐振转换器，提供的输入信号首先由变压器（105）变换为输出信号进行转换。变压器的尺寸和连接，使得当输送一个额定功率的可变负载，输入信号和第5输出信号之间的Abtransformationsverhältnis：1至100：1。所述开关（103）的开关频率是在可变负载（107）和/或可变输入电压的开关电流和负载电流之间的相移，一个依赖于输入电压值和依赖于输出电压大小的频率的基础上控制的。因此，本发明的谐振转换器使得它能够通过一个变压器（105）的装置有效地驱动可变负载。

5. 发明申请

WO0016407A3 SWITCHING TRANSISTOR WITH REDUCED SWITCHING LOSSES 审中-公开
标题翻译：开关损耗减小切换电源
公开(公告)号：WO0016407A3
公开(公告)日：2000-11-09
申请号：PCT/DE9902874
申请日：1999-09-10
申请人： SIEMENS AG , DEBOY GERALD , MAERZ MARTIN , HIRLER FRANZ , WEBER HANS
发明人： DEBOY GERALD , MAERZ MARTIN , HIRLER FRANZ , WEBER HANS
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8234 , H01L27/06 , H01L29/10 , H01L29/78 , H02M3/00 , H03K17/0814 , H03K17/695 , H02M3/155
CPC分类号： H01L29/1095 , H01L29/0634 , H01L29/7802 , H01L29/7816 , H03K17/08142
摘要： The invention relates to a switching transistor presenting reduced switching losses. In said switching transistor output capacitance is very high when drain/source voltages are low. As the drain/source voltage increases said capacitance falls to such low values that the energy stored in the transistor becomes very low.
摘要翻译：本发明涉及一种具有降低开关损耗的开关晶体管。在该开关晶体管在低的漏极 - 源极电压的输出电容具有非常高的值，这与使得在晶体管所存储的能量假设非常低的值增加漏极 - 源极电压下降到小的值的电容。

6. 发明申请

WO2012093177A3 SEMICONDUCTOR DEVICE ARRANGEMENT WITH A FIRST SEMICONDUCTOR DEVICE AND WITH A PLURALITY OF SECOND SEMI CONDUCTOR DEVICES 审中-公开
标题翻译：具有第一半导体器件的半导体器件布置以及多个第二半导体器件
公开(公告)号：WO2012093177A3
公开(公告)日：2013-01-10
申请号：PCT/EP2012050245
申请日：2012-01-09
申请人： INFINEON TECHNOLOGIES AUSTRIA , WEIS ROLF , HIRLER FRANZ , FELDTKELLER MARTIN , DEBOY GERALD , STECHER MATTHIAS , WILLMEROTH ARMIN
发明人： WEIS ROLF , HIRLER FRANZ , FELDTKELLER MARTIN , DEBOY GERALD , STECHER MATTHIAS , WILLMEROTH ARMIN
IPC分类号： H01L27/088 , G05F1/573 , H01L27/02 , H01L27/06 , H01L27/07 , H01L29/40 , H01L29/78 , H02H9/02
CPC分类号： H01L27/0207 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/0623 , H01L27/0629 , H01L27/0727 , H01L27/088 , H01L27/0883 , H01L27/0886 , H01L27/098 , H01L29/0653 , H01L29/0692 , H01L29/0696 , H01L29/4236 , H01L29/4238 , H01L29/78 , H01L29/7817 , H01L29/7824 , H01L29/7825 , H01L29/7835 , H01L29/7838 , H03K17/06
摘要： Disclosed is a semiconductor device arrangement including a first semiconductor device having a load path, and a plurality of second transistors, each having a load path between a first and a second load terminal and a control terminal. The second transistors have their load paths connected in series and connected in series to the load path of the first transistor, each of the second transistors has its control terminal connected to the load terminal of one of the other second transistors, and one of the second transistors has its control terminal connected to one of the load terminals of the first semiconductor device.
摘要翻译：公开了一种包括具有负载路径的第一半导体器件和多个第二晶体管的半导体器件布置，每个第二晶体管具有在第一和第二负载端子与控制端子之间的负载路径。第二晶体管的负载路径串联连接并与第一晶体管的负载路径串联连接，每个第二晶体管的控制端连接到其它第二晶体管之一的负载端，第二晶体管中的一个晶体管的控制端子连接到第一半导体器件的一个负载端子。

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