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    • 7. 发明申请
    • INTEGRATED CAPACITOR ARRANGEMENT FOR ULTRAHIGH CAPACITANCE VALUES
    • 用于超高电容值的集成电容器布置
    • WO2007054858A2
    • 2007-05-18
    • PCT/IB2006/054063
    • 2006-11-02
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.ROOZEBOOM, FreddyKLOOTWIJK, Johan, H.KEMMEREN, Antonius, L., A., M.REEFMAN, DerkVERHOEVEN, Johannes, F., C., M.
    • ROOZEBOOM, FreddyKLOOTWIJK, Johan, H.KEMMEREN, Antonius, L., A., M.REEFMAN, DerkVERHOEVEN, Johannes, F., C., M.
    • H01L28/91H01L27/0805H01L27/1087H01L29/945
    • The present invention relates to an electronic device (300) comprising at least one trench capacitor (302) that can also take the form of an inverse structure, a pillar capacitor. An alternating layer sequence (308) of at least two dielectric layers (312, 316) and at least two electrically conductive layers (314, 318) is provided in the trench capacitor or on the pillar capacitor, such that the at least two electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least two dielectric layers. A set of internal contact pads (332, 334, 340) is provided, and each internal contact pad is connected with a respective one of the electrically conductive layers or with the substrate. By providing an individual internal contact pad for each of the electrically conductive layers, a range of switching opportunities is opened up that allows tuning the specific capacitance of the capacitor to a desired value. The electronic device of the invention thus provides a flexible trench-capacitor manufacturing platform for a multitude of combinations of electrically conductive layers with each other, or, when multiple trenches are used, between electrically conductive layers of different trench capacitors. On-chip applications such as a charge-pump circuit or a DC-to-DC voltage converter are claimed that benefit from the ultra-high capacitance density and the high breakdown voltage that can be achieved with the electronic device of the invention.
    • 本发明涉及包括至少一个沟槽电容器(302)的电子器件(300),所述沟槽电容器也可以采取反转结构的形式,即柱电容器。 在沟槽电容器或柱电容器中提供至少两个电介质层(312,316)和至少两个导电层(314,318)的交替层序列(308),使得至少两个导电层 通过所述至少两个电介质层中的相应电介质层将所述层彼此电隔离并且与所述衬底电隔离。 提供一组内部接触垫(332,334,340),并且每个内部接触垫与相应的一个导电层或与衬底连接。 通过为每个导电层提供单独的内部接触垫,打开一定范围的开关机会,允许将电容器的比电容调整到期望值。 因此,本发明的电子设备提供了用于导电层彼此之间的多种组合或者当使用多个沟槽时在不同沟槽电容器的导电层之间的柔性沟槽电容器制造平台。 据称,诸如电荷泵电路或DC-DC电压转换器之类的片上应用受益于可用本发明的电子器件实现的超高电容密度和高击穿电压。 p>
    • 9. 发明申请
    • TRENCH ISOLATION STRUCTURE, SEMICONDUCTOR ASSEMBLY COMPRISING SUCH A TRENCH ISOLATION, AND METHOD FOR FORMING SUCH A TRENCH ISOLATION
    • 铁路隔离结构,包含这种隔离隔离件的半导体组件以及形成这种隔离隔离件的方法
    • WO2004068575A1
    • 2004-08-12
    • PCT/IB2003/006321
    • 2003-12-16
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.KLOOTWIJK, Johan, H.
    • KLOOTWIJK, Johan, H.
    • H01L21/762
    • H01L21/76264
    • The present invention provides a trench isolation structure, comprising a trench groove (4) in a semiconductor slab (1) with a buried layer (2). The trench groove (4) is lined with first insulating material (5), then filled with a first filler material (6) up to the level of the buried layer. Then second insulating material (7), for example an oxide, is preferably applied in the volume which is surrounded by the buried layer (2). The remaining part of the trench groove (4) is either filled with second filler material (8) or with second insulating material.Said structure provides lower capacitive coupling between buried layer (2) edge and substrate (1), with improved thermal behavior.The invention furthermore provides a semiconductor assembly comprising said trench isolation structure and at least one semiconductor device, as well as a method for forming such a trench isolation structure.
    • 本发明提供了一种沟槽隔离结构,其包括在具有掩埋层(2)的半导体板(1)中的沟槽(4)。 沟槽(4)衬有第一绝缘材料(5),然后填充到第一填充材料(6)直到掩埋层的高度。 然后,第二绝缘材料(7),例如氧化物,优选地被被埋层(2)包围的体积中施加。 沟槽(4)的剩余部分填充有第二填充材料(8)或第二绝缘材料。所述结构在掩埋层(2)边缘和衬底(1)之间提供较低的电容耦合,具有改进的热性能。 本发明还提供一种包括所述沟槽隔离结构和至少一个半导体器件的半导体组件,以及用于形成这种沟槽隔离结构的方法。