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1. 发明申请

WO2004038769A2 FLIP-CHIP SYSTEM AND METHOD OF MAKING SAME 审中-公开
标题翻译：翻转片系统及其制造方法
公开(公告)号：WO2004038769A2
公开(公告)日：2004-05-06
申请号：PCT/US2003/033736
申请日：2003-10-23
申请人： INTEL CORPORATION
发明人： JAYARAMAN, Saikumar , WAKHARKAR, Vijay
IPC分类号： H01L21/00
CPC分类号： H01L23/293 , C08G59/3254 , H01L21/563 , H01L24/29 , H01L24/743 , H01L2224/16225 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/83102 , H01L2224/83192 , H01L2224/92125 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/10329 , H01L2924/14 , H01L2924/3512 , H01L2924/00 , H01L2924/00012 , H01L2224/13111 , H01L2924/0665 , H01L2224/0401
摘要： A system for underfilling in a chip package includes an underfill mixture that ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In one embodiment, the system includes an underfill mixture that alone exhibits a CTE that is characteristic of an inorganic-filled underfill composite previously known. An embodiment is also directed to the assembly of a flip-chip package that uses an underfill mixture.
摘要翻译：用于芯片封装中的底部填充的系统包括改善通常存在于封装芯片和树脂浸渍玻璃纤维安装衬底之间的CTE失配的底部填充混合物。在一个实施例中，该系统包括底部填充混合物，其单独表现出以前已知的无机填充的底部填充复合物的特征的CTE。一个实施例也涉及使用底部填充混合物的倒装芯片封装的组装。

2. 发明申请

WO2005006428A1 UNDERFILL AND MOLD COMPOUNDS INCLUDING SILOXANE-BASED AROMATIC DIAMINES 审中-公开
标题翻译：底漆和模具化合物，包括基于硅氧烷的芳族二胺
公开(公告)号：WO2005006428A1
公开(公告)日：2005-01-20
申请号：PCT/US2004/019371
申请日：2004-06-16
申请人： INTEL CORPORATION
发明人： JAYARAMAN, Saikumar
IPC分类号： H01L21/56
CPC分类号： C08G69/42 , C08G59/504 , H01L21/563 , H01L23/293 , H01L23/296 , H01L23/3128 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/00014 , H01L2924/00 , H01L2224/0401
摘要： An apparatus including a first substrate comprising a first set of contact points; a second substrate including a second set of contact points coupled to the first substrate through interconnections between a portion of the first set of contact points a portion of the second set of contact points; and a composition disposed between the first substrate and the second substrate including a siloxane-based aromatic diamine.
摘要翻译：一种装置，包括：第一基板，包括第一组接触点; 第二基板，包括通过第一组接触点的一部分与第二组接触点的一部分之间的互连而耦合到第一基板的第二组接触点; 以及设置在所述第一基板和所述第二基板之间的包含硅氧烷基芳族二胺的组合物。

3. 发明申请

WO2003034489A1 THERMAL INTERFACE MATERIAL AND ELECTRONIC ASSEMBLY HAVING SUCH A THERMAL INTERFACE MATERIAL 审中-公开
标题翻译：热接口材料和具有这种热界面材料的电子组件
公开(公告)号：WO2003034489A1
公开(公告)日：2003-04-24
申请号：PCT/US2002/033422
申请日：2002-10-17
申请人： INTEL CORPORATION
发明人： RUMER, Christopher , KONING, Paul , JAYARAMAN, Saikumar , DANI, Ashay
IPC分类号： H01L23/42
CPC分类号： H01L24/29 , H01L23/3737 , H01L23/42 , H01L2224/16225 , H01L2224/16227 , H01L2224/29 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29309 , H01L2224/29311 , H01L2224/29324 , H01L2224/29339 , H01L2224/29347 , H01L2224/29355 , H01L2224/29386 , H01L2224/29393 , H01L2224/32245 , H01L2224/73253 , H01L2924/0001 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/0104 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01058 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/0134 , H01L2924/0135 , H01L2924/014 , H01L2924/0665 , H01L2924/14 , H01L2924/16152 , Y10S428/913 , Y10T428/1225 , Y10T428/12701 , Y10T428/12896 , Y10T428/25 , Y10T428/252 , Y10T428/256 , Y10T428/257 , Y10T428/258 , Y10T428/2982 , Y10T428/31511 , Y10T428/31529 , Y10T428/31663 , Y10T428/31692 , H01L2924/00 , H01L2924/01022 , H01L2924/01034 , H01L2924/01083 , H01L2224/29099 , H01L2924/00014 , H01L2924/0503 , H01L2924/05032 , H01L2924/04642 , H01L2924/05432 , H01L2224/29199 , H01L2224/29299
摘要： A thermal interface material is described for thermal coupling of an electronic component to a thermally conductive member. The thermal interface material includes a viscoelastic polymer matrix material, fusible solder particles in the matrix material, and filler particles in the matrix material. The solder particles have a melting temperature below a selected temperature (e.g. 157°C for indium) and the filler particles have a melting temperature substantially above the selected temperature (e.g. 961°C for silver). The filler particles keep the thermal interface material intact under adverse thermal and stress conditions.
摘要翻译：描述了热界面材料用于将电子部件热耦合到导热部件。热界面材料包括粘弹性聚合物基质材料，基质材料中的易熔焊料颗粒和基质材料中的填料颗粒。焊料颗粒的熔融温度低于所选择的温度（例如铟的157℃），并且填料颗粒具有基本上高于所选温度的熔融温度（例如银的961℃）。填料颗粒在不利的热和应力条件下保持热界面材料完好无损。

4. 发明申请

WO2018004907A1 INTEGRATED CIRCUIT PACKAGE STACK 审中-公开
标题翻译：集成电路封装堆栈
公开(公告)号：WO2018004907A1
公开(公告)日：2018-01-04
申请号：PCT/US2017/034761
申请日：2017-05-26
申请人： INTEL CORPORATION
发明人： JAYARAMAN, Saikumar , GUZEK, John S. , MEKONNEN, Yidnekachew S.
IPC分类号： H01L25/07 , H01L25/065 , H01L23/48 , H01L23/538
摘要： Apparatuses, methods and systems associated with integrated circuit (IC) package design are disclosed herein. An IC package stack may include a first IC package and a second IC package. The first IC package may include a first die and a first redistribution layer that communicatively couples contacts on the first side of the first IC package to the first die and to contacts on a second side of the first IC package, the second side opposite to the first side. The second IC package may be mounted to the second side of the first IC package. The second IC package may include a second die and a second redistribution layer that communicatively couples contacts on a side of the second IC package to the second die, the contacts of the second IC package communicatively coupled to the contacts on the second side of the first IC package.
摘要翻译：本文公开了与集成电路（IC）封装设计相关联的设备，方法和系统。 IC封装堆叠可以包括第一IC封装和第二IC封装。第一IC封装可以包括第一管芯和第一重新分布层，其将第一IC封装的第一侧上的接触连通地耦合到第一管芯并且连接到第一IC封装的第二侧上的接触，第二侧与第一面。第二IC封装可以被安装到第一IC封装的第二侧。第二IC封装可以包括第二管芯和第二重分配层，其将第二IC封装的一侧上的接触通信地耦合到第二管芯，第二IC封装的接触通信地耦合到第一IC芯片的第一侧上的接触 IC封装。

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