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    • 1. 发明申请
    • NEURAL NETWORK AND METHOD OF PROGRAMMING
    • 神经网络和编程方法
    • WO2014149070A1
    • 2014-09-25
    • PCT/US2013/057724
    • 2013-08-30
    • HRL LABORATORIES, LLC
    • SRINIVASA, NarayanCHO, Youngkwan
    • G06N3/02
    • G06N3/08G06N3/049
    • A neural network, wherein a portion of the neural network comprises: a first array having a first number of neurons, wherein the dendrite of each neuron of the first array is provided for receiving an input signal indicating that a measured parameter gets closer to a predetermined value assigned to said neuron; and a second array having a second number of neurons, wherein the second number is smaller than the first number, the dendrite of each neuron of the second array forming an excitatory STDP synapse with the axon of a plurality of neurons of the first array; the dendrite of each neuron of the second array forming an excitatory STDP synapse with the axon of neighboring neurons of the second array.
    • 神经网络,其中所述神经网络的一部分包括:具有第一数量的神经元的第一阵列,其中所述第一阵列的每个神经元的枝晶被提供用于接收输入信号,所述输入信号指示所测量的参数越接近预定的 分配给所述神经元的值; 以及具有第二数量的神经元的第二阵列,其中所述第二数目小于所述第一数目,所述第二阵列的每个神经元的枝晶与所述第一阵列的多个神经元的轴突形成兴奋性STDP突触; 第二阵列的每个神经元的树突形成与第二阵列的相邻神经元的轴突的兴奋性STDP突触。
    • 2. 发明申请
    • NEURON CIRCUIT AND METHOD
    • 神经电路和方法
    • WO2014018078A1
    • 2014-01-30
    • PCT/US2012/065640
    • 2012-11-16
    • HRL LABORATORIES, LLC
    • CRUZ-ALBRECHT, JoseSRINIVASA, NarayanYUNG, Micahel W.
    • G06G7/60G06N3/02
    • G06N3/02G06N3/049G06N3/0635
    • A spike domain asynchronous neuron circuit includes a first spike to exponential circuit for emulating kinetic dynamics at a neuron input and converting voltage spikes into exponentials, a first adjustable gain circuit for emulating homeostatic plasticity coupled to the first voltage-type spike exponential output and having a first current output, a neuron core circuit coupled to the first current output for emulating a neuron core and having a spike encoded voltage output, a filter and comparator circuit coupled to the spike encoded voltage output and having a gain control output coupled to the first adjustable gain circuit for controlling a gain of the first adjustable gain circuit, and an adjustable delay circuit for emulating an axonal delay coupled to the spike encoded voltage output and having an axonal delay output.
    • 尖峰域异步神经元电路包括用于模拟神经元输入处的动力学并将电压尖峰转换为指数的指数电路的第一尖峰,用于模拟耦合到第一电压型尖峰指数输出的稳态可塑性的第一可调增益电路, 第一电流输出,耦合到第一电流输出的神经元核心电路,用于仿真神经元核并具有尖峰编码电压输出;耦合到尖峰编码电压输出的滤波器和比较器电路,并具有耦合到第一可调整电压的增益控制输出 用于控制第一可调增益电路的增益的增益电路,以及用于模拟耦合到尖峰编码电压输出并具有轴突延迟输出的轴突延迟的可调延迟电路。
    • 8. 发明申请
    • GENERATING MESSAGES FROM THE FIRING OF PRE-SYNAPTIC NEURONS
    • 从突触前神经元的发射中产生信息
    • WO2014130120A2
    • 2014-08-28
    • PCT/US2013/072698
    • 2013-12-02
    • HRL LABORATORIES, LLC
    • THIBEAULT, Corey, M.MINKOVICH, KirillSRINIVASA, Narayan
    • G06N3/049G06N3/063
    • A neural network portion comprising N pre-synaptic neurons capable each of firing an action potential, wherein the number N can be encoded in a word of n bits; the neural network portion providing, upon firing of a number F of pre-synaptic neurons in a predetermined period of time: if F.n N, generating a second type message, comprising N bits and encoded in words of n bits, each one of said N pre-synaptic neurons being represented by a unique bit, having a first value if the pre-synaptic neuron represented by the bit fired in said predetermined period of time, and a second value otherwise.
    • 包括N个突触前神经元的神经网络部分,每个突触前神经元能够触发动作电位,其中N可以被编码在n位的字中; 所述神经网络部分在预定时间段内发射若干F个突触前神经元时:如果F.n < N,产生第一类型消息,包括在所述预定时间周期内已经发射的每个突触前神经元的唯一地址,每个地址被编码为n位的字; 如果F.n&gt; N,产生包括N比特并且以n比特的字编码的第二类型消息,所述N个突触前神经元中的每一个由唯一比特表示,如果由所述比特表示的突触前神经元被触发,则所述第二值具有第一值 在所述预定的时间段内,并且在其他情况下为第二值。
    • 9. 发明申请
    • NEURAL INTEGRATED CIRCUIT WITH BIOLOGICAL BEHAVIORS
    • 具有生物行为的神经集成电路
    • WO2018004966A1
    • 2018-01-04
    • PCT/US2017/035323
    • 2017-05-31
    • HRL LABORATORIES, LLC
    • CRUZ-ALBRECHT, JoseDEROSIER, TimothySRINIVASA, Narayan
    • G06N3/063G06N3/04
    • A circuit for emulating the behavior of biological neural circuits, the circuit including a plurality of nodes wherein each node comprises a neuron circuit, a time multiplexed synapse circuit coupled to an input of the neuron circuit, a time multiplexed short term plasticity (STP) circuit coupled to an input of the node and to the synapse circuit, a time multiplexed Spike Timing Dependent Plasticity (STDP) circuit coupled to the input of the node and to the synapse circuit, an output of the node coupled to the neuron circuit; and an interconnect fabric coupled between the plurality of nodes for providing coupling from the output of any node of the plurality of nodes to any input of any other node of the plurality of nodes.
    • 用于模拟生物神经回路的行为的电路,所述电路包括多个节点,其中每个节点包括神经元电路,时间多路复用突触电路,所述时间多路复用突触电路耦合到所述神经元电路的输入,时间 耦合到节点的输入端和突触电路的多路复用短期可塑性(STP)电路,耦合到节点的输入端和突触电路的时分多路复用尖峰时序相关塑性(STDP)电路,节点的输出 耦合到神经元电路; 以及耦合在所述多个节点之间的互连结构,用于提供从所述多个节点的任何节点的输出到所述多个节点中的任何其他节点的任何输入的耦合。