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1. 发明申请

WO2020257168A1 SCALABLE INTEGRATED CIRCUIT WITH SYNAPTIC ELECTRONICS AND CMOS INTEGRATED MEMRISTORS 审中-公开
公开(公告)号：WO2020257168A1
公开(公告)日：2020-12-24
申请号：PCT/US2020/037891
申请日：2020-06-16
申请人： HRL LABORATORIES, LLC
发明人： CRUZ-ALBRECHT, Jose , DEROSIER, Timothy , SRINIVASA, Narayan
IPC分类号： G06N3/063 , G11C11/54 , G11C13/00
摘要： A reconfigurable neural circuit includes an array of processing nodes. Each processing node includes a single physical neuron circuit having only one input and an output, a single physical synapse circuit having a presynaptic input, and a single physical output coupled to the input of the neuron circuit, a weight memory for storing N synaptic conductance value or weights having an output coupled to the single physical synapse circuit, a single physical spike timing dependent plasticity (STDP) circuit having an output coupled to the weight memory, a first input coupled to the output of the neuron circuit, and a second input coupled to the presynaptic input, and interconnect circuitry connected to the presynaptic input and connected to the output of the single physical neuron circuit. The synapse circuit and the STOP circuit are each time multiplexed circuits. The interconnect circuitry in each respective processing node is coupled to the interconnect circuitry in each other processing node.

2. 发明申请

WO2018004966A1 NEURAL INTEGRATED CIRCUIT WITH BIOLOGICAL BEHAVIORS 审中-公开
标题翻译：具有生物行为的神经集成电路
公开(公告)号：WO2018004966A1
公开(公告)日：2018-01-04
申请号：PCT/US2017/035323
申请日：2017-05-31
申请人： HRL LABORATORIES, LLC
发明人： CRUZ-ALBRECHT, Jose , DEROSIER, Timothy , SRINIVASA, Narayan
IPC分类号： G06N3/063 , G06N3/04
摘要： A circuit for emulating the behavior of biological neural circuits, the circuit including a plurality of nodes wherein each node comprises a neuron circuit, a time multiplexed synapse circuit coupled to an input of the neuron circuit, a time multiplexed short term plasticity (STP) circuit coupled to an input of the node and to the synapse circuit, a time multiplexed Spike Timing Dependent Plasticity (STDP) circuit coupled to the input of the node and to the synapse circuit, an output of the node coupled to the neuron circuit; and an interconnect fabric coupled between the plurality of nodes for providing coupling from the output of any node of the plurality of nodes to any input of any other node of the plurality of nodes.
摘要翻译：用于模拟生物神经回路的行为的电路，所述电路包括多个节点，其中每个节点包括神经元电路，时间多路复用突触电路，所述时间多路复用突触电路耦合到所述神经元电路的输入，时间耦合到节点的输入端和突触电路的多路复用短期可塑性（STP）电路，耦合到节点的输入端和突触电路的时分多路复用尖峰时序相关塑性（STDP）电路，节点的输出耦合到神经元电路; 以及耦合在所述多个节点之间的互连结构，用于提供从所述多个节点的任何节点的输出到所述多个节点中的任何其他节点的任何输入的耦合。

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