专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2009008923A3 METHODS OF MAKING NANO-SCALE STRUCTURES HAVING CONTROLLED SIZE, NANOWIRE STRUCTURES AND METHODS OF MAKING THE NANOWIRE STRUCTURES 审中-公开
标题翻译：纳米结构纳米结构的制备方法，纳米结构和纳米结构的制备方法
公开(公告)号：WO2009008923A3
公开(公告)日：2009-08-20
申请号：PCT/US2008004423
申请日：2008-04-02
申请人： HEWLETT PACKARD DEVELOPMENT CO , KOBAYASHI NOBUHIKO , WU WEI , STEWART DUNCAN , SHARMA SHASHANK , WANG SHIH-YUAN , WILLIAMS R STANLEY
发明人： KOBAYASHI NOBUHIKO , WU WEI , STEWART DUNCAN , SHARMA SHASHANK , WANG SHIH-YUAN , WILLIAMS R STANLEY
IPC分类号： B82B3/00 , B82B1/00
CPC分类号： H01L31/035281 , B82Y10/00 , B82Y30/00 , H01L29/0665 , H01L29/0673 , H01L29/068 , H01L31/036 , H01L31/09 , H01L31/101 , H01L31/105 , Y02E10/50 , Y10S977/762 , Y10S977/814
摘要： Methods of making nanometer-scale semiconductor structures with controlled size are disclosed. Semiconductor structures (200, 300, 400, 500, 600. 700) that include one or ore nanowires (104, 204, 304, 404, 504, 604, 704) are also disclosed. The nanowires can include a passivation layer or have a hollow tube structure.
摘要翻译：公开了制造具有可控尺寸的纳米级半导体结构的方法。还公开了包括一个或多个纳米线（104,204,304,404,504,604,704）的半导体结构（200,300,400,500,600,700）。纳米线可以包括钝化层或具有中空管结构。

2. 发明申请

WO2008013778A3 COMPENSATION FOR DISTORTION IN CONTACT LITHOGRAPHY 审中-公开
标题翻译：补偿联系人LITHOGRAPHY的失败
公开(公告)号：WO2008013778A3
公开(公告)日：2008-05-08
申请号：PCT/US2007016580
申请日：2007-07-24
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , STEWART DUNCAN , WANG SHIH-YUAN , WILLIAMS R STANLEY
发明人： WU WEI , STEWART DUNCAN , WANG SHIH-YUAN , WILLIAMS R STANLEY
IPC分类号： G03F7/00 , B29C59/02
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： A method of contact lithography includes predicting distortions likely to occur in transferring a pattern from a mold (110) to a substrate (130) during a contact lithography process: and modifying the mold (110) to compensate for the distortions. A contact lithography system includes a design subsystem (210) configured to generate data describing a lithography pattern: an analysis subsystem (220) configured to identify one or more distortions likely to occur when using a mold (110) created from the data; and a mold modification subsystem (230) configured to modify the data to compensate for the one or more distortions identified by the analysis subsystem (220).
摘要翻译：接触光刻的方法包括预测在接触光刻过程期间将图案从模具（110）转移到衬底（130）时可能发生的变形;以及修改模具（110）以补偿变形。接触光刻系统包括设计子系统（210），其被配置为生成描述光刻图案的数据：分析子系统（220），其被配置为识别当使用由所述数据创建的模具（110）时可能发生的一个或多个失真; 以及模具修改子系统（230），其被配置为修改所述数据以补偿由所述分析子系统（220）识别的所述一个或多个失真。

3. 发明申请

WO2007146031A3 IMPRINT LITHOGRAPHY APPARATUS AND METHODS 审中-公开
公开(公告)号：WO2007146031A3
公开(公告)日：2008-05-22
申请号：PCT/US2007013374
申请日：2007-06-06
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , WANG SHIH-YUAN , YU ZHAONING , WILLIAMS R STANLEY
发明人： WU WEI , WANG SHIH-YUAN , YU ZHAONING , WILLIAMS R STANLEY
IPC分类号： G03F7/00
CPC分类号： B29C37/005 , B29C2035/0827 , B29C2059/023 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： An apparatus for forming a pattern in a curable material carried on a substrate (108) having one or more components with coefficients of thermal expansion that are substantially equal to the coefficient of thermal expansion of the substrate (108).
摘要翻译：在具有一个或多个具有基本上等于衬底（108）的热膨胀系数的热膨胀系数的一个或多个部件的衬底（108）上形成可固化材料的图案形成装置。

4. 发明申请

WO2009011878A2 OPTICAL DEVICE INCLUDING WAVEGUIDE GRATING STRUCTURE 审中-公开
标题翻译：包括波导光栅结构的光学器件
公开(公告)号：WO2009011878A2
公开(公告)日：2009-01-22
申请号：PCT/US2008008715
申请日：2008-07-16
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , FATTAL DAVID , SANTORI CHARLES , BICKNELL ROBERT N , WANG SHIH-YUAN , WILLIAMS R STANLEY , QUITORIANO NATHANIEL J
发明人： WU WEI , FATTAL DAVID , SANTORI CHARLES , BICKNELL ROBERT N , WANG SHIH-YUAN , WILLIAMS R STANLEY , QUITORIANO NATHANIEL J
IPC分类号： G02B6/34
CPC分类号： G02B6/12007 , G02B6/124 , G02F1/0126 , G02F1/3515 , G02F2201/307
摘要： Optical devices (100) including waveguide grating structures (102) are described. In accordance with one embodiment, an optical device (100) is provided comprising a horizontal waveguide grating structure (102) having at least one waveguiding layer (104) and at least one subwavelength periodic grating layer (106). The optical device (100) further comprises upper and lower cladding layers (108, 110) immediately adjoining respective upper and lower surfaces (209, 205) of the waveguide grating structure and having refractive indices lower than a lowest-index one of the waveguiding layers, incident radiation propagating (IN) through one of the upper and lower cladding layers (108, 110) toward the waveguide grating structure. The waveguide grating structure (102) is configured for peak reflection of the incident radiation at a peak reflection frequency. A cumulative thickness of the waveguiding layers (104) is less than one tenth of a free space wavelength of the incident radiation at the peak reflection frequency divided by an average refractive index of the waveguiding layers.
摘要翻译：描述了包括波导光栅结构（102）的光学器件（100）。根据一个实施例，提供了一种光学器件（100），其包括具有至少一个波导层（104）和至少一个亚波长周期光栅层（106）的水平波导光栅结构（102）。光学器件（100）还包括紧邻波导光栅结构的相应上表面和下表面（209,205）的上和下包层（108,110），其折射率低于波导层中的最低折射率通过上包层和下包覆层（108,110）中的一个朝向波导光栅结构传播的入射辐射（IN）。波导光栅结构（102）被配置为以峰值反射频率对入射辐射进行峰值反射。波导层（104）的累积厚度小于峰值反射频率处入射的辐射的自由空间波长除以波导层的平均折射率的十分之一。

5. 发明申请

WO2008013798A3 ALIGNMENT FOR CONTACT LITHOGRAPHY 审中-公开
标题翻译：联系方式对齐
公开(公告)号：WO2008013798A3
公开(公告)日：2008-03-20
申请号：PCT/US2007016621
申请日：2007-07-24
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , WANG SHIH-YUAN , WILLIAMS R STANLEY
发明人： WU WEI , WANG SHIH-YUAN , WILLIAMS R STANLEY
IPC分类号： G03F7/20 , G03F9/00
CPC分类号： G03F7/7035 , B82Y10/00 , B82Y40/00 , G03F7/0002 , G03F9/7038 , G03F9/7042 , G03F9/7088 , G03F9/7096
摘要： A contact lithography system includes a patterning tool (110) having a pattern for transfer to a substrate (130); and at least one alignment device (140) coupled to the patterning tool (110). The alignment device (140) is configured to measure alignment between the patterning tool (110) and a substrate (130) for receiving the pattern of the patterning tool (110). A contact lithograpny method includes aligning a patterning tool (110) having a pattern for transfer with a substrate (130) for receiving the pattern of the patterning tool (110) using at least one alignment device (140) coupled to the patterning tool (110).
摘要翻译：接触光刻系统包括具有用于转移到衬底（130）的图案的图案形成工具（110）; 以及耦合到图案形成工具（110）的至少一个对准装置（140）。对准装置（140）被配置为测量图案形成工具（110）和用于接收图案形成工具（110）的图案的基底（130）之间的对准。接触光刻方法包括使具有用于转移的图案的图案形成工具（110）与衬底（130）对准，用于使用联接到图案形成工具（110）的至少一个对准装置（140）接收图案形成工具（110）的图案）。

6. 发明申请

WO2007056603A3 MULTI-TIERED NETWORK FOR GATHERING DETECTED CONDITION INFORMATION 审中-公开
标题翻译：用于收集检测到的条件信息的多层网络
公开(公告)号：WO2007056603A3
公开(公告)日：2007-07-05
申请号：PCT/US2006044021
申请日：2006-11-08
申请人： HEWLETT PACKARD DEVELOPMENT CO , BRATKOVSKI ALEXANDRE M , LI ZHIYONG , LYON GEOFF , KUEKES PHILIP J , WANG SHIH-YUAN , WILLIAMS R STANLEY
发明人： BRATKOVSKI ALEXANDRE M , LI ZHIYONG , LYON GEOFF , KUEKES PHILIP J , WANG SHIH-YUAN , WILLIAMS R STANLEY
IPC分类号： H04L29/08
CPC分类号： G06K7/0008 , H04L67/12
摘要： A multi-tiered network (100, 100') for gathering detected condition information includes a first tier (102) having first tier nodes (104) and a second tier (106) having a second tier node (108). The second tier node (108) is operable to receive detected condition information from at least one of the first tier nodes (104) in a substantially autonomous manner. In addition, the second tier node (108) is operable to at least one of store, process, and transmit the detected condition information. The network (100, 100') also includes a third tier (110) having a third tier node (112) configured to receive the detected condition information and to at least one of store and process the detected condition information.
摘要翻译：用于收集检测到的状况信息的多层网络（100,100'）包括具有第一层节点（104）的第一层（102）和具有第二层节点（108）的第二层（106）。第二层节点（108）可操作来以基本上自主的方式从第一层节点（104）中的至少一个接收检测到的状况信息。另外，第二层节点（108）可操作用于存储，处理和传输检测到的状况信息中的至少一个。网络（100,100'）还包括具有第三层节点（112）的第三层（110），第三层节点（112）被配置为接收检测到的状况信息并存储和处理检测到的状况信息中的至少一个。

7. 发明申请

WO2009023065A2 NANOWIRE PHOTODIODES AND METHODS OF MAKING NANOWIRE PHOTODIODES 审中-公开
标题翻译：纳米级光电二极管及制备纳米级光电二极管的方法
公开(公告)号：WO2009023065A2
公开(公告)日：2009-02-19
申请号：PCT/US2008007931
申请日：2008-06-25
申请人： HEWLETT PACKARD DEVELOPMENT CO , WANG SHIH-YUAN , TAN MICHAEL , BRATKOVSKI ALEXANDRE , WILLIAMS R STANLEY , KOBAYASHI NOBUHIKO
发明人： WANG SHIH-YUAN , TAN MICHAEL , BRATKOVSKI ALEXANDRE , WILLIAMS R STANLEY , KOBAYASHI NOBUHIKO
CPC分类号： G02B6/4202 , B82Y20/00 , G02B6/305 , G02B6/4236 , H01L31/03529 , Y02E10/50 , Y10S977/765
摘要： Nanowire-based photodiodes (100, 200, 300, 400) are disclosed. The photodiodes include a first optical waveguide (102, 202, 302, 402) having a tapered first end (106, 206, 306, 406), a second optical waveguide (104, 204, 304, 404) having a tapered second end (110, 210, 310, 410), and at least one nanowire (114, 214, 314, 414) comprising at least one semiconductor material connecting the first and second ends (108, 112, 208, 212, 308, 312, 408, 412) in a bridging configuration. Methods of making the photodiodes are also disclosed.
摘要翻译：公开了基于纳米线的光电二极管（100,200,300,400）。光电二极管包括具有锥形第一端（106,206,306,406）的第一光波导（102,202,302,402），具有锥形第二端（106,206,306,406）的第二光波导（104,204,304,404）和至少一个纳米线（114,214,314,414），所述至少一个纳米线（114,214,314,414）包括连接所述第一端和所述第二端（108,112,208,212,308,312,408,412）的至少一种半导体材料， 412）以桥接配置。还公开了制造光电二极管的方法。

8. 发明申请

WO2006115968A3 ACTIVE INTERCONNECTS AND CONTROL POINTS IN INTEGRATED CIRCUITS 审中-公开
标题翻译：集成电路中的主动互连和控制点
公开(公告)号：WO2006115968A3
公开(公告)日：2007-08-16
申请号：PCT/US2006014856
申请日：2006-04-19
申请人： HEWLETT PACKARD DEVELOPMENT CO , WILLIAMS R STANLEY , KUEKES PHILLIP J , PERNER FREDERICK A , SNIDER GREGORY S , STEWART DUNCAN
发明人： WILLIAMS R STANLEY , KUEKES PHILLIP J , PERNER FREDERICK A , SNIDER GREGORY S , STEWART DUNCAN
IPC分类号： H01L21/66
CPC分类号： H05K7/1092 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： In various embodiments of the present invention, tunable resistors (1102) are introduced at the interconnect layer of the integrated circuits (102) in order to provide a means for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when certain internal components, such as transistors, do not have specified electronics characteristics due to manufacturing defects, adjustment of the variable resistances of the tunable resistors (1102) included in the interconnect layer of integrated circuits according to embodiments of the present invention can be used to adjust internal voltage and/or levels in order to ameliorate the defective components. In other cases, the tunable resistors may be used as switches to configure integrated circuit components, including individual transistors and logic gates as well as larger, hierarchically structured functional modules and domains. In some cases, components and modules may be turned off, while, in other cases, components and modules may be turned on.
摘要翻译：在本发明的各种实施例中，可调谐电阻器（1102）被引入集成电路（102）的互连层，以便提供用于调整集成电路内的内部电压和/或电流水平以修复有缺陷的部件或配置后续制造的集成电路。例如，当某些内部组件（例如晶体管）由于制造缺陷而没有指定的电子特性时，根据本发明的实施例调整包括在集成电路的互连层中的可调电阻器（1102）的可变电阻可以用于调整内部电压和/或电平，以改善有缺陷的部件。在其他情况下，可调谐电阻器可以用作开关以配置集成电路部件，包括单独的晶体管和逻辑门以及更大的分层结构的功能模块和域。在某些情况下，可能会关闭组件和模块，而在其他情况下，可能会打开组件和模块。

9. 发明申请

WO2007058909A3 METHOD OF CONTROLLING NANOWIRE GROWTH AND DEVICE WITH CONTROLLED-GROWTH NANOWIRE 审中-公开
标题翻译：控制生长纳米线的纳米线生长和器件的控制方法
公开(公告)号：WO2007058909A3
公开(公告)日：2007-07-26
申请号：PCT/US2006043688
申请日：2006-11-08
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , KAMINS THEODORE I , SHARMA SHASHANK , WILLIAMS R STANLEY
发明人： WU WEI , KAMINS THEODORE I , SHARMA SHASHANK , WILLIAMS R STANLEY
IPC分类号： H01L21/283 , H01L21/768 , H01L23/52
CPC分类号： H01L21/76879 , H01L21/28525 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： Nanowire (260, 360) growth in situ on a planar surface, which is one of a crystalline surface having any crystal orientation, a polycrystalline surface and a non-crystalline surface, is controlled by guiding (160) catalyzed growth from the planar surface in a nano-throughhole (224, 324) of a patterned layer (220, 320) formed on the planar surface, such that the nanowire (260, 360) grows in situ perpendicular to the planar surface. An electronic device (200, 300) includes first and second regions of electronic circuitry (280, 370, 380) vertically spaced by the patterned layer (220, 320). The nano-throughhole (224, 324) of the patterned layer (220, 320) extends perpendicularly between the regions. The first region (324, 376) has the planar surface. The device (200, 300) further includes a nanowire (260, 360) extending perpendicular from a catalyst location on the planar surface of the first region (374, 376) in the nano-throughhole (224, 324). The nanowire (260, 360) forms a component of a nano-scale circuit that connects the regions.
摘要翻译：在具有任何晶体取向的晶体表面，多晶表面和非晶体表面之一的平面表面上原位生长的纳米线（260,360）通过引导（160）来自平面表面的催化生长来控制形成在所述平坦表面上的图案化层（220,320）的纳米通孔（224,324），使得所述纳米线（260,360）垂直于所述平坦表面原位生长。电子设备（200,300）包括由图案化层（220,320）垂直间隔开的电子电路（280,370,380）的第一和第二区域。图案化层（220,320）的纳米通孔（224,324）在区域之间垂直延伸。第一区域（324,376）具有平坦表面。装置（200,300）还包括从纳米通孔（224,324）中的第一区域（374,376）的平坦表面上的催化剂位置垂直延伸的纳米线（260,360）。纳米线（260,360）形成连接区域的纳米级电路的组件。

10. 发明申请

WO2007053764A2 CROSSBAR-ARRAY DESIGNS AND WIRE ADDRESSING METHODS THAT TOLERATE MISALIGNMENT OF ELECTRICAL COMPONENTS AT WIRE OVERLAP POINTS 审中-公开
标题翻译：跨导线阵列设计和导线寻址方法，可以阻止电线重叠处电气元件的错位
公开(公告)号：WO2007053764A2
公开(公告)日：2007-05-10
申请号：PCT/US2006042923
申请日：2006-11-01
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , KUEKES PHILIP J , WILLIAMS R STANLEY
发明人： WU WEI , KUEKES PHILIP J , WILLIAMS R STANLEY
IPC分类号： G11C8/10
CPC分类号： G11C13/02 , B82Y10/00 , G11C8/10 , G11C11/54 , G11C13/0023 , G11C2213/77 , G11C2213/81 , H01L27/10 , H01L27/285 , Y10S977/762 , Y10S977/932
摘要： Various embodiments of the present invention are directed to crossbar array designs that interfaces wires to address wires, despite misalignments between electrical components and wires. In one embodiment, a nanoscale device may be composed of a first layer of two or more wires (1501-1511) and a second layer of two or more address wires (1512-1523) that overlays the first layer. The nanoscale device may also include an intermediate layer (704-804) positioned between the first layer and the second layer. Two or more redundant electrical component patterns (1400) may be fabricated within the intermediate layer so that one or more of the electrical component patterns is aligned with the first and second layers.
摘要翻译：尽管电气部件和电线之间未对准，本发明的各种实施例针对交叉开关阵列设计，其将导线连接到地址导线。在一个实施例中，纳米级器件可以由覆盖第一层的两个或更多个导线（1501-1511）的第一层和两个或更多个地址导线（1512-1523）的第二层组成。纳米级装置还可以包括位于第一层和第二层之间的中间层（704-804）。可以在中间层内制造两个或更多冗余电部件图案（1400），使得一个或多个电部件图案与第一和第二层对齐。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式