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1. 发明申请

WO2011148427A1 MOS-DRIVEN SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING MOS-DRIVEN SEMICONDUCTOR DEVICE 审中-公开
标题翻译： MOS驱动半导体器件及制造MOS驱动半导体器件的方法
公开(公告)号：WO2011148427A1
公开(公告)日：2011-12-01
申请号：PCT/JP2010/003579
申请日：2010-05-27
申请人： FUJI ELECTRIC CO., LTD. , SIN, Kin-On , NG, Chun-Wai , SUMIDA, Hitoshi , TOYODA, Yoshiaki , OHI, Akihiko , TANAKA, Hiroyuki , NISHIMURA, Takeyoshi
发明人： SIN, Kin-On , NG, Chun-Wai , SUMIDA, Hitoshi , TOYODA, Yoshiaki , OHI, Akihiko , TANAKA, Hiroyuki , NISHIMURA, Takeyoshi
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66734 , H01L21/26586 , H01L29/0865 , H01L29/0869 , H01L29/4236 , H01L29/7813
摘要： A mask used to form an n + source layer (11) is formed by a nitride film on the surface of a substrate before a trench (7) is formed. At this time, a sufficient width of the n + source layer (11) on the surface of the substrate is secured. Thereby, stable contact between the n + source layer (11) and a source electrode (15) is obtained. A CVD oxide film (12) that is an interlayer insulating film having a thickness of 0.1 micrometer or more and 0.3 micrometer or less is formed on doped poly-silicon to be used as a gate electrode (10a) embedded in the trench (7), and non-doped poly-silicon (13) that is not oxidized is formed on the CVD oxide film (12). Thereby, generation of void in the CVD oxide film (12) is suppressed and, by not oxidizing the non-doped poly-silicon (13), a semiconductor apparatus is easily manufactured.
摘要翻译：在形成沟槽（7）之前，用于形成n +源极层（11）的掩模由衬底的表面上的氮化物膜形成。此时，确保衬底表面上的n +源层（11）的足够的宽度。由此，得到n +源极层（11）与源电极（15）之间的稳定的接触。在作为嵌入沟槽（7）中的栅电极（10a）的掺杂多晶硅上形成作为0.1微米以上且0.3微米以下的厚度的层间绝缘膜的CVD氧化膜（12），并且在CVD氧化膜（12）上形成未被氧化的未掺杂多晶硅（13）。由此，抑制CVD氧化膜（12）中的空隙的产生，并且通过不氧化非掺杂多晶硅（13），容易制造半导体装置。

2. 发明申请

WO2013179333A1 ISOLATOR AND ISOLATOR MANUFACTURING METHOD 审中-公开
标题翻译：隔离器和隔离器制造方法
公开(公告)号：WO2013179333A1
公开(公告)日：2013-12-05
申请号：PCT/JP2012/003512
申请日：2012-05-29
申请人： FUJI ELECTRIC CO., LTD. , SIN, Johnny Kin On , PENG, Lulu , WU, Rongxiang , SUMIDA, Hitoshi , TOYODA, Yoshiaki , AKAHANE, Masashi
发明人： SIN, Johnny Kin On , PENG, Lulu , WU, Rongxiang , SUMIDA, Hitoshi , TOYODA, Yoshiaki , AKAHANE, Masashi
IPC分类号： H01L21/822 , H01L27/04
CPC分类号： H01P1/36 , H01F2019/085 , H01L21/76879 , H01L23/481 , H01L23/5227 , H01L23/645 , H01L24/16 , H01L25/0652 , H01L25/0657 , H01L28/10 , H01L2224/13022 , H01L2224/16238 , H01L2224/73257 , H01L2225/06513 , H01L2225/06531 , H01L2225/06541 , H01L2924/00014 , H01L2924/12043 , H01L2924/13091 , H01L2224/13099 , H01L2924/00
摘要： An isolator (10) is configured by a reception circuit, a transmission circuit (12), and a transformer (13). The transmission circuit (12) is disposed in an anterior surface of a semiconductor substrate (20). The transformer (13) is disposed in a posterior surface of the semiconductor substrate (20) and transmits in an electrically isolated state to the reception circuit, a signal input from the transmission circuit (12). The transformer (13) is configured by a primary coil (31-1) and a secondary coil (32-1). The primary coil (31-1) is configured by a metal film embedded in an oxide film (21-3) inside a coil trench (31-2). The secondary coil (32-1) is disposed inside an insulating film (22) covering the primary coil (31-1) so as to oppose the primary coil (31-1) and is insulated from the primary coil (31-1) by the insulating film (22). According to the isolator (10) configured as such, size reductions can be facilitated and electrical characteristics improved, enabling high voltage tolerance to be realized.
摘要翻译：隔离器（10）由接收电路，发送电路（12）和变压器（13）构成。传输电路（12）设置在半导体衬底（20）的前表面。变压器（13）设置在半导体衬底（20）的后表面，并且以电隔离状态向接收电路发送从发送电路（12）输入的信号。变压器（13）由初级线圈（31-1）和次级线圈（32-1）构成。初级线圈（31-1）由嵌入在线圈沟槽（31-2）内的氧化膜（21-3）中的金属膜构成。次级线圈（32-1）设置在覆盖初级线圈（31-1）的绝缘膜（22）内，以与初级线圈（31-1）相对并与初级线圈（31-1）绝缘，通过绝缘膜（22）。根据这样配置的隔离器（10），可以促进尺寸减小并且改善电特性，从而实现高电压公差。

3. 发明申请

WO2017006363A1 ISOLATOR AND ISOLATOR MANUFACTURING METHOD 审中-公开
标题翻译：隔离器和隔离器制造方法
公开(公告)号：WO2017006363A1
公开(公告)日：2017-01-12
申请号：PCT/JP2015/003375
申请日：2015-07-03
申请人： FUJI ELECTRIC CO., LTD.
发明人： SIN, Johnny Kin On , PENG, Lulu , WU, Rongxiang , SUMIDA, Hitoshi , TOYODA, Yoshiaki , AKAHANE, Masashi
IPC分类号： H01L21/822 , H01L27/04
CPC分类号： H01L23/645 , H01F19/04 , H01F27/2804 , H01F2019/085 , H01L21/762 , H01L25/0655 , H01L25/0657 , H01L27/0694 , H01L28/10 , H01L2224/48091 , H01L2224/48137 , H01L2225/06513 , H01L2225/06541 , H01L2924/00014
摘要： An isolator (10) is configured by a transmission circuit (12), a transformer, and a reception circuit (11). A first coil (21) of the transformer is disposed on a back surface of a first semiconductor substrate (20); a transmission circuit (12) and a second coil (22) of the transformer are disposed on a front surface. The first coil (21) is embedded within a coil trench (32), is led out through an embedded via-metal-film (39) to a substrate front surface, and is electrically connected to the transmission circuit (12). The second coil (22) is disposed on an insulating layer (35) of the substrate front surface. The reception circuit (11) is disposed on a front surface of a second semiconductor substrate (40). The second coil (22) and the reception circuit (11) are electrically connected to each other by connecting first and third electrode pads (23, 43) disposed respectively on the front surfaces of the first and second semiconductor substrates (20, 40) through wires (51). As a result, the number of processes of the package assembly process can be simplified.
摘要翻译：隔离器（10）由发送电路（12），变压器和接收电路（11）构成。变压器的第一线圈（21）设置在第一半导体衬底（20）的背面上; 变压器的传输电路（12）和第二线圈（22）设置在前表面上。第一线圈（21）嵌入在线圈沟槽（32）内，通过嵌入的通孔金属膜（39）引出到基板前表面，并且电连接到传输电路（12）。第二线圈（22）设置在基板前表面的绝缘层（35）上。接收电路（11）设置在第二半导体衬底（40）的前表面上。通过连接分别设置在第一和第二半导体衬底（20,40）的前表面上的第一和第三电极焊盘（23,43），第二线圈（22）和接收电路（11）彼此电连接，电线（51）。结果，可以简化包装组装过程的处理次数。

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