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    • 3. 发明申请
    • FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICE
    • 包装设备上完全成型外围包装
    • WO2017087427A1
    • 2017-05-26
    • PCT/US2016/062112
    • 2016-11-15
    • DECA TECHNOLOGIES INC.
    • SCANLAN, Christopher, M.ROGERS, William, BoydBISHOP, Craig
    • H01L21/768H01L21/50
    • H01L23/5389H01L21/561H01L21/768H01L23/3128H01L23/49811H01L2224/16225H01L2224/97
    • A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.
    • 制造半导体器件的方法可以包括提供具有半导体管芯安装部位的临时载体,以及在半导体管芯安装部位的外围中的临时载体上形成导电互连。 半导体管芯可以安装在半导体管芯安装地点。 导电互连和半导体管芯可以用模塑化合物封装。 导电互连的第一端可以暴露。 临时载体可被移除以暴露与导电互连的第一端相对的导电互连的第二端。 导电互连可以被蚀刻以使导电互连的第二端相对于模制化合物凹陷。 导电互连可以包括第一部分,第二部分和设置在第一部分和第二部分之间的蚀刻停止层。