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1. 发明申请

WO2012170160A1 METAL OXIDE TFT WITH IMPROVED SOURCE/DRAIN CONTACTS 审中-公开
标题翻译：具有改进源/漏联系的金属氧化物薄膜
公开(公告)号：WO2012170160A1
公开(公告)日：2012-12-13
申请号：PCT/US2012/038075
申请日：2012-05-16
申请人： CBRITE INC. , SHIEH, Chan-long , YU, Gang , FOONG, Fatt
发明人： SHIEH, Chan-long , YU, Gang , FOONG, Fatt
IPC分类号： H01L21/36 , H01L21/44 , H01L21/465
CPC分类号： H01L29/7869 , H01L21/428 , H01L29/45 , H01L29/66969 , H01L29/78606
摘要： A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.
摘要翻译：在金属氧化物半导体薄膜晶体管中形成欧姆源极/漏极接触的方法包括：提供栅极，栅极电介质，具有带隙的高载流子浓度金属氧化物半导体有源层和间隔开的薄/弱金属氧化物半导体有源层薄膜晶体管配置。间隔开的源极/漏极金属触点限定有源层中的沟道区。在沟道区域附近提供氧化环境，并且在氧化环境中加热栅极和沟道区域以降低沟道区域中的载流子浓度。或者或另外每个源极/漏极触点包括位于金属氧化物半导体有源层上的非常薄的低功函数金属层，并且高功函数金属的阻挡层位于低功函数金属上。

2. 发明申请

WO2012057903A1 METAL OXIDE TFT WITH IMPROVED STABILITY 审中-公开
标题翻译：金属氧化物膜具有改进的稳定性
公开(公告)号：WO2012057903A1
公开(公告)日：2012-05-03
申请号：PCT/US2011/047768
申请日：2011-08-15
申请人： CBRITE INC. , SHIEH, Chan-long , FOONG, Fatt , YU, Gang
发明人： SHIEH, Chan-long , FOONG, Fatt , YU, Gang
IPC分类号： H01L29/788
CPC分类号： H01L29/7869 , H01L29/78696
摘要： A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.
摘要翻译：一种金属氧化物半导体器件，包括金属氧化物的有源层，栅极电介质层和低陷阱密度材料层。低陷阱密度材料层夹在金属氧化物的有源层和栅极电介质层之间。低陷阱密度材料层的主表面平行并与金属氧化物的有源层的主表面接触，以形成与金属氧化物的有源层的低陷阱密度界面。可以可选地将第二层低陷阱密度材料放置成与金属氧化物的有源层的相对的主表面接触，使得与金属氧化物的活性层的两个表面形成低陷阱密度界面。

3. 发明申请

WO2008057560A2 METAL-INSULATOR-METAL (MIM) DEVICES AND THEIR METHODS OF FABRICATION 审中-公开
标题翻译：金属 - 绝缘体 - 金属（MIM）器件及其制造方法
公开(公告)号：WO2008057560A2
公开(公告)日：2008-05-15
申请号：PCT/US2007/023441
申请日：2007-11-06
申请人： CBRITE INC. , GONG, Xiong , YANG, Kaixia , YU, Gang , NILSSON, Boo, Jorgen, Lars , SHIEH, Chan-Long , LEE, Hsing-chung , FOONG, Fatt
发明人： GONG, Xiong , YANG, Kaixia , YU, Gang , NILSSON, Boo, Jorgen, Lars , SHIEH, Chan-Long , LEE, Hsing-chung , FOONG, Fatt
CPC分类号： H01L29/861 , G02F1/1365 , G02F1/167 , H01L29/22 , H01L29/417 , H01L29/786 , H01L45/00 , H01L51/0035 , H01L51/0579 , H01L51/0587
摘要： Two-terminal switching devices of MIM type having at least one electrode formed by a liquid phase processing method are provided for use in active matrix backplane applications; more specifically, MIM devices with symmetric current-voltage characteristics are applied for LCD active matrix backplane applications, and MIM devices with asymmetric current-voltage characteristics are applied for active matrix backplane implementation for electrophoretic displays (EPD) and rotating element displays. In particular, the combination of the bottom metal, metal-oxide insulator and solution-processible top conducting layer enables high throughput, roll-to-roll process for flexible displays.
摘要翻译：提供MIM类型的具有至少一个由液相处理方法形成的电极的两端开关器件用于有源矩阵背板应用; 更具体地说，具有对称电流 - 电压特性的MIM器件被应用于LCD有源矩阵背板应用，并且具有不对称电流 - 电压特性的MIM器件被应用于电泳显示器（EPD）和旋转元件显示器的有源矩阵背板实现。特别是，底部金属，金属氧化物绝缘体和可溶液加工的顶部导电层的组合使得高产量，柔性显示器的卷对卷工艺成为可能。

4. 发明申请

WO2011056294A1 MASK LEVEL REDUCTION FOR MOFET 审中-公开
标题翻译：屏蔽层减少MOFET
公开(公告)号：WO2011056294A1
公开(公告)日：2011-05-12
申请号：PCT/US2010/048264
申请日：2010-09-09
申请人： CBRITE INC. , SHIEH, Chan-Long , FOONG, Fatt , YU, Gang
发明人： SHIEH, Chan-Long , FOONG, Fatt , YU, Gang
IPC分类号： H01L21/336 , H01L29/78
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L29/4908 , H01L29/66969 , H01L29/7869
摘要： A method of fabricating a thin film transistor for an active matrix display using reduced masking operations includes patterning a gate on a substrate. A gate dielectric is formed over the gate and a semiconducting metal oxide is deposited on the gate dielectric. A channel protection layer is patterned on the semiconducting metal oxide overlying the gate to define a channel area and to expose the remaining semiconducting metal oxide. A source/drain metal layer is deposited on the structure and etched through to the channel protection layer above the gate to separate the source/drain metal layer into source and drain terminals and the source/drain metal layer and the semiconducting metal oxide are etched through at the periphery to isolate the transistor. A nonconductive spacer is patterned on the transistor and portions of the surrounding source/drain metal layer.
摘要翻译：使用减少的掩模操作制造用于有源矩阵显示器的薄膜晶体管的方法包括在衬底上图形化栅极。在栅极上形成栅极电介质，并且在栅极电介质上沉积半导体金属氧化物。将通道保护层图案化在覆盖栅极的半导体金属氧化物上，以限定通道区域并露出剩余的半导体金属氧化物。源极/漏极金属层沉积在结构上并蚀刻到栅极上方的沟道保护层，以将源极/漏极金属层分离成源极和漏极端子，并且源/漏极金属层和半导体金属氧化物被蚀刻通过在外围隔离晶体管。在晶体管和周围源极/漏极金属层的部分上构图非导电间隔物。

5. 发明申请

WO2013019910A1 SELF-ALIGNED METAL OXIDE TFT WITH REDUCED NUMBER OF MASKS 审中-公开
标题翻译：自对准金属氧化物膜，具有减少数量的掩模
公开(公告)号：WO2013019910A1
公开(公告)日：2013-02-07
申请号：PCT/US2012/049238
申请日：2012-08-02
申请人： CBRITE INC. , SHIEH, Chan-Long , YU, Gang , FOONG, Fatt
发明人： SHIEH, Chan-Long , YU, Gang , FOONG, Fatt
IPC分类号： H01L29/10
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565
摘要： A method of fabricating MO TFTs on transparent substrates by positioning opaque gate metal on the front surface of the substrate defining a gate area, depositing gate dielectric material on the front surface of the substrate, overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material on the gate dielectric material. Depositing etch stop material on the semiconductor material. Positioning photoresist on the etch stop material, the etch stop material and the photoresist being selectively removable, and the photoresist defining an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the rear surface of the substrate using the gate metal as a mask and removing exposed portions so as to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material on the etch stop layer and on the semiconductor material to form source and drain areas on opposed sides of the channel area.
摘要翻译：一种在透明基板上制造MO TFT的方法，该方法是通过在形成栅极区域的衬底的前表面上定位不透明栅极金属，在衬底的前表面上沉积栅介电材料，覆盖栅极金属和周围区域，并沉积金属氧化物半导体材料。在半导体材料上沉积蚀刻停止材料。将光致抗蚀剂定位在蚀刻停止材料上，蚀刻停止材料和光致抗蚀剂可选择性地移除，并且光刻胶在半导体材料中限定隔离区域。去除蚀刻停止件的未覆盖部分。使用栅极金属作为掩模从基板的后表面露出光致抗蚀剂，并除去暴露部分，以使除蚀刻停止材料未被覆盖，除了覆盖并与栅极金属对准的部分之外。蚀刻半导体材料的未覆盖部分以隔离TFT。使用光致抗蚀剂，选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分并限定半导体材料中的沟道区域。在蚀刻停止层和半导体材料上沉积和图案化导电材料以在沟道区域的相对侧上形成源极和漏极区域。

6. 发明申请

WO2011022144A1 AMOLED WITH CASCADED OLED STRUCTURES 审中-公开
标题翻译：嵌入式OLED结构
公开(公告)号：WO2011022144A1
公开(公告)日：2011-02-24
申请号：PCT/US2010/042385
申请日：2010-07-19
申请人： CBRITE INC. , SHIEH, Chan-long , YU, Gang
发明人： SHIEH, Chan-long , YU, Gang
IPC分类号： H01L51/50
CPC分类号： H01L27/3244 , H01L27/3204 , H01L27/3246
摘要： An active matrix organic light emitting display includes a plurality of pixels with each pixel including at least one organic light emitting diode circuit. Each diode circuit producing a predetermined amount of light Im in response to power W applied to the circuit and including n organic light emitting diodes cascaded in series so as to increase voltage dropped across the cascaded diodes by the factor of n, where n is an integer greater than one. Each diode of the n organic light emitting diodes produces approximately 1/n of the predetermined amount of light Im so as to reduce current flowing in the diodes by 1/n. The organic light emitting diode circuit of each pixel includes a thin film transistor current driver with the cascaded diodes connected in the source/drain circuit so the current driver provides the current flowing in the diodes.
摘要翻译：有源矩阵有机发光显示器包括多个像素，每个像素包括至少一个有机发光二极管电路。每个二极管电路响应于施加到电路的功率W产生预定量的光Im，并且包括串联级联的n个有机发光二极管，以便增加跨越级联二极管的电压以n为因子，其中n是整数大于一。 n个有机发光二极管的每个二极管产生大约1 / n个预定量的光Im，以便将在二极管中流动的电流减少1 / n。每个像素的有机发光二极管电路包括薄膜晶体管电流驱动器，其中级联二极管连接在源极/漏极电路中，因此电流驱动器提供流过二极管的电流。

7. 发明申请

WO2012097383A1 IMPROVED ACTIVE MATRIX FOR DISPLAYS AND METHOD OF FABRICATION 审中-公开
标题翻译：改进用于显示的活动矩阵和制造方法
公开(公告)号：WO2012097383A1
公开(公告)日：2012-07-19
申请号：PCT/US2012/023388
申请日：2012-01-31
申请人： CBRITE INC. , SHIEH, Chan-Long , YU, Gang
发明人： SHIEH, Chan-Long , YU, Gang
IPC分类号： G09G3/20
CPC分类号： G09G3/3266 , G09G2300/0408 , G09G2300/0426 , G09G2300/0439 , G09G2300/0842 , G09G2310/0218 , G09G2310/0267
摘要： An active matrix incorporated in a color display device includes an array of pixels arranged in n rows and m columns, each pixel having x elements including at least a red, a green, and a blue element. A plurality of m data lines, a different one of the plurality of m data lines being coupled one each to each column of pixels and to each element in each pixel in the column of pixels. A plurality of xn scan lines is provided, the xn scan lines being divided into n groups of x scan lines each. A different group of three xn scan lines is coupled to each row of the n rows of pixels and each of the different x scan lines in each group is coupled to a different one of the x elements.
摘要翻译：结合在彩色显示装置中的有源矩阵包括排列成n行m列的像素阵列，每个像素具有至少包括红色，绿色和蓝色元素的x个元素。多条m条数据线，多条m条数据线中的一条不同的一条线连接到每一列的像素，并与像素列的每个像素中的每一个元素相连。提供多个xn个扫描线，xn条扫描线分为n组x条扫描线。三个xn扫描线的不同组耦合到n行像素的每行，并且每组中的每个不同的x扫描线耦合到x个元素中的不同的x元素。

8. 发明申请

WO2008057553A2 TWO-TERMINAL SWITCHING DEVICES AND THEIR METHODS OF FABRICATION 审中-公开
标题翻译：双端开关器件及其制造方法
公开(公告)号：WO2008057553A2
公开(公告)日：2008-05-15
申请号：PCT/US2007/023427
申请日：2007-11-06
申请人： CBRITE INC. , YU, Gang , SHIEH, Chan-Long , LEE, Hsing-Chung
发明人： YU, Gang , SHIEH, Chan-Long , LEE, Hsing-Chung
CPC分类号： H01L29/861 , G02F1/1365 , G02F1/167 , H01L29/22 , H01L29/417 , H01L29/786 , H01L45/00 , H01L51/0035 , H01L51/0579 , H01L51/0587
摘要： Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
摘要翻译：提供了具有高开/关电流比和高击穿电压的双端开关器件。这些器件可以用作有源矩阵显示器的驱动电路中的开关，例如在电泳，旋转元件和液晶显示器中。开关装置包括两个电极以及位于电极之间的一层宽带半导体材料。根据一个实例，阴极包含具有低功函数的金属，阳极包含具有p +或p ++类型导电性的有机材料，并且宽带半导体包含金属氧化物。阴极和阳极材料之间的功函数差优选为至少约0.6eV。可以实现在约15V的电压范围内至少10,000的通/断电流比。如果需要，可以在具有低熔点的柔性聚合物基材上形成该装置。

9. 发明申请

WO2012115745A1 DRIVING METHOD FOR IMPROVING STABILITY IN MOTFTS 审中-公开
标题翻译：用于改善电动机稳定性的驱动方法
公开(公告)号：WO2012115745A1
公开(公告)日：2012-08-30
申请号：PCT/US2012/022867
申请日：2012-01-27
申请人： CBRITE INC. , SHIEH, Chan-long , YU, Gang
发明人： SHIEH, Chan-long , YU, Gang
IPC分类号： H01L29/10
CPC分类号： G09G3/3225 , G09G2310/063 , G09G2320/0204
摘要： A method of driving a display device includes providing an array of pixels including rows and columns of pixels, each pixel including a switching/driving transistor circuit and at least one light emitting device. Each row of pixels has a scan line and each column of pixels has a data line. The method further includes defining a frame period during which each pixel in the array of pixels is addressed and dividing the frame period into a write subframe, a display subframe, and a rest subframe. A scan pulse is supplied to each scan line, a data signal to each data line and the light emitting devices are disabled during the write subframe. The light emitting devices are enabled during the display subframe and the switching/driving transistor circuits are disabled. A rest pulse is supplied to all scan lines and the light emitting devices are disabled during the rest subframe.
摘要翻译：一种驱动显示装置的方法包括提供包括行和列的像素的像素阵列，每个像素包括开关/驱动晶体管电路和至少一个发光器件。每行像素具有扫描线，并且每列像素具有数据线。该方法还包括定义帧期间，在该帧周期期间，像素阵列中的每个像素被寻址并且将帧周期划分为写子帧，显示子帧和剩余子帧。向每条扫描线提供扫描脉冲，在写入子帧期间，对每个数据线的数据信号和发光器件禁用。发光器件在显示子帧期间被使能，并且开关/驱动晶体管电路被禁止。向所有扫描线提供静止脉冲，并且在其余子帧期间禁用发光装置。

10. 发明申请

WO2010028269A2 STABLE AMORPHOUS METAL OXIDE SEMICONDUCTOR 审中-公开
标题翻译：稳定的非晶态金属氧化物半导体
公开(公告)号：WO2010028269A2
公开(公告)日：2010-03-11
申请号：PCT/US2009/056079
申请日：2009-09-04
申请人： CBRITE INC. , SHIEH, Chan-long , YU, Gang
发明人： SHIEH, Chan-long , YU, Gang
IPC分类号： H01L29/24 , H01L21/20
CPC分类号： H01L29/04 , H01L21/00 , H01L21/02554 , H01L21/02565 , H01L21/02592 , H01L21/16 , H01L21/28556 , H01L27/1214 , H01L27/1225 , H01L29/24 , H01L29/7869 , H01L29/78693 , H01L51/5012
摘要： A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.
摘要翻译：薄膜半导体器件具有包括非晶半导体离子金属氧化物和非晶绝缘共价金属氧化物的混合物的半导体层。一对端子被定位成与半导体层连通并且限定导电通道，并且栅极端子被定位成与导电通道连通并进一步定位成控制通道的导通。本发明还包括在沉积过程中沉积包括使用氮气的混合物的方法，以控制所得半导体层中的载流子浓度。

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