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1. 发明申请

WO2004073039A3 ULTRA BROADBAND INDUCTOR ASSEMBLY 审中-公开
标题翻译：超大宽带电感器总成
公开(公告)号：WO2004073039A3
公开(公告)日：2006-09-08
申请号：PCT/US2004003997
申请日：2004-02-11
申请人： OPLINK COMMUNICATIONS INC , NGUYEN DZUNG A , GUNDAVAJHALA ANAND
发明人： NGUYEN DZUNG A , GUNDAVAJHALA ANAND
IPC分类号： H01P5/00 , H01F17/02 , H01F27/06 , H01F27/29
CPC分类号： H01F17/02 , H01F27/06 , H01F27/292 , H01F2005/006
摘要： Systems and apparatuses for providing a broadband inductor assembly (100). One broadband inductor assembly (100) includes a conical coil inductor (47) having a broad end (47a) with radius rl and a narrow end (47b) with radius r2, the conical coil inductor also having a broad end terminal (45) and a narrow end terminal (49). The broadband inductor assembly includes a base (50). The broadband inductor assembly includes at least one support (61, 62), such that the conical coil inductor is supported by the at least one support above the base at a distance greater than or equal to rl from the base. An ultra broadband bias tee is provided that includes a broadband inductor assembly and a DC block.
摘要翻译：用于提供宽带电感器组件（100）的系统和设备。一个宽带电感器组件（100）包括具有半径为r 1的宽端（47a）和半径为r 2的窄端（47b）的锥形线圈电感器（47），所述锥形线圈电感器还具有宽端子（45）和窄端子（49）。宽带电感器组件包括基座（50）。宽带电感器组件包括至少一个支撑件（61,62），使得圆锥形线圈电感器由基座上方的至少一个支撑件以与基座大于或等于rl的距离支撑。提供了一种超宽带偏压三通，其包括宽带电感器组件和DC块。

2. 发明申请

WO2004073101A2 SUSPENDED AND TRUNCATED COPLANAR WAVEGUIDE 审中-公开
标题翻译：悬挂和截断的共振波导
公开(公告)号：WO2004073101A2
公开(公告)日：2004-08-26
申请号：PCT/US2004004146
申请日：2004-02-11
申请人： OPLINK COMMUNICATIONS INC , NGUYEN DZUNG A , GUNDAVAJHALA ANAND
发明人： NGUYEN DZUNG A , GUNDAVAJHALA ANAND
IPC分类号： H01P3/00 , H01P
CPC分类号： H01P3/003
摘要： A suspended and truncated co-planar waveguide is described. The waveguide has a substrate with a substantially flat top surface and two lateral faces. A signal conductor and two ground conductors are placed on the top surface forming a ground-signal-ground pattern along a common plane. The waveguide has respective electrical side-wall boundaries on each of the two lateral faces of the substrate.
摘要翻译：描述了悬挂和截头的共面波导。波导具有基本平坦的顶表面和两个侧面。信号导体和两个接地导体放置在顶表面上，沿公共平面形成接地信号 - 接地图案。波导在基板的两个侧面中的每一个上具有相应的电侧壁边界。

3. 发明申请

WO2004073039A2 ULTRA BROADBAND INDUCTOR ASSEMBLY 审中-公开
标题翻译：超大宽带电感器总成
公开(公告)号：WO2004073039A2
公开(公告)日：2004-08-26
申请号：PCT/US2004/003997
申请日：2004-02-11
申请人： OPLINK COMMUNICATIONS, INC. , NGUYEN, Dzung, A. , GUNDAVAJHALA, Anand
发明人： NGUYEN, Dzung, A. , GUNDAVAJHALA, Anand
IPC分类号： H01L
CPC分类号： H01F17/02 , H01F27/06 , H01F27/292 , H01F2005/006
摘要： Systems and apparatuses for providing a broadband inductor assembly. One broadband inductor assembly includes a conical coil inductor having a broad end with radius rl and a narrow end with radius r2, the conical coil inductor also having a broad end terminal and a narrow end terminal. The broadband inductor assembly includes a base. The broadband inductor assembly includes at least one support, such that the conical coil inductor is supported by the at least one support above the base at a distance greater than or equal to rl from the base. An ultra broadband bias tee is provided that includes a broadband inductor assembly and a DC block.
摘要翻译：用于提供宽带电感器组件的系统和设备。一个宽带电感器组件包括具有半径为r 1的宽端和半径为r 2的窄端的锥形线圈电感器，该锥形线圈电感器还具有宽端子端子和窄端子端子。宽带电感器组件包括基座。宽带电感器组件包括至少一个支撑件，使得圆锥形线圈电感器由基座上方的至少一个支撑件以与基座大于或等于rl的距离支撑。提供了一种超宽带偏压三通，其包括宽带电感器组件和DC块。

4. 发明申请

WO2004017516A1 MATCHED TRANSMISSION LINE CONNECTOR 审中-公开
标题翻译：匹配传输线连接器
公开(公告)号：WO2004017516A1
公开(公告)日：2004-02-26
申请号：PCT/US2003/009499
申请日：2003-03-31
申请人： REDCLOVER NETWORKS, INC. , NGUYEN, Dzung, A. , GUNDAVAJHALA, Anand , BUSH, William, Dale , MATHEW, Thomas , LIU, Tiangong , WANG, Tongqing , MATHEW, Moni, G.
发明人： NGUYEN, Dzung, A. , GUNDAVAJHALA, Anand , BUSH, William, Dale , MATHEW, Thomas , LIU, Tiangong , WANG, Tongqing , MATHEW, Moni, G.
IPC分类号： H03H7/38
CPC分类号： H01P5/085
摘要： According to the invention there is provided an interconnect for bi-directionally coupling together a coaxial transmission line and a coplanar waveguide. The interconnect is adapted to provide a transition region between the coaxial transmission line and the coplanar waveguide, which induces a smooth transition from the electric field of the coaxial transmission line to the electric field of the coplanar waveguide as well as broadband impedance matching between the coaxial transmission line and coplanar waveguide.
摘要翻译：根据本发明，提供了用于将同轴传输线和共面波导双向耦合在一起的互连。互连适于在同轴传输线和共面波导之间提供过渡区域，其引起从同轴传输线的电场到共面波导的电场的平滑过渡以及同轴的传输线之间的宽带阻抗匹配传输线和共面波导。

5. 发明申请

WO0061613A2 CHANNEL FORMING TOXINS AS ANTIVIRAL AGENTS 审中-公开
标题翻译：作为抗病毒剂的通道形成毒素
公开(公告)号：WO0061613A2
公开(公告)日：2000-10-19
申请号：PCT/US0009468
申请日：2000-04-10
申请人： UNIV JOHNS HOPKINS , UNIV VICTORIA , HILDRETH JAMES E K , NGUYEN DZUNG H B S , BUCKLEY JAMES THOMAS
发明人： HILDRETH JAMES E K , NGUYEN DZUNG H B S , BUCKLEY JAMES THOMAS
IPC分类号： A61K38/16 , A61K39/21 , C12N7/06 , C07K14/00
CPC分类号： C12N7/00 , A61K38/164 , A61K39/12 , A61K39/21 , A61K2039/55544 , A61K2039/6037 , C12N2740/16034 , C12N2740/16063
摘要： The infectivity of a population of enveloped viruses which comprise a glycosylphosphatidylinositol-anchored protein in their membrane can be reduced by employing certain toxins such as aerolysin, alpha toxin of Clostridium septicum, or enterolobin. Toxins which bind to glycosylphosphatidylinositol-anchored proteins inactivate such viruses. The toxins can be used to produce attenuated viral vaccines, to purge blood products, cells, or tissues of such viruses, and to detect viruses in samples.
摘要翻译：可以通过使用某些毒素如溶血素，败血症梭菌的α-毒素或肠球蛋白来减少包含糖基磷脂酰肌醇 - 锚定蛋白的包膜病毒群体的感染性。与糖基磷脂酰肌醇 - 锚定蛋白结合的毒素使这种病毒失活。毒素可用于产生减毒的病毒疫苗，以清除这些病毒的血液制品，细胞或组织，并检测样品中的病毒。

6. 发明申请

WO2011112354A3 SENSING OPERATIONS IN A MEMORY DEVICE 审中-公开
公开(公告)号：WO2011112354A3
公开(公告)日：2011-09-15
申请号：PCT/US2011/025799
申请日：2011-02-23
申请人： MICRON TECHNOLOGY, INC. , PABUSTAN, Jonathan , SARIN, Vishal , NGUYEN, Dzung
发明人： PABUSTAN, Jonathan , SARIN, Vishal , NGUYEN, Dzung
IPC分类号： G11C16/34 , G11C16/06 , G11C16/30
摘要： Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.

7. 发明申请

WO2004073038A2 ULTRA BROADBAND CAPACITOR ASSEMBLY 审中-公开
标题翻译：超级宽带电容器总成
公开(公告)号：WO2004073038A2
公开(公告)日：2004-08-26
申请号：PCT/US2004/003996
申请日：2004-02-11
申请人： OPLINK COMMUNICATIONS, INC. , NGUYEN, Dzung, A. , GUNDAVAJHALA, Anand
发明人： NGUYEN, Dzung, A. , GUNDAVAJHALA, Anand
IPC分类号： H01L
CPC分类号： H01G4/38 , H01P11/00 , H05K1/0306 , H05K1/167 , H05K1/181 , H05K2201/10515 , Y02P70/611
摘要： Systems and apparatuses for providing a broadband capacitor assembly. One broadband capacitor assembly includes a first capacitor operable to provide a first end of an operational band of frequencies within an operational band of a broadband capacitor assembly. The broadband capacitor assembly also includes a second capacitor coupled in parallel to the first capacitor, the second capacitor operable to provide a second end of the operational band of frequencies within the operational band of the broadband capacitor assembly. A DC block can be provided including a broadband capacitor assembly.
摘要翻译：用于提供宽带电容器组件的系统和设备。一个宽带电容器组件包括可操作以提供宽带电容器组件的工作频带内的工作频带范围的第一端的第一电容器。宽带电容器组件还包括与第一电容器并联耦合的第二电容器，第二电容器可操作以提供宽带电容器组件的工作频带内的工作频带范围的第二端。可以提供包括宽带电容器组件的DC块。

8. 发明申请

WO2013147743A1 THREE DIMENSIONAL MEMORY CONTROL CIRCUITRY 审中-公开
标题翻译：三维存储器控制电路
公开(公告)号：WO2013147743A1
公开(公告)日：2013-10-03
申请号：PCT/US2012/030632
申请日：2012-03-26
申请人： INTEL CORPORATION , HELM, Mark , HOEI, Jung Sheng , NGUYEN, Dzung , YIP, Aaron
发明人： HELM, Mark , HOEI, Jung Sheng , NGUYEN, Dzung , YIP, Aaron
IPC分类号： G11C7/10 , G11C7/18 , G11C8/14
CPC分类号： G11C16/26 , G11C5/025 , G11C5/12 , G11C7/12 , G11C7/18 , G11C8/14 , G11C13/0002 , G11C13/0004 , G11C13/0023 , G11C16/24 , H01L27/0207 , H01L27/0688 , H01L27/1052 , H01L27/11526 , H01L27/11529 , H01L27/11556 , H01L27/11573 , H01L27/11582 , Y10T29/49155
摘要： An integrated circuit includes a memory array, a wordline circuit, divided into at least two subcircuits, to control the memory array, and a bitline circuit, divided into at least two subcircuits, to control the memory array. The wordline subcircuits and the bitline subcircuits at least partially overlap separate respective regions of the memory array.
摘要翻译：集成电路包括存储器阵列，字线电路，被划分为至少两个子电路以控制存储器阵列;以及位线电路，被划分为至少两个子电路以控制存储器阵列。字线子电路和位线子电路至少部分地与存储器阵列的相应区域重叠。

9. 发明申请

WO2011087901A2 ACCESS LINE DEPENDENT BIASING SCHEMES 审中-公开
标题翻译：访问线相关偏移计划
公开(公告)号：WO2011087901A2
公开(公告)日：2011-07-21
申请号：PCT/US2011/000046
申请日：2011-01-11
申请人： MICRON TECHNOLOGY, INC. , NGUYEN, Dzung, H.
发明人： NGUYEN, Dzung, H.
CPC分类号： G11C16/04 , G11C8/08 , G11C8/14 , G11C16/0483 , G11C16/08
摘要： The present disclosure includes methods, devices, and systems for access line biasing. One embodiment includes selecting, using a controller external to the memory device, a particular access line dependent biasing scheme and corresponding bias conditions for use in performing an access operation on an array of memory cells of the memory device, and performing the access operation using the selected particular access line dependent biasing scheme and corresponding bias conditions. In one or more embodiments, the selected particular access line dependent biasing scheme and corresponding bias conditions is selected by the controller external to the memory device based, at least partially, on a target access line of the array.
摘要翻译：本公开包括用于接入线偏置的方法，设备和系统。一个实施例包括：使用存储器设备外部的控制器选择特定的访问线路依赖偏置方案和相应的偏置条件，以用于对存储器件的存储器单元阵列执行访问操作，以及使用所选择的特定接入线相关偏置方案和相应的偏置条件。在一个或多个实施例中，所选择的特定访问线路依赖偏置方案和对应的偏置条件由至少部分地在阵列的目标访问线上的存储器设备外部的控制器选择。

10. 发明申请

WO2010059490A3 REPLACING DEFECTIVE MEMORY BLOCKS IN RESPONSE TO EXTERNAL ADDRESSES 审中-公开
公开(公告)号：WO2010059490A3
公开(公告)日：2010-05-27
申请号：PCT/US2009/064100
申请日：2009-11-12
申请人： MICRON TECHNOLOGY, INC. , SARIN, Vishal , NGUYEN, Dzung H. , RADKE, William H.
发明人： SARIN, Vishal , NGUYEN, Dzung H. , RADKE, William H.
IPC分类号： G06F12/06 , G06F12/14
摘要： Electronic systems and methods of operating memory devices are provided. In one such embodiment, a memory device (100) receives an external address that addresses a non-defective memory block (210 3 ) of a sequence of memory blocks (210) of the memory device (100) in place of a defective memory block (210 2 ) of the sequence of memory blocks (210) such that the non-defective memory block (210 3 ) replaces the defective memory block (210 2 ). The non-defective memory block (210 3 ) is a proximate non-defective memory block following the defective memory block (210 2 ) in the sequence of memory blocks (210) that is available to replace the defective memory block (210 2 ).

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