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1. 发明申请

WO2012082223A2 NON-VOLATILE STORAGE SYSTEM WITH SHARED BIT LINES CONNECTED TO SINGLE SELECTION DEVICE 审中-公开
标题翻译：具有连接到单个选择设备的共享位线的非易失存储系统
公开(公告)号：WO2012082223A2
公开(公告)日：2012-06-21
申请号：PCT/US2011/056146
申请日：2011-10-13
申请人： SANDISK TECHNOLOGIES, INC. , MOKHLESI, Nima , DUNGA, Mohan, V. , HIGASHITANI, Masaaki
发明人： MOKHLESI, Nima , DUNGA, Mohan, V. , HIGASHITANI, Masaaki
CPC分类号： H01L21/28273 , G11C16/0483 , H01L27/11519 , H01L27/11521
摘要： A non-volatile storage system is disclosed that includes pairs of NAND strings (or other groupings of memory cells) in the same block being connected to and sharing a common bit line. To operate the system, two selection lines are used so that the NAND strings (or other groupings of memory cells) sharing a bit line can be selected at the block level. Both selection lines are connected to a selection gate for each of the NAND strings (or other groupings of memory cells) sharing the bit line.
摘要翻译：公开了一种非易失性存储系统，其包括连接到共享位线的同一块中的NAND串（或存储器单元的其它组）对。为了操作该系统，使用两条选择线，使得可以在块级选择共享位线的NAND串（或存储器单元的其它分组）。两个选择线连接到共享位线的每个NAND串（或存储器单元的其它组）的选择门。

2. 发明申请

WO2010033409A1 DATA STATE-BASED TEMPERATURE COMPENSATION DURING SENSING IN NON-VOLATILE MEMORY 审中-公开
标题翻译：在非易失性存储器中感测期间基于数据状态的温度补偿
公开(公告)号：WO2010033409A1
公开(公告)日：2010-03-25
申请号：PCT/US2009/056405
申请日：2009-09-09
申请人： SANDISK CORPORATION , DUNGA, Mohan, V. , HIGASHITANI, Masaaki
发明人： DUNGA, Mohan, V. , HIGASHITANI, Masaaki
IPC分类号： G11C11/56 , G11C16/26
CPC分类号： G11C11/5642 , G11C7/04 , G11C16/26
摘要： Temperature effects in a non-volatile storage device are addressed by providing a data state-dependent, and optionally temperature dependent, sense current during verify and read operations. A different sense current (1) is provided for each data state (2), so that a common temperature coefficient (3) is realized for storage elements with different data states. The temperature coefficient for higher states can be reduced to that of lower states. During sensing, a sense time can be adjusted to achieve a desired sense current when a selected storage element is in a conductive state. A fixed voltage trip point may be maintained. During the sense time, a pre-charged capacitor discharges into a selected storage element such as via a bit line and NAND string, when the selected storage element is in a conductive state. The discharge level is translated to a current which is compared to a state-dependent, and optionally temperature dependent, reference current.
摘要翻译：通过在验证和读取操作期间提供数据状态相关的和可选的与温度相关的感测电流来解决非易失性存储设备中的温度效应。为每个数据状态（2）提供不同的感测电流（1），使得对于具有不同数据状态的存储元件实现共同的温度系数（3）。较高状态的温度系数可以降低到较低的状态。在感测期间，当所选择的存储元件处于导通状态时，可以调整感测时间以实现期望的感测电流。可以保持固定的电压跳变点。在感测时间期间，当所选存储元件处于导通状态时，预充电电容器通过位线和NAND串放电到选定的存储元件中。将放电电平转换为与状态相关的，并且可选地与温度相关的参考电流进行比较的电流。

3. 发明申请

WO2013074516A1 IMPROVED READ OPERATION FOR NON-VOLATILE STORAGE SYSTEM WITH NAND STRINGS SHARING BIT LINE AND WORD LINES 审中-公开
标题翻译：改进非易失存储系统的读取操作，具有共享字线和字线的NAND条
公开(公告)号：WO2013074516A1
公开(公告)日：2013-05-23
申请号：PCT/US2012/064818
申请日：2012-11-13
申请人： SANDISK TECHNOLOGIES, INC. , MOKHLESI, Nima , DUNGA, Mohan, V. , MUI, Man
发明人： MOKHLESI, Nima , DUNGA, Mohan, V. , MUI, Man
IPC分类号： G11C11/56 , G11C16/04 , G11C16/26 , G11C16/34 , H01L27/115
CPC分类号： G11C16/26 , G11C11/5642 , G11C16/0483 , G11C16/24 , G11C16/3427 , H01L27/11524
摘要： A non-volatile storage system is disclosed that includes pairs of NAND strings (or other groupings of memory cells) in the same block being connected to and sharing a common bit line. To operate the system, two selection lines are used so that the NAND strings (or other groupings of memory cells) sharing a bit line can be selected at the block level. Both selection lines are connected to a selection gate for each of the NAND strings (or other groupings of memory cells) sharing the bit line. One set of embodiments avoid unwanted boosting during read operations by keeping the channels of the memory cells connected to word lines on the drain side of the selected word line biased at a fixed potential.
摘要翻译：公开了一种非易失性存储系统，其包括连接到共享位线的同一块中的NAND串（或存储器单元的其它组）对。为了操作该系统，使用两条选择线，使得可以在块级选择共享位线的NAND串（或存储器单元的其它分组）。两个选择线连接到共享位线的每个NAND串（或存储器单元的其它组）的选择门。一组实施例通过将存储器单元的通道与所选择的字线的漏极侧的字线连接以偏置固定电位来避免读取操作期间的不希望的升压。

4. 发明申请

WO2012082223A3 NON-VOLATILE STORAGE SYSTEM WITH SHARED BIT LINES CONNECTED TO SINGLE SELECTION DEVICE 审中-公开
标题翻译：具有连接到单个选择设备的共享位线的非易失存储系统
公开(公告)号：WO2012082223A3
公开(公告)日：2013-04-04
申请号：PCT/US2011056146
申请日：2011-10-13
申请人： SANDISK TECHNOLOGIES INC , MOKHLESI NIMA , DUNGA MOHAN V , HIGASHITANI MASAAKI
发明人： MOKHLESI NIMA , DUNGA MOHAN V , HIGASHITANI MASAAKI
IPC分类号： H01L21/28 , H01L27/115
CPC分类号： H01L21/28273 , G11C16/0483 , H01L27/11519 , H01L27/11521
摘要： A non-volatile storage system is disclosed that includes pairs of NAND strings (or other groupings of memory cells) in the same block being connected to and sharing a common bit line. To operate the system, two selection lines are used so that the NAND strings (or other groupings of memory cells) sharing a bit line can be selected at the block level. Both selection lines are connected to a selection gate for each of the NAND strings (or other groupings of memory cells) sharing the bit line.
摘要翻译：公开了一种非易失性存储系统，其包括连接到共享位线的同一块中的NAND串（或存储器单元的其它组）对。为了操作该系统，使用两条选择线，使得可以在块级选择共享位线的NAND串（或存储器单元的其它分组）。两个选择线连接到共享位线的每个NAND串（或存储器单元的其它组）的选择门。

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