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1. 发明申请

WO2008070466A3 SHARING RESOURCES IN A SYSTEM FOR TESTING SEMICONDUCTOR DEVICES 审中-公开
标题翻译：在测试半导体器件的系统中共享资源
公开(公告)号：WO2008070466A3
公开(公告)日：2008-11-06
申请号：PCT/US2007085483
申请日：2007-11-25
申请人： FORMFACTOR INC , CHRAFT MATTHEW E , ELDRIDGE BENJAMIN N , HENSON ROY J , SPORCK A NICHOLAS
发明人： CHRAFT MATTHEW E , ELDRIDGE BENJAMIN N , HENSON ROY J , SPORCK A NICHOLAS
IPC分类号： G01R31/02
CPC分类号： G01R31/31926 , G01R31/318511
摘要： Probes in a plurality of DUT probe groups can be connected in parallel to a single tester channel. In one aspect, digital potentiometers can be used to effectively switch the tester channel from a probe in one DUT probe group to a probe in another DUT probe group. In another aspect, switches in parallel with a resistor can accomplish such switching. In yet another aspect, a chip select terminal on each DUT can be used to effectively connect and disconnect internal DUT circuitry to the tester channel. Multiple DUT probe groups so connected can be used to create different patterns of DUT probe groups for testing different patterns of DUTs and thus facilitate sharing tester channels.
摘要翻译：多个DUT探针组中的探针可以并行连接到单个测试器通道。在一个方面，可以使用数字电位计来有效地将测试器通道从一个DUT探针组中的探针切换到另一个DUT探针组中的探针。另一方面，与电阻器并联的开关可以完成这种切换。在又一方面，每个DUT上的芯片选择端子可以用于有效连接和断开内部DUT电路与测试器通道的连接。如此连接的多个DUT探针组可用于创建不同模式的DUT探针组，以测试不同DUT的模式，从而便于共享测试器通道。

2. 发明申请

WO2007146583A3 METHOD OF DESIGNING AN APPLICATION SPECIFIC PROBE CARD TEST SYSTEM 审中-公开
标题翻译：设计应用特定探头卡测试系统的方法
公开(公告)号：WO2007146583A3
公开(公告)日：2009-02-26
申请号：PCT/US2007069810
申请日：2007-05-25
申请人： FORMFACTOR INC , MILLER CHARLES A , CHRAFT MATTHEW E , HENSON ROY J
发明人： MILLER CHARLES A , CHRAFT MATTHEW E , HENSON ROY J
IPC分类号： G01R31/02 , G01R1/073 , G01R1/36 , G01R31/28 , G01R31/319 , G01R35/00
CPC分类号： G01R31/31905 , G01R31/2889 , G01R31/31926 , G01R35/00
摘要： A method is provided for design and programming of a probe card with an on-board programmable controller in a wafer test system. Consideration of introduction of the programmable controller is included in a CAD wafer layout and probe card design process. The CAD design is further loaded into the programmable controller, such as an FPGA to program it: (1) to control direction of signals to particular ICs , even during the test process (2) to generate test vector signals to provide to the ICs , and (3) to receive test signals and process test results from the received signals. In some embodiments, burn-in only testing is provided to limit test system circuitry needed so that with a programmable controller on the probe card, text equipment external to the probe card can be eliminated or significantly reduced from conventional test equipment.
摘要翻译：提供了一种用于在晶片测试系统中设计和编程具有板上可编程控制器的探针卡的方法。引入可编程控制器的考虑因素包括在CAD晶圆布局和探针卡设计过程中。 CAD设计进一步加载到可编程控制器（例如FPGA）中以对其进行编程：（1）甚至在测试过程（2）期间控制信号到特定IC的方向，以产生测试向量信号以提供给IC，和（3）从接收信号接收测试信号和处理测试结果。在一些实施例中，仅提供老化测试以限制所需的测试系统电路，使得利用探针卡上的可编程控制器，可以从常规测试设备消除或显着减少探针卡外部的文本设备。

3. 发明申请

WO2007146583A2 METHOD OF DESIGNING AN APPLICATION SPECIFIC PROBE CARD TEST SYSTEM 审中-公开
标题翻译：设计应用特定探头卡测试系统的方法
公开(公告)号：WO2007146583A2
公开(公告)日：2007-12-21
申请号：PCT/US2007/069810
申请日：2007-05-25
申请人： FORMFACTOR, INC. , MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
发明人： MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
IPC分类号： G01R31/02
CPC分类号： G01R31/31905 , G01R31/2889 , G01R31/31926 , G01R35/00
摘要： A method is provided for design and programming of a probe card with an on-board programmable controller in a wafer test system. Consideration of introduction of the programmable controller is included in a CAD wafer layout and probe card design process. The CAD design is further loaded into the programmable controller, such as an FPGA to program it: (1) to control direction of signals to particular ICs , even during the test process (2) to generate test vector signals to provide to the ICs , and (3) to receive test signals and process test results from the received signals. In some embodiments, burn-in only testing is provided to limit test system circuitry needed so that with a programmable controller on the probe card, text equipment external to the probe card can be eliminated or significantly reduced from conventional test equipment.
摘要翻译：提供了一种用于在晶片测试系统中设计和编程具有板上可编程控制器的探针卡的方法。引入可编程控制器的考虑因素包括在CAD晶圆布局和探针卡设计过程中。 CAD设计进一步加载到可编程控制器（例如FPGA）中以对其进行编程：（1）甚至在测试过程（2）期间控制信号到特定IC的方向，以产生测试向量信号以提供给IC，和（3）从接收信号接收测试信号和处理测试结果。在一些实施例中，仅提供老化测试以限制所需的测试系统电路，使得利用探针卡上的可编程控制器，可以从常规测试设备消除或显着减少探针卡外部的文本设备。

4. 发明申请

WO2005103740A3 INTELLIGENT PROBE CARD ARCHITECTURE 审中-公开
标题翻译：智能探针卡建筑
公开(公告)号：WO2005103740A3
公开(公告)日：2006-06-29
申请号：PCT/US2005013850
申请日：2005-04-21
申请人： FORMFACTOR INC , MILLER CHARLES A , CHRAFT MATTHEW E , HENSON ROY J
发明人： MILLER CHARLES A , CHRAFT MATTHEW E , HENSON ROY J
IPC分类号： G01R31/02 , G01R1/073 , G01R1/36 , G01R29/00 , G01R31/26 , G01R31/28 , G01R31/319 , G01R35/00 , H01L21/66 , H01R11/18 , H01R13/00 , H01R13/24
CPC分类号： G01R31/31905 , G01R1/07385 , G01R1/36 , G01R31/2889 , G01R35/00
摘要： A probe card for a wafer test system is provided with a number of on board features enabling fan out of a test system controller channel to test multiple DUTs on a wafer, while limiting undesirable effects of fan out on test results. On board features of the probe card include one or more of the following: (a) DUT signal isolation provided by placing resistors in series with each DUT input to isolate failed DUTs; (b) DUT power isolation provided by switches, current limiters, or regulators in series with each DUT power pin to isolate the power supply from failed DUTs; (c) self test provided using an on board micro-controller or FPGA; (d) stacked daughter cards provided as part of the probe card to accommodate the additional on board test circuitry; and (e) use of a interface bus between a base PCB and daughter cards of the probe card, or the test system controller to minimize the number of interface wires between the base PCB and daughter cards or between the base PCB and the test system controller.
摘要翻译：用于晶片测试系统的探针卡具有多个板上特征，使扇出测试系统控制器通道以测试晶片上的多个DUT，同时限制扇出对测试结果的不期望的影响。探头卡的板载功能包括以下一个或多个功能：（a）通过将电阻器与每个DUT输入串联放置来隔离故障DUT提供的DUT信号隔离; （b）与每个DUT电源引脚串联的开关，限流器或稳压器提供的DUT电源隔离，以将电源与失效的DUT隔离; （c）使用板上微控制器或FPGA提供的自检; （d）作为探针卡的一部分提供的堆叠子卡，以适应额外的板上测试电路; 和（e）在基板PCB和探针卡的子卡之间使用接口总线或测试系统控制器以最小化基板PCB和子卡之间或基板和测试系统控制器之间的接口线的数量。

5. 发明申请

WO2005103740A2 INTELLIGENT PROBE CARD ARCHITECTURE 审中-公开
标题翻译：智能探头卡建筑
公开(公告)号：WO2005103740A2
公开(公告)日：2005-11-03
申请号：PCT/US2005/013850
申请日：2005-04-21
申请人： FORMFACTOR, INC. , MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
发明人： MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
IPC分类号： G01R31/02
CPC分类号： G01R31/31905 , G01R1/07385 , G01R1/36 , G01R31/2889 , G01R35/00
摘要： A probe card for a wafer test system is provided with a number of on board features enabling fan out of a test system controller channel to test multiple DUTs on a wafer, while limiting undesirable effects of fan out on test results. On board features of the probe card include one or more of the following: (a) DUT signal isolation provided by placing resistors in series with each DUT input to isolate failed DUTs; (b) DUT power isolation provided by switches, current limiters, or regulators in series with each DUT power pin to isolate the power supply from failed DUTs; (c) self test provided using an on board micro-controller or FPGA; (d) stacked daughter cards provided as part of the probe card to accommodate the additional on board test circuitry; and (e) use of a interface bus between a base PCB and daughter cards of the probe card, or the test system controller to minimize the number of interface wires between the base PCB and daughter cards or between the base PCB and the test system controller.
摘要翻译：用于晶片测试系统的探针卡具有许多机载功能，使得扇出测试系统控制器通道能够测试晶片上的多个DUT，同时限制扇出对测试结果的不期望的影响。探头卡的板上功能包括以下一个或多个功能：（a）通过将电阻与每个DUT输入串联放置来隔离故障的DUT，提供DUT信号隔离; （b）与每个DUT电源引脚串联的开关，限流器或稳压器提供的DUT电源隔离，以将电源与失效的DUT隔离; （c）使用板上微控制器或FPGA提供的自检; （d）作为探针卡的一部分提供的堆叠子卡，以容纳附加的板上测试电路; 以及（e）在基板PCB和探针卡的子卡之间使用接口总线或测试系统控制器以最小化基板PCB和子卡之间或者基板PCB与测试系统控制器之间的接口线的数量。

6. 发明申请

WO2008070466A2 SHARING RESOURCES IN A SYSTEM FOR TESTING SEMICONDUCTOR DEVICES 审中-公开
标题翻译：用于测试半导体器件的系统中的共享资源
公开(公告)号：WO2008070466A2
公开(公告)日：2008-06-12
申请号：PCT/US2007/085483
申请日：2007-11-25
申请人： FORMFACTOR, INC. , CHRAFT, Matthew, E. , ELDRIDGE, Benjamin, N. , HENSON, Roy, J. , SPORCK, A., Nicholas
发明人： CHRAFT, Matthew, E. , ELDRIDGE, Benjamin, N. , HENSON, Roy, J. , SPORCK, A., Nicholas
IPC分类号： G01R31/02
CPC分类号： G01R31/31926 , G01R31/318511
摘要： Probes in a plurality of DUT probe groups can be connected in parallel to a single tester channel. In one aspect, digital potentiometers can be used to effectively switch the tester channel from a probe in one DUT probe group to a probe in another DUT probe group. In another aspect, switches in parallel with a resistor can accomplish such switching. In yet another aspect, a chip select terminal on each DUT can be used to effectively connect and disconnect internal DUT circuitry to the tester channel. Multiple DUT probe groups so connected can be used to create different patterns of DUT probe groups for testing different patterns of DUTs and thus facilitate sharing tester channels.
摘要翻译：多个DUT探针组中的探针可以并联连接到单个测试仪通道。在一个方面，数字电位器可用于有效地将测试仪通道从一个DUT探针组中的探头切换到另一个DUT探针组中的探针。另一方面，与电阻并联的开关可以实现这种切换。在另一方面，每个DUT上的芯片选择端可用于有效地连接和断开内部DUT电路到测试器通道。如此连接的多个DUT探针组可用于创建不同的DUT探针组，以测试DUT的不同图案，从而便于共享测试仪通道。

7. 发明申请

WO2006104708A1 ACTIVE DIAGNOSTIC INTERFACE FOR WAFER PROBE APPLICATIONS 审中-公开
标题翻译：用于波浪探测应用的主动诊断界面
公开(公告)号：WO2006104708A1
公开(公告)日：2006-10-05
申请号：PCT/US2006/009574
申请日：2006-03-16
申请人： FORMFACTOR, INC. , HENSON, Roy, J. , CHRAFT, Matthew, E.
发明人： HENSON, Roy, J. , CHRAFT, Matthew, E.
IPC分类号： G01R31/26
CPC分类号： G01R31/2889 , G01R31/2831
摘要： A diagnostic interface on a wafer probe card is provided to enable monitoring of test signals provided between the test system controller and one or more DUTs on a wafer during wafer testing. To prevent distortion of test signals on the channel lines, in one embodiment buffers are provided on the probe card as part of the diagnostic interface connecting to the channels. In another embodiment, an interface adapter pod is provided that connects to the diagnostic interface on the probe card to process the test results and provide the results to a user interface such as a personal computer.
摘要翻译：提供晶圆探针卡上的诊断接口，以便在晶片测试期间能够监测测试系统控制器与晶片上的一个或多个DUT之间提供的测试信号。为了防止信道线路上的测试信号失真，在一个实施例中，作为连接到信道的诊断接口的一部分，缓冲器被提供在探针卡上。在另一个实施例中，提供了一个接口适配器盒，其连接到探针卡上的诊断接口以处理测试结果，并将结果提供给诸如个人计算机之类的用户界面。

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