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1. 发明申请

WO2007146583A2 METHOD OF DESIGNING AN APPLICATION SPECIFIC PROBE CARD TEST SYSTEM 审中-公开
标题翻译：设计应用特定探头卡测试系统的方法
公开(公告)号：WO2007146583A2
公开(公告)日：2007-12-21
申请号：PCT/US2007/069810
申请日：2007-05-25
申请人： FORMFACTOR, INC. , MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
发明人： MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
IPC分类号： G01R31/02
CPC分类号： G01R31/31905 , G01R31/2889 , G01R31/31926 , G01R35/00
摘要： A method is provided for design and programming of a probe card with an on-board programmable controller in a wafer test system. Consideration of introduction of the programmable controller is included in a CAD wafer layout and probe card design process. The CAD design is further loaded into the programmable controller, such as an FPGA to program it: (1) to control direction of signals to particular ICs , even during the test process (2) to generate test vector signals to provide to the ICs , and (3) to receive test signals and process test results from the received signals. In some embodiments, burn-in only testing is provided to limit test system circuitry needed so that with a programmable controller on the probe card, text equipment external to the probe card can be eliminated or significantly reduced from conventional test equipment.
摘要翻译：提供了一种用于在晶片测试系统中设计和编程具有板上可编程控制器的探针卡的方法。引入可编程控制器的考虑因素包括在CAD晶圆布局和探针卡设计过程中。 CAD设计进一步加载到可编程控制器（例如FPGA）中以对其进行编程：（1）甚至在测试过程（2）期间控制信号到特定IC的方向，以产生测试向量信号以提供给IC，和（3）从接收信号接收测试信号和处理测试结果。在一些实施例中，仅提供老化测试以限制所需的测试系统电路，使得利用探针卡上的可编程控制器，可以从常规测试设备消除或显着减少探针卡外部的文本设备。

2. 发明申请

WO2005103740A2 INTELLIGENT PROBE CARD ARCHITECTURE 审中-公开
标题翻译：智能探头卡建筑
公开(公告)号：WO2005103740A2
公开(公告)日：2005-11-03
申请号：PCT/US2005/013850
申请日：2005-04-21
申请人： FORMFACTOR, INC. , MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
发明人： MILLER, Charles, A. , CHRAFT, Matthew, E. , HENSON, Roy, J.
IPC分类号： G01R31/02
CPC分类号： G01R31/31905 , G01R1/07385 , G01R1/36 , G01R31/2889 , G01R35/00
摘要： A probe card for a wafer test system is provided with a number of on board features enabling fan out of a test system controller channel to test multiple DUTs on a wafer, while limiting undesirable effects of fan out on test results. On board features of the probe card include one or more of the following: (a) DUT signal isolation provided by placing resistors in series with each DUT input to isolate failed DUTs; (b) DUT power isolation provided by switches, current limiters, or regulators in series with each DUT power pin to isolate the power supply from failed DUTs; (c) self test provided using an on board micro-controller or FPGA; (d) stacked daughter cards provided as part of the probe card to accommodate the additional on board test circuitry; and (e) use of a interface bus between a base PCB and daughter cards of the probe card, or the test system controller to minimize the number of interface wires between the base PCB and daughter cards or between the base PCB and the test system controller.
摘要翻译：用于晶片测试系统的探针卡具有许多机载功能，使得扇出测试系统控制器通道能够测试晶片上的多个DUT，同时限制扇出对测试结果的不期望的影响。探头卡的板上功能包括以下一个或多个功能：（a）通过将电阻与每个DUT输入串联放置来隔离故障的DUT，提供DUT信号隔离; （b）与每个DUT电源引脚串联的开关，限流器或稳压器提供的DUT电源隔离，以将电源与失效的DUT隔离; （c）使用板上微控制器或FPGA提供的自检; （d）作为探针卡的一部分提供的堆叠子卡，以容纳附加的板上测试电路; 以及（e）在基板PCB和探针卡的子卡之间使用接口总线或测试系统控制器以最小化基板PCB和子卡之间或者基板PCB与测试系统控制器之间的接口线的数量。

3. 发明申请

WO2006083856A1 PROGRAMMABLE DEVICES TO ROUTE SIGNALS ON PROBE CARDS 审中-公开
标题翻译：可编程设备用于探测卡上的信号
公开(公告)号：WO2006083856A1
公开(公告)日：2006-08-10
申请号：PCT/US2006/003386
申请日：2006-01-30
申请人： FORMFACTOR, INC. , GRANICHER, Dane, C. , HENSON, Roy, J. , MILLER, Charles, A.
发明人： GRANICHER, Dane, C. , HENSON, Roy, J. , MILLER, Charles, A.
CPC分类号： G01R31/31926 , G01R1/07385 , G01R31/2889
摘要： A probe card of a wafer test system includes one or more programmable Ics , such as FPGAS (150), to provide routing from individual test signal channels to one of multiple probes (16). The programmable ICs can be placed on a base PCB (30) of the probe card, or on a daughtercard (100) attached to the probe card. With programmability, the PCB (30) can be used to switch limited test system channels away from unused probes (16). Programmability further enables a single probe card to more effectively test devices having the same pad array, but having different pin-outs for different device options. Reprogrammability also allows test engineers to re-program as they are debugging a test program. Because the programmable IC (150) typically includes buffers that introduce an unknown delay, in one embodiment measurement of the delay is accomplished by first programming the programmable IC (150) to provide a loop back path to the test system so that buffer delay can be measured, and then reprogramming the programmable IC (150) now with a known delay to connect to a device being tested.
摘要翻译：晶片测试系统的探针卡包括一个或多个可编程IC，例如FPGAS（150），以提供从各个测试信号通道到多个探针（16）之一的路由。可编程IC可以放置在探针卡的基板（30）上，或者放置在附接到探针卡的子卡（100）上。具有可编程性，PCB（30）可用于将有限的测试系统通道从未使用的探头（16）切换出去。可编程性进一步使单个探针卡更有效地测试具有相同焊盘阵列但具有不同引脚的不同器件选项的器件。可重编程序还允许测试工程师在调试测试程序时进行重新编程。因为可编程IC（150）通常包括引入未知延迟的缓冲器，在一个实施例中，通过首先对可编程IC（150）编程以提供到测试系统的回送路径来实现延迟的测量，使得缓冲器延迟可以测量，然后以可知的延迟对可编程IC（150）进行重新编程，以连接到正被测试的设备。

4. 发明申请

WO2006073737A2 A METHOD AND APPARATUS FOR INCREASING THE OPERATING FREQUENCY OF A SYSTEM FOR TESTING ELECTRONIC DEVICES 审中-公开
标题翻译：一种用于增加测试电子设备的系统的操作频率的方法和装置
公开(公告)号：WO2006073737A2
公开(公告)日：2006-07-13
申请号：PCT/US2005/045583
申请日：2005-12-15
申请人： FORMFACTOR, INC. , MILLER, Charles, A.
发明人： MILLER, Charles, A.
IPC分类号： G01R31/02
CPC分类号： G01R31/2889 , G01R31/31905
摘要： A test system includes a communications channel that terminals in a probe, which contacts an input terminal of an electronic device to be tested. A resistor is connected between the communications channel near the probe and ground. The resistor reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The channel may be terminated in a branch having multiple paths in which each path is terminated with a probe for contacting a terminal on electronic devices to be tested. Isolation resistors are included in the branches to prevent a fault at one input terminal from propagating to the other input terminals. A shunt resistor is provided in each branch, which reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The shunt resistor may also be sized to reduce, minimize, or eliminate signal reflections back up the channel.
摘要翻译：测试系统包括通信信道，探测器中的终端接触要测试的电子设备的输入端。在探头和地之间的通信通道之间连接一个电阻。该电阻降低了端子的输入电阻，从而减小了输入端子的上升和下降时间。信道可以在具有多个路径的分支中终止，其中每个路径用用于接触待测试的电子设备上的终端的探针终止。隔离电阻包括在分支中，以防止一个输入端子的故障传播到其他输入端子。在每个分支中设置有分流电阻器，这降低了端子的输入电阻，从而减小了输入端子的上升和下降时间。分流电阻器的尺寸也可以减小，最小化或消除信道反射信号的反射。

5. 发明申请

WO2006068938A3 BI-DIRECTIONAL BUFFER FOR INTERFACING TEST SYSTEM CHANNEL 审中-公开
公开(公告)号：WO2006068938A3
公开(公告)日：2006-06-29
申请号：PCT/US2005/045610
申请日：2005-12-15
申请人： FORMFACTOR, INC. , MILLER, Charles, A.
发明人： MILLER, Charles, A.
IPC分类号： G01R31/02
摘要： An emitter follower or source follower transistor is provided in the channel of a wafer test system between a DUT and a test system controller to enable a low power DUT to drive a test system channel. A bypass resistor is included between the base and emitter of the emitter follower transistor to enable bi-directional signals to be provided between the DUT channel and test system controller, as well as to enable parametric tests to be performed. The emitter follower transistor and bypass resistor can be provided on the probe card, with a pull down termination circuit included in the test system controller. The test system controller can provide compensation for the base to emitter voltage drop of the emitter follower transistor.

6. 发明申请

WO2002091616A2 ELECTROMAGNETICALLY COUPLED INTERCONNECT SYSTEM ARCHITECTURE 审中-公开
标题翻译：电磁耦合互联系统架构
公开(公告)号：WO2002091616A2
公开(公告)日：2002-11-14
申请号：PCT/US2001/047114
申请日：2001-11-13
申请人： FORMFACTOR, INC. , MILLER, Charles, A.
发明人： MILLER, Charles, A.
IPC分类号： H04B5/00
CPC分类号： H04B5/0012 , H01L23/48 , H01L2924/0002 , H01L2924/3011 , H04B5/0075 , H04B5/02 , H05K1/141 , H05K1/181 , H05K3/366 , H05K2201/10098 , Y02P70/611 , H01L2924/00
摘要： An electromagnetic interconnect method and apparatus effects contactless, proximity connections between elements in an electronics system. Data to be communicated between elements in an electronic system are modulated into a carrier signal and transmitted contactlessly by electromagnetic coupling. The electromagnetic coupling may be directly between elements in the system or through an intermediary transmission medium.
摘要翻译：电磁互连方法和装置实现电子系统中元件之间的非接触式接近连接。要在电子系统中的元件之间传送的数据被调制成载波信号并通过电磁耦合非接触地传输。电磁耦合可以直接在系统中的元件之间或通过中间传输介质。

7. 发明申请

WO2007146582A2 AC COUPLED PARAMETRIC TEST PROBE 审中-公开
标题翻译：交流耦合参数测试探头
公开(公告)号：WO2007146582A2
公开(公告)日：2007-12-21
申请号：PCT/US2007/069806
申请日：2007-05-25
申请人： FORMFACTOR, INC. , MILLER, Charles, A. , SPORCK, A., Nicholas , ELDRIDGE, Benjamin, N.
发明人： MILLER, Charles, A. , SPORCK, A., Nicholas , ELDRIDGE, Benjamin, N.
IPC分类号： G01R31/02
CPC分类号： G01R1/06711 , G01R1/06727 , G01R1/07 , G01R31/3025
摘要： A probe for contacting and testing ICs on a semiconductor device includes a dielectric insulating material tip. The dielectric tip does not contaminate the surface being probed unlike metal probe tips. A contact scrub is further not required with signals being capacitively or inductively coupled from the probe tip to the IC. Testing can be performed during early fabrication steps of the wafer without the need for applying a metalization layer to the wafer to form bond pads. Testing can be performed by inductively coupling an AC signal to the probe tip, with coupling enhanced by including a magnetic material in the dielectric probe tip. Using an AC test signal enables testing of ICs without requiring separate power and ground connections.
摘要翻译：用于在半导体器件上接触和测试IC的探针包括介电绝缘材料尖端。与金属探针尖端不同，电介质尖端不会污染被探测的表面。进一步不需要接触擦洗，信号从探头尖端到IC电容或电感耦合。可以在晶片的早期制造步骤期间进行测试，而不需要将金属化层施加到晶片以形成接合焊盘。可以通过将AC信号电感耦合到探针尖端来进行测试，通过在介电探针尖端中包括磁性材料来增强耦合。使用AC测试信号可以测试IC，而不需要单独的电源和接地连接。

8. 发明申请

WO2007146581A3 METHOD OF EXPANDING TESTER DRIVE AND MEASUREMENT CAPABILITY 审中-公开
公开(公告)号：WO2007146581A3
公开(公告)日：2007-12-21
申请号：PCT/US2007/069798
申请日：2007-05-25
申请人： FORMFACTOR, INC. , MILLER, Charles, A.
发明人： MILLER, Charles, A.
IPC分类号： G01R31/02 , G01R31/26 , G01R31/28 , G01R31/00
摘要： A probe card assembly can comprise an interface, which can be configured to receive from a tester test signals for testing an electronic device. The probe card assembly can further comprise probes for contacting the electronic device and electronic driver circuits for driving the test signals to ones of the probes.

9. 发明申请

WO2005106763A2 METHOD AND APPARATUS FOR CALIBRATING COMMUNICATIONS CHANNELS 审中-公开
标题翻译：用于校准通信信道的方法和装置
公开(公告)号：WO2005106763A2
公开(公告)日：2005-11-10
申请号：PCT/US2005/012649
申请日：2005-04-15
申请人： FORMFACTOR, INC. , MILLER, Charles, A.
发明人： MILLER, Charles, A.
IPC分类号： G06F19/00
CPC分类号： H04B17/0085 , H04B17/21 , H04B17/26 , H04B17/364
摘要： A periodic signal is driven onto a transmission line, and the frequency of the periodic signal is varied from an initial frequency that corresponds to a quarter wave or half wave of an estimated length of the transmission line. A null or a peak in the envelope of the voltage or current wave induced on the transmission line by the periodic signal is detected at or near the end of the transmission line onto which the signal is driven. The frequency of the periodic signal that caused the null or peak may be used to calculated the length of the transmission line or a propagation delay through the transmission line. A plurality of transmission lines may be deskewed by determining the propagation delay through each transmission line and adjusting a variable delay in each transmission line so that the transmissions lines approximately equal overall propagation delays.
摘要翻译：周期信号被驱动到传输线上，并且周期信号的频率从对应于传输线估计长度的四分之一波或半波的初始频率变化。在信号被驱动的传输线的末端处或附近，检测在周期信号在传输线上感应的电压或电流波的包络中的零点或峰值。导致零或峰值的周期信号的频率可用于计算传输线的长度或通过传输线的传播延迟。多个传输线可以通过确定通过每个传输线的传播延迟并调整每个传输线中的可变延迟使得传输线近似等于总体传播延迟而进行偏斜校正。

10. 发明申请

WO2005076885A2 CONTACTLESS INTERFACING OF TEST SIGNALS WITH A DEVICE UNDER TEST 审中-公开
标题翻译：与测试设备的测试信号的接触式接口
公开(公告)号：WO2005076885A2
公开(公告)日：2005-08-25
申请号：PCT/US2005/003360
申请日：2005-02-02
申请人： FORMFACTOR, INC. , MILLER, Charles, A.
发明人： MILLER, Charles, A.
IPC分类号： G01R31/311
CPC分类号： G01R1/0491 , G01R1/07 , G01R1/07378 , G01R31/3025
摘要： An interface device receives test data from a tester. A signal representing the test data is transmitted to a device under test through electromagnetically coupled structures on the interface device and the device under test. The device under test processes the test data and generates response data. A signal representing the response data is transmitted to the interface device through electromagnetically coupled structures on the device under test and the interface device.
摘要翻译：接口设备从测试器接收测试数据。表示测试数据的信号通过接口设备和被测设备上的电磁耦合结构发送到被测设备。被测设备处理测试数据并产生响应数据。表示响应数据的信号通过被测设备和接口设备上的电磁耦合结构传送到接口设备。

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