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21. 发明申请

WO2002049076A3 SEMICONDUCTOR DEVICE LAYOUT 审中-公开
公开(公告)号：WO2002049076A3
公开(公告)日：2002-06-20
申请号：PCT/EP2001/014209
申请日：2001-11-29
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V.
发明人： HARDY, David, F., D. , PEAKE, Steven, T.
IPC分类号： H01L27/02
摘要： A method of manufacturing a semiconductor device having an n by m array of cells (32) is described, where n and m are positive integers with n at least two. Individual cells (32) have perimeter regions (34) surrounding the cells, the perimeter regions between adjacent cells being common to the adjacent cells. The method includes the steps of determining the required width or widths of the perimeter regions and calculating the optimal aspect ratio of each cell to substantially minimize the total area of an n by m array of cells subject to the determined width or widths of the perimeter regions. Then, a semiconductor device having an n by m array of active having an aspect ratio substantially in accordance with the calculated ratio is made. The invention has application to a number of types of structure, including a double diode structure.

22. 发明申请

WO2006025034A3 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：WO2006025034A3
公开(公告)日：2006-03-09
申请号：PCT/IB2005/052872
申请日：2005-09-01
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , PEAKE, Steven, T.
发明人： PEAKE, Steven, T.
IPC分类号： H01L29/739 , H01L29/78
摘要： A semiconductor device comprises a unipolar semiconductor component and a PiN diode. The semiconductor body of the device comprises a component body of the component having at least two main electrodes (21, 24) in contact therewith, and a diode body of the PiN diode, the diode body having two electrodes (23, 24) in contact therewith. One of the diode electrodes (24) is connected to a main electrode of the component body, and a bias potential is applicable to the other diode electrode (23) such that it is forward biased when the component is in its on state. The PiN diode serves to improve the on-state characteristics of the semiconductor component. The semiconductor component may be a MOS device, or a Schottky diode, for example.

23. 发明申请

WO2005088724A1 TRENCH FIELD EFFECT TRANSISTOR AND METHOD OF MAKING IT 审中-公开
标题翻译： TRENCH场效应晶体管及其制作方法
公开(公告)号：WO2005088724A1
公开(公告)日：2005-09-22
申请号：PCT/IB2005/050654
申请日：2005-02-23
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , PEAKE, Steven, T.
发明人： PEAKE, Steven, T.
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0865 , H01L29/42356 , H01L29/66734
摘要： A trench-FET has source regions (14) arranged above insulated gates (10) in trenches (6). Body region (20) of opposite conductivity type is arranged between the trenches (6) and body contact region (18) is arranged above the body region (20). Source contact metallisation (22) contacts the source (14) and body contact region (20). In this way a small cell pitch can be achieved.
摘要翻译：沟槽FET具有布置在沟槽（6）中的绝缘栅极（10）之上的源极区域（14）。沟槽（6）之间布置了相反导电类型的主体区域（20），并且身体接触区域（18）布置在身体区域（20）的上方。源极接触金属化（22）接触源极（14）和主体接触区域（20）。以这种方式，可以实现小电池间距。

24. 发明申请

WO2005045938A2 INSULATED GATE FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：绝缘栅场效应晶体管
公开(公告)号：WO2005045938A2
公开(公告)日：2005-05-19
申请号：PCT/IB2004/052346
申请日：2004-11-09
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , PEAKE, Steven, T. , RUTTER, Philip
发明人： PEAKE, Steven, T. , RUTTER, Philip
IPC分类号： H01L29/78
CPC分类号： H01L29/7825 , H01L29/0696 , H01L29/407 , H01L29/7824
摘要： The transistor has an insulating or semi-insulating semiconductor substrate (2), a source region (8), a body region (6), a drift region (4) and a drain region (10). Insulated field plate trenches (20) containing field plates (24) extend longitudinally and on either side of the drift region (4). In embodiments trenches (20) and drift regions (4) alternate laterally. The field plates (24) are connected to the source alone.
摘要翻译：晶体管具有绝缘或半绝缘半导体衬底（2），源区（8），体区（6），漂移区（4）和漏区（10）。包含场板（24）的绝缘场板沟槽（20）在漂移区域（4）的纵向和两侧延伸。在实施例中，沟槽（20）和漂移区域（4）横向交替。场板（24）单独连接到源。

25. 发明申请

WO2004032243A1 POWER SEMICONDUCTOR DEVICES 审中-公开
标题翻译：功率半导体器件
公开(公告)号：WO2004032243A1
公开(公告)日：2004-04-15
申请号：PCT/IB2003/004138
申请日：2003-09-15
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , KELLY, Brendan, P. , PEAKE, Steven, T. , GROVER, Raymond, J.
发明人： KELLY, Brendan, P. , PEAKE, Steven, T. , GROVER, Raymond, J.
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/402 , H01L29/407 , H01L29/7397 , H01L29/7831 , H02M3/1588 , H03K17/063 , Y02B70/1466
摘要： A vertical insulated gate field effect power transistor (3) has a plurality of parallel transistor cells (TC3) with a peripheral gate structure (G31, G2) at the boundary between each two transistor cells (TC3). The gate structure (G31, G32) comprises first (G31) and second (G32) gates isolated from each other so as to be independently operable. The first gate (G31) is a trench-gate (21, 22), and the second gate (G32) has at least an insulated planar gate portion (13, 14). Simultaneous operation of the first (G31) and second (G32) gates forms a conduction channel (23c, 23b) between source (16) and drain (12) regions of the device (3). The device (3) has on-state resistance approaching that of a trench-gate device, better switching performance than a DMOS device, and a better safe operating area than a trench-gate device. The device (3) may be a high side power transistor is series with a low side power transistor (6) in a circuit arrangement (50) (Figure 14) for supplying a regulated output voltage. The device (3) may also be a switch in a circuit arrangement (60) (Figure 15) for supplying current to a load (L). These circuit arrangements (50, 60) include a terminal (Vcc, V F ) for applying a supplied fixed potential to an electrode (G311) for the first gates (G31) and a gate driver circuit (573, 673) for applying modulating potential to an electrode (G321) for the second gates (G32).
摘要翻译：垂直绝缘栅场效应功率晶体管（3）在每两个晶体管单元（TC3）之间的边界处具有多个具有外围栅极结构（G31，G2）的并联晶体管单元（TC3）。栅极结构（G31，G32）包括彼此隔离的第一（G31）和第二（G32）栅极，以便可独立地操作。第一栅极（G31）是沟槽栅极（21,22），第二栅极（G32）至少具有绝缘平面栅极部分（13,14）。第一（G31）和第二（G32）栅极的同时操作在器件（3）的源极（16）和漏极（12）区域之间形成导电沟道（23c，23b）。器件（3）具有接近沟槽栅极器件的导通电阻，比DMOS器件更好的开关性能，以及比沟槽栅极器件更好的安全工作区域。器件（3）可以是用于提供稳定输出电压的电路装置（50）（图14）中的与低侧功率晶体管（6）串联的高侧功率晶体管。装置（3）还可以是用于向负载（L）供电的电路装置（60）（图15）中的开关。这些电路装置（50,60）包括用于将提供的固定电位施加到用于第一栅极（G31）的电极（G311）的端子（Vcc，V> F <）和用于施加的栅极驱动电路（573,673）对第二栅极（G32）的电极（G321）进行调制电位。

26. 发明申请

WO2003088364A3 TRENCH-GATE SEMICONDUCTOR DEVICES 审中-公开
公开(公告)号：WO2003088364A3
公开(公告)日：2003-10-23
申请号：PCT/IB2003/001465
申请日：2003-04-10
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , PEAKE, Steven, T.
发明人： PEAKE, Steven, T.
IPC分类号： H01L29/78
摘要： A trench-gate vertical power transistor in which the trench-gates (11) are parallel stripes which extend across the active area (100). Source regions (13) and ruggedness regions (15) extend to a source contact surface as alternating stripe areas having a width perpendicular to and fully between each two adjacent parallel stripe trench-gates (11). The ruggedness regions (15) are more heavily doped than the source regions and this enables an increased length of the source regions with a consequent reduction in specific resistance of the transistor. For example, the mesa width (13,15) and the trench-gate (11) width may both be about 0.4μm, the ruggedness region (15) length may be about 1μm and the source region (13) length may be about 20μm. The doping concentration of the p type ruggedness regions (15) may be approximately 10 times greater than the doping concentration of the n type regions(13), for example about 10 21 cm -3 and about 10 20 cm -3 respectively.

27. 发明申请

WO2003067665A3 CELLULAR MOSFET DEVICES AND THEIR MANUFACTURE 审中-公开
公开(公告)号：WO2003067665A3
公开(公告)日：2003-08-14
申请号：PCT/IB2003/000219
申请日：2003-01-23
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , PEAKE, Steven, T. , ROGERS, Christopher, M.
发明人： PEAKE, Steven, T. , ROGERS, Christopher, M.
IPC分类号： H01L29/78
摘要： A cellular MOSFET device has a cellular area (CA) comprising active MOSFET cells, and one or more Schottky diode areas (SA) accommodated within a deep end region (15) at a lateral boundary of this cellular area (CA). This deep end region (150) is laterally divided so as to accommodate the diode area (SA) therein. A diode portion (14d) of the first conductivity type of the drain region (14) extends upwardly through the laterally-divided deep end region (150) that is of the second conductivity type. The Schottky barrier (100) formed with this diode portion (14d) terminates laterally in the laterally-divided portions (150f) of the deep end region (150) which serve as a guard region and field-relief region for the Schottky diode.

28. 发明申请

WO2003038904A2 FIELD EFFECT TRANSISTOR ON INSULATING LAYER AND MANUFACTURING METHOD 审中-公开
标题翻译：绝缘层上的场效应晶体管和制造方法
公开(公告)号：WO2003038904A2
公开(公告)日：2003-05-08
申请号：PCT/IB2002/004369
申请日：2002-10-21
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V.
发明人： PEAKE, Steven, T.
IPC分类号： H01L29/78
CPC分类号： H01L29/66681 , H01L29/1095 , H01L29/66674 , H01L29/7824
摘要： A field effect transistor has source (12), body (10) and drain (8) formed on an insulating layer (4). Implant regions (40) are implanted under the source (12), laterally aligned with the source (12) by implantation through opening in the source mask. The ruggedness of the transistor may thereby be improved without affecting the doping in channel region (19).
摘要翻译：场效应晶体管具有形成在绝缘层（4）上的源极（12），主体（10）和漏极（8）。植入区域（40）通过在源掩模中的开口注入而植入在源极（12）下，与源极（12）横向对准。因此可以改善晶体管的粗糙度，而不影响沟道区域（19）中的掺杂。

29. 发明申请

WO2003036727A3 TRANSISTOR DEVICE 审中-公开
公开(公告)号：WO2003036727A3
公开(公告)日：2003-05-01
申请号：PCT/IB2002/004182
申请日：2002-10-10
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V.
发明人： RUTTER, Philip , PEAKE, Steven, T.
IPC分类号： H01L29/78
摘要： A transistor has a plurality of active zones, (22, 24) separated by separation regions (10). The zones include wide (22) and narrow (24) zones, and the wide zones are formed to be less susceptible to turning on a parasitic bipolar transistor, for example by omitting a source region (8) from the wide zones (22), so causing avalanche current to flow preferentially in the wide zones (22) which have a lesser susceptibility to turning on the parasitic bipolar transistor.

30. 发明申请

WO2002078091A2 FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD OF MANUFACTURE 审中-公开
标题翻译：场效应晶体管结构及其制造方法
公开(公告)号：WO2002078091A2
公开(公告)日：2002-10-03
申请号：PCT/IB2002/000970
申请日：2002-03-20
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V.
发明人： PEAKE, Steven, T. , GROVER, Raymond, J.
IPC分类号： H01L29/78
CPC分类号： H01L29/404 , H01L21/266 , H01L27/0255 , H01L29/0847 , H01L29/0878 , H01L29/402 , H01L29/42368 , H01L29/4983 , H01L29/66681 , H01L29/7821 , H01L29/7824 , H01L2924/0002 , H01L2924/00
摘要： A field effect transistor structure is formed with a body semiconductor layer (5) having source (9), body (7), drift region and drain (11). An upper semiconductor layer (21) is separated from the body by an oxide layer (17). The upper semiconductor layer (21) is doped to have a gate region (23) arranged over the body (7), a field plate region (25) arranged over the drift region 13 and at least one p-n junction (26) forming at least one diode between the field plate region (25) and the gate region (23). A source contact (39) is connected to both the source (9) and the field plate region (25).
摘要翻译：场效应晶体管结构形成有具有源极（9），主体（7），漂移区域和漏极（11）的主体半导体层（5）。上半导体层（21）通过氧化物层（17）与主体分离。上半导体层（21）被掺杂以具有布置在主体（7）上的栅极区（23），布置在漂移区13上的场板区（25）和至少形成至少一个pn结（26）在场板区域（25）和栅极区域（23）之间的一个二极管。源极接触（39）连接到源极（9）和场板区域（25）。

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