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1. 发明申请

WO2007027881A3 MICROELECTRONIC IMAGING DEVICES AND ASSOCIATED METHODS FOR ATTACHING TRANSMISSIVE ELEMENTS 审中-公开
标题翻译：用于连接传输元件的微电子成像装置及相关方法
公开(公告)号：WO2007027881A3
公开(公告)日：2007-10-11
申请号：PCT/US2006034012
申请日：2006-08-31
申请人： MICRON TECHNOLOGY INC , FARNWORTH WARREN M , WOOD ALAN G
发明人： FARNWORTH WARREN M , WOOD ALAN G
IPC分类号： H01L27/146
CPC分类号： H01L27/14687 , H01L27/14618 , H01L27/14623 , H01L27/14627 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L31/0232 , H01L2224/13
摘要： Microelectronic imaging devices and associated methods for attaching transmissive elements are disclosed. A manufacturing method in accordance with one embodiment of the invention includes providing an imager workpiece having multiple image sensor dies configured to detect energy over a target frequency. The image sensor dies can include an image sensor and a corresponding lens device positioned proximate to the image sensor. The method can further include positioning standoffs adjacent to the lens devices while the image sensor dies are connected to each other via the imager workpiece. At least one transmissive element can be attached to the workpiece at least proximate to the standoffs so the lens devices are positioned between the corresponding image sensors and the at least one transmissive element. Accordingly, the at least one transmissive element can protect the image sensors while the image sensor dies are still connected. In a subsequent process, the image sensor dies can be separated from each other.
摘要翻译：公开了用于附接透射元件的微电子成像装置和相关方法。根据本发明的一个实施例的制造方法包括提供具有多个图像传感器管芯的成像器工件，其配置成检测目标频率上的能量。图像传感器芯片可以包括图像传感器和位于图像传感器附近的对应的透镜装置。该方法还可以包括在图像传感器裸片经由成像器工件相互连接的同时定位与透镜装置相邻的支座。至少一个透射元件可以至少靠近支座附接到工件，使得透镜装置位于相应的图像传感器和至少一个透射元件之间。因此，至少一个透射元件可以在图像传感器管芯仍然连接的同时保护图像传感器。在随后的过程中，图像传感器管芯可以彼此分离。

2. 发明申请

WO2009035858A3 IMAGER DIE PACKAGE AND METHODS OF PACKAGING AN IMAGER DIE ON A TEMPORARY CARRIER 审中-公开
标题翻译： IMAGER模具包装和在临时载体上包装成像模具的方法
公开(公告)号：WO2009035858A3
公开(公告)日：2009-05-07
申请号：PCT/US2008074594
申请日：2008-08-28
申请人： MICRON TECHNOLOGY INC , OLIVER STEVEN , FARNWORTH WARREN M
发明人： OLIVER STEVEN , FARNWORTH WARREN M
IPC分类号： H01L27/148
CPC分类号： H01L21/56 , H01L27/14618 , H01L27/14625 , H01L27/14627 , H01L27/14632 , H01L27/14634 , H01L27/14636 , H01L27/14685 , H01L27/14687 , H01L27/1469 , H01L31/0203 , H01L31/0232 , H01L2224/13
摘要： Methods for fabricating an imager die package and resulting die packages are disclosed. An imager die packaging process may include dicing through a fabrication substrate comprising a plurality of imager die. Thereafter, known good die (KGD) qualified from the imager die are repopulated, face down on a high temperature-compatible temporary carrier, the KGD on the temporary carrier are encapsulated and thereafter removed as a reconstructed wafer from the temporary carrier. Furthermore, a first plurality of discrete conductive elements on a back side of the reconstructed wafer may be partially exposed and, optionally, a second plurality of discrete conductive elements may be applied to the first plurality of discrete conductive elements. The encapsulated KGD are then singulated.
摘要翻译：公开了用于制造成像器管芯封装件和所得到的管芯封装件的方法。成像器管芯封装工艺可以包括穿过包括多个成像器管芯的制造基板的切割。此后，将由成像器模具合格的已知良好模具（KGD）重新填充，面朝下放置在高温兼容的临时载体上，将临时载体上的KGD封装，然后作为临时载体的重建晶片移除。此外，重建晶片的背面上的第一多个离散导电元件可以被部分地暴露，并且可选地，第二多个离散导电元件可以被应用于第一多个离散导电元件。封装的KGD然后被分离。

3. 发明申请

WO2007027880A3 MICROELECTRONIC IMAGING UNITS AND METHODS OF MANUFACTURING MICROELECTRONIC IMAGING UNITS AT THE WAFER LEVEL 审中-公开
标题翻译：微电子成像单元及其制造方法微波成像单位在水平
公开(公告)号：WO2007027880A3
公开(公告)日：2008-01-17
申请号：PCT/US2006034011
申请日：2006-08-31
申请人： MICRON TECHNOLOGY INC , OLIVER STEVEN D , VELICKY LU , HIATT WILLIAM M , HEMBREE DAVID R , TUTTLE MARK E , RIGG SIDNEY , WARK JAMES , FARNWORTH WARREN M , KIRBY KYLE
发明人： OLIVER STEVEN D , VELICKY LU , HIATT WILLIAM M , HEMBREE DAVID R , TUTTLE MARK E , RIGG SIDNEY , WARK JAMES , FARNWORTH WARREN M , KIRBY KYLE
IPC分类号： H01L27/146
CPC分类号： H01L21/00 , H01L21/76898 , H01L23/552 , H01L27/14609 , H01L27/14618 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L27/14687 , H01L2924/0002 , H01L2924/00
摘要： Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies including integrated circuits, external contacts electrically coupled to the integrated circuits, and image sensors operably coupled to the integrated circuits. The individual image sensors include at least one dark current pixel at a perimeter portion of the image sensor. The method includes depositing a cover layer onto the workpiece and over the image sensors. The method further includes patterning and selectively developing the cover layer to form discrete volumes of cover layer material over corresponding image sensors. The discrete volumes of cover layer material have sidewalls aligned with an inboard edge of the individual dark current pixels such that the dark current pixels are not covered by the discrete volumes.
摘要翻译：本文公开了用于在晶片级制造多个成像单元的微电子成像单元和方法。在一个实施例中，制造多个成像单元的方法包括提供具有多个成像管芯的成像工件，所述成像管芯包括集成电路，电耦合到集成电路的外部触点以及可操作地耦合到集成电路的图像传感器。各个图像传感器包括在图像传感器的周边部分处的至少一个暗电流像素。该方法包括将覆盖层沉积在工件上并在图像传感器上方。该方法还包括图案化和选择性地显影覆盖层以在对应的图像传感器上形成分离体积的覆盖层材料。覆盖层材料的离散体积具有与各个暗电流像素的内侧边缘对准的侧壁，使得暗电流像素不被离散体积覆盖。

4. 发明申请

WO2008127293A2 HIGH DENSITY NANODOT NONVOLATILE MEMORY 审中-公开
标题翻译：高密度纳坦诺非易失性存储器
公开(公告)号：WO2008127293A2
公开(公告)日：2008-10-23
申请号：PCT/US2007022167
申请日：2007-10-17
申请人： MICRON TECHNOLOGY INC , BHATTACHARYYA ARUP , FARNWORTH WARREN M , FARRAR PAUL A
发明人： BHATTACHARYYA ARUP , FARNWORTH WARREN M , FARRAR PAUL A
IPC分类号： H01L21/28 , G11C13/02 , G11C16/04 , H01L21/027 , H01L21/768 , H01L21/8247 , H01L27/115 , H01L27/28 , H01L29/06 , H01L29/423 , H01L29/788 , H01L51/00 , H01L51/05 , H01L51/10
CPC分类号： H01L21/28273 , B82Y10/00 , G11C13/025 , H01L21/76838 , H01L21/76885 , H01L23/53276 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/7613 , H01L29/7881 , H01L29/7888 , H01L51/0048 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A nanodot nonvolatile memory element comprises a substrate having a source and a drain region formed therein, and an insulating layer formed on the substrate. The insulating layer contains a nanocrystalline floating gate of approximately three -to six nanometers in diameter formed at a distance of approximately two to five nanometers from the substrate, and a carbon nanotube control gate having a diameter of approximately six nanometers or less is formed at a distance of approximately 10-15 nanometers from the substrate.
摘要翻译：纳米级非易失性存储元件包括其中形成有源区和漏区的衬底，以及形成在衬底上的绝缘层。绝缘层包含大约三至六纳米直径的纳米晶体浮栅，其形成距离衬底大约二至五纳米的距离，并且在一个直径约六纳米或更小的碳纳米管控制栅极上形成距衬底约10-15纳米。

5. 发明申请

WO2004043680A3 PROGRAMMABLE MATERIAL CONSOLIDATION SYSTEMS AND METHODS 审中-公开
标题翻译：可编程材料综合系统和方法
公开(公告)号：WO2004043680A3
公开(公告)日：2004-09-23
申请号：PCT/US0336745
申请日：2003-11-11
申请人： MICRON TECHNOLOGY INC
发明人： FARNWORTH WARREN M , HIATT WILLIAM M , HEMBREE DAVID R , BENSON PETER A , AHMAD SYED SAJID , HESS MICHAEL E
IPC分类号： B29C67/00
CPC分类号： B29C64/35 , B29C64/135 , B33Y30/00 , B33Y40/00 , B33Y50/02
摘要： A programmed material consolidation apparatus includes at least one fabrication site and a material consolidation system (200) associated with the at least one fabrication site. The at least one fabrication site may be configured to receive one or more fabrication substrates, such as semiconductor substrates. A machine vision system with a translatable or locationally fixed camera may be associated with the at least one fabrication site and the material consolidation system. A cleaning component may also be associated with the at least one fabrication site. The cleaning component may share one or more elements with the at least one fabrication site, or may be separate therefrom. The programmed material consolidation apparatus may also include a substrate handling system, which places fabrication substrates at appropriate locations of the programmed material consolidation apparatus.
摘要翻译：编程材料合并装置包括与所述至少一个制造部位相关联的至少一个制造部位和材料固结系统（200）。至少一个制造位置可以被配置为接收一个或多个制造衬底，例如半导体衬底。具有可移动或位置固定的照相机的机器视觉系统可以与至少一个制造场所和材料合并系统相关联。清洁部件也可以与至少一个制造部位相关联。清洁部件可以与至少一个制造部位共享一个或多个元件，或者可以与其分开。编程材料合并装置还可以包括基板处理系统，其将制造基板放置在编程材料固结装置的适当位置。

6. 发明申请

WO2008005161A2 SEMICONDUCTOR CONSTRUCTIONS AND ASSEMBLIES, ELECTRONIC SYSTEMS, AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS AND ASSEMBLIES 审中-公开
标题翻译：半导体结构和组件，电子系统和形成半导体结构和组件的方法
公开(公告)号：WO2008005161A2
公开(公告)日：2008-01-10
申请号：PCT/US2007013895
申请日：2007-06-13
申请人： MICRON TECHNOLOGY INC
发明人： OLIVER STEVE , FARNWORTH WARREN M
CPC分类号： H01L21/486 , H01L21/561 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L24/12 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0231 , H01L2224/02372 , H01L2224/0401 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/0558 , H01L2224/056 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06181 , H01L2224/13022 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/16235 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06586 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2224/13099 , H01L2224/29099 , H01L2924/00014 , H01L2924/01028 , H01L2924/013
摘要： The invention includes semiconductor assemblies having two or more dies. An exemplary assembly has circuitry associated with a first die front side electrically connected to circuitry associated with a second die front side. The front-side of the second die is adjacent a back side of the first die, and a through wafer interconnect extends through the first die. The through wafer interconnect includes a conductive liner within a via extending through the first die. The conductive liner narrows the via, and the narrowed via is filled with insulative material. The invention also includes methods of forming semiconductor assemblies having two or more dies; and includes electronic systems containing assemblies with two or more dies.
摘要翻译：本发明包括具有两个或更多个管芯的半导体组件。示例性组件具有与第一管芯正面侧电连接到与第二管芯正面侧相关联的电路相关联的电路。第二管芯的前侧邻近第一管芯的背面，并且贯通晶片互连件延伸穿过第一管芯。贯通晶片互连包括穿过第一管芯的通孔内的导电衬垫。导电衬套使通孔变窄，并且变窄的通孔填充有绝缘材料。本发明还包括形成具有两个或更多个管芯的半导体组件的方法; 并且包括含有具有两个或更多个管芯的组件的电子系统。

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