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1. 发明授权

US06774012B1 Furnace system and method for selectively oxidizing a sidewall surface of a gate conductor by oxidizing a silicon sidewall in lieu of a refractory metal sidewall 有权
$Furnace system and method for selectively oxidizing a sidewall surface of a gate conductor by oxidizing a silicon sidewall in lieu of a refractory metal sidewall$
标题翻译：炉系统和方法，用于通过氧化硅侧壁代替难熔金属侧壁来选择性地氧化栅极导体的侧壁表面
公开(公告)号：US06774012B1
公开(公告)日：2004-08-10
申请号：US10290841
申请日：2002-11-08
申请人： Sundar Narayanan
发明人： Sundar Narayanan
IPC分类号： H01L21322
CPC分类号： H01L21/67109 , H01L21/28247
摘要： An improved furnace system and method is provided to substantially minimize, if not eliminate, ambient air from entering a heated chamber of the furnace system during a critical processing step. The furnace system can be used in, for example, an oxidation step where ambient air containing oxygen is prevented from entering an atmospheric pressure tube by essentially purging potential leak areas with an inert gas, such as nitrogen, at the critical moment during temperature ramp up and ramp down, and prior to temperature stabilization and the introduction of an oxidizing gas. If oxygen is not present within the tube, then a tungsten sidewall surface of a gate conductor, for example, will not inadvertently oxidize at the critical pre- and post-oxidation moments. However, if steam is present where hydrogen is available with oxygen, the underlying polysilicon sidewall surface will selectively oxidize instead of the overlying tungsten. The inert gas-filled containers are retrofitted to potential leak areas of not only the tube, but also a torch that is used to forward heated gas into the tube.
摘要翻译：提供了一种改进的炉系统和方法，以在临界处理步骤中大致最小化（如果不消除）环境空气进入炉系统的加热室。炉系统可用于例如氧化步骤，其中通过在温度升高期间的关键时刻基本上用惰性气体（例如氮气）清除潜在的泄漏区域，防止含有氧的环境空气进入大气压力管并降温，并在温度稳定和引入氧化气体之前。如果管内不存在氧气，则栅极导体的钨侧壁表面例如在临界氧化前和氧化后的时刻不会无意中氧化。然而，如果存在氢气可用于氧气的蒸汽，则下游的多晶硅侧壁表面将选择性地氧化而不是上覆的钨。惰性气体填充的容器不仅被改装到潜在的泄漏区域，而且还被用于将加热气体送入管中的火炬。

2. 发明授权

US06649491B2 Method of forming regular array of microscopic structures on a substrate 失效
公开(公告)号：US06649491B2
公开(公告)日：2003-11-18
申请号：US10168239
申请日：2002-06-17
申请人： James Kenneth Snowdon , Marcus Matthias Batzill , François Bardou
发明人： James Kenneth Snowdon , Marcus Matthias Batzill , François Bardou
IPC分类号： H01L21322
CPC分类号： H01J37/3178
摘要： A method of forming a substantially regular array of microscopic structures on a surface of a sample (4) is described. The sample comprises a microscopic layer of at least one first material on a substrate of a second material, wherein the microscopic layer is sufficiently thin that stress fields at the interface of the microscopic layer and the substrate cause formation of separated regions of the first material on the substrate. The microscopic layer on the sample (4) is irradiated by means of a particle beam (5) at an acute angle &agr;, to influence the direction of alignment of said separated regions and/or the relative position of adjacent said separated regions.

3. 发明授权

US06642128B1 Method for high temperature oxidations to prevent oxide edge peeling 有权
标题翻译：高温氧化防止氧化皮边缘剥落的方法
公开(公告)号：US06642128B1
公开(公告)日：2003-11-04
申请号：US10140396
申请日：2002-05-06
申请人： Ching-Shan Lu , Kuo-Bin Huang , Jih-Churng Twu
发明人： Ching-Shan Lu , Kuo-Bin Huang , Jih-Churng Twu
IPC分类号： H01L21322
CPC分类号： H01L21/76224
摘要： A method for preventing oxide layer peeling in a high temperature annealing process including providing a plurality of spaced apart stacked semiconductor wafers for carrying out a high temperature annealing process including ambient nitrogen gas the plurality of spaced apart stacked semiconductor wafers stacked such that a process surface including an oxide layer of at least one semiconductor wafer is adjacent to a backside surface of another semiconductor wafer said backside surface having a layer of silicon nitride formed thereon prior to carrying out the high temperature annealing process; and, carrying out the high temperature annealing process.
摘要翻译：一种用于防止在高温退火过程中氧化层剥离的方法，包括提供多个间隔堆叠的半导体晶片，用于执行包括环境氮气的高温退火工艺，所述多个间隔堆叠的半导体晶片被堆叠，使得处理表面包括在进行高温退火处理之前，至少一个半导体晶片的氧化物层与另一半导体晶片的背面相邻，所述背面具有形成在其上的氮化硅层; 并进行高温退火处理。

4. 发明授权

US06555448B2 Semiconductor manufacturing method 失效
标题翻译：半导体制造方法
公开(公告)号：US06555448B2
公开(公告)日：2003-04-29
申请号：US09847313
申请日：2001-05-03
申请人： Yasumori Fukushima
发明人： Yasumori Fukushima
IPC分类号： H01L21322
CPC分类号： H01L21/02672 , H01L21/02532 , H01L21/0262 , H01L21/2022 , H01L21/3226 , H01L29/66757 , H01L29/78675
摘要： There is provided a semiconductor manufacturing method capable of sufficiently reducing catalytic element in a crystalline silicon film and also increasing the area of the crystalline silicon film to be left on the substrate. A catalytic element for accelerating the crystallization is introduced into an amorphous silicon film on a substrate, and a first heat treatment is performed to crystallize the amorphous silicon film into a crystalline silicon film. A mask layer is provided on the surface of the crystalline silicon film, the mask layer having an opening passing thicknesswise through the mask layer. Further thereon, a sacrifice film is formed so as to continuously cover the surface of the mask layer and an opening-correspondent portion of the crystalline silicon film. A getter element for gettering the catalytic element is introduced into the sacrifice film and the opening-correspondent portion of the crystalline silicon film. A second heat treatment is performed, by which the catalytic element is gettered from the crystalline silicon film to the sacrifice film through the opening.
摘要翻译：提供了能够充分降低结晶硅膜中的催化元素并且还增加留在基板上的结晶硅膜的面积的半导体制造方法。将用于加速结晶的催化元素引入到基板上的非晶硅膜中，并且进行第一热处理以将非晶硅膜结晶成晶体硅膜。掩模层设置在结晶硅膜的表面上，掩模层具有穿过掩模层的厚度的开口。此外，形成牺牲膜，以连续地覆盖掩模层的表面和结晶硅膜的开口部分。将用于吸除催化元素的吸气元件引入牺牲膜和结晶硅膜的开口部分。进行第二热处理，通过该第二热处理，催化元素通过开口从结晶硅膜吸收到牺牲膜。

5. 发明授权

US06426276B1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06426276B1
公开(公告)日：2002-07-30
申请号：US09708424
申请日：2000-11-09
申请人： Hideto Ohnuma , Tosiyuki Agui , Akiko Shiba
发明人： Hideto Ohnuma , Tosiyuki Agui , Akiko Shiba
IPC分类号： H01L21322
CPC分类号： H01L21/02672 , H01L21/02532 , H01L21/2022 , H01L21/3226 , H01L29/66757 , H01L29/66765
摘要： In a method of manufacturing a semiconductor device, nickel elements 404 is held on a surface of an amorphous silicon film 403 in a contact manner, and then transformed into a crystalline silicon film 405 through a heat treatment. Thereafter a mask 406 is formed to conduct doping with phosphorus. In this process, a region 407 is doped with phosphorus. Then, the region 407 which has been doped with phosphorus is activated by the irradiation of a laser beam or an intense light. Then, a heat treatment is conducted on the layer again to getter nickel in the region 407. Subsequently, the region 407 into which nickel is concentrated is removed so nickel is gettered, to obtain a region 408 having still higher crystallinity.
摘要翻译：在制造半导体器件的方法中，镍元件404以接触的方式保持在非晶硅膜403的表面上，然后通过热处理转变成结晶硅膜405。此后，形成掩模406以进行磷掺杂。在该过程中，区域407掺杂有磷。然后，通过激光或强光的照射来激活掺杂有磷的区域407。然后，再次对该层进行热处理以在区域407中吸收镍。随后，去除镍浓缩的区域407，以使镍被吸收，以获得具有更高结晶度的区域408。

6. 发明授权

US06420246B1 Method of gettering a metal element for accelerating crystallization of silicon by phosphorous 失效
标题翻译：通过磷吸收金属元素以促进硅结晶的方法
公开(公告)号：US06420246B1
公开(公告)日：2002-07-16
申请号：US09025586
申请日：1998-02-17
申请人： Shunpei Yamazaki , Hisashi Ohtani
发明人： Shunpei Yamazaki , Hisashi Ohtani
IPC分类号： H01L21322
CPC分类号： H01L21/02672 , H01L21/02532 , H01L21/2022 , H01L21/268 , H01L21/3221 , H01L21/3226 , H01L27/1285 , H01L29/66757 , H01L29/78675
摘要： A mask is formed selectively on a crystalline silicon film containing a catalyst element, and an amorphous silicon film is formed so as to cover the mask. Phosphorus is implanted into the amorphous silicon film and the portion of the crystalline silicon film which is not covered with the mask. The silicon films are then heated by rapid thermal annealing (RTA). By virtue of the existence of the amorphous silicon film, the temperature of the crystalline silicon film is increased uniformly, whereby the portion of the crystalline silicon film covered with the mask is also heated sufficiently and the catalyst element existing in this region moves to the phosphorus-implanted, amorphous portion having high gettering ability. As a result, the concentration of the catalyst element is reduced in the portion of the silicon film covered with the mask. A semiconductor device is manufactured by using this portion.
摘要翻译：在含有催化剂元素的结晶硅膜上选择性地形成掩模，并且形成非晶硅膜以覆盖掩模。将磷注入到非晶硅膜和未被掩模覆盖的晶体硅膜的部分。然后通过快速热退火（RTA）将硅膜加热。由于非晶硅膜的存在，结晶硅膜的温度均匀地增加，由掩模覆盖的结晶硅膜的部分也被充分加热，并且存在于该区域中的催化剂元素移动到磷 - 具有高吸气能力的无定形部分。结果，在被掩模覆盖的硅膜的部分中催化剂元素的浓度降低。通过使用该部分制造半导体器件。

7. 发明授权

US06403450B1 Heat treatment method for semiconductor substrates 有权
标题翻译：半导体基板的热处理方法
公开(公告)号：US06403450B1
公开(公告)日：2002-06-11
申请号：US09445314
申请日：2000-02-29
申请人： Christophe Maleville , Thierry Barge , Bernard Aspar , Hubert Moriceau , André-Jacques Auberton-Herve
发明人： Christophe Maleville , Thierry Barge , Bernard Aspar , Hubert Moriceau , André-Jacques Auberton-Herve
IPC分类号： H01L21322
CPC分类号： H01L21/3221 , H01L21/76254
摘要： The invention concerns a method for treating, a substrate comprising a semi-conducting layer (4) on at least one of its surfaces. Said method comprises a step for annealing the substrate and a step for forming, an oxide layer (6) at the semi-conducting layer (4) surface, carried out before the end of the annealing step, protecting the remainder of the semi-conducting layer (4).
摘要翻译：本发明涉及一种用于处理在其至少一个表面上包含半导体层（4）的衬底的方法。所述方法包括用于退火衬底的步骤和在退火步骤结束之前在半导体层（4）表面形成氧化物层（6）的步骤，保护半导体的剩余部分层（4）。

8. 发明授权

US06391746B1 Gettering regions and methods of forming gettering regions within a semiconductor wafer 失效
公开(公告)号：US06391746B1
公开(公告)日：2002-05-21
申请号：US09544342
申请日：2000-04-06
申请人： Fernando Gonzalez , Jeffrey W. Honeycutt
发明人： Fernando Gonzalez , Jeffrey W. Honeycutt
IPC分类号： H01L21322
CPC分类号： H01L21/26506 , H01L21/26513 , H01L21/3221 , H01L29/32 , Y10S148/05 , Y10S148/06 , Y10S257/913
摘要： In one aspect, the invention pertains to a method of forming a gettering region within an Si semiconductor wafer, the method including: a) providing a semiconductor material wafer; b) providing a background region within the semiconductor material wafer, the background region being doped with a first-type conductivity enhancing dopant, the first-type conductivity enhancing dopant being either n-type or p-type; c) implanting a second-type conductivity enhancing dopant into the background region to form a second-type implant region entirely contained within the background region, the second-type conductivity enhancing dopant being of an opposite type than the first-type conductivity enhancing dopant of the background region; and d) implanting a neutral-conductivity-type conductivity enhancing dopant into the second-type implant region to form a metals gettering damage region entirely contained within the second-type implant region. The invention also pertains to gettering region structures.

9. 发明授权

US06337260B1 Use of knocked-on oxygen atoms for reduction of transient enhanced diffusion 有权
标题翻译：使用敲击氧原子来减少瞬时增强的扩散
公开(公告)号：US06337260B1
公开(公告)日：2002-01-08
申请号：US09667602
申请日：2000-09-22
申请人： Emi Ishida
发明人： Emi Ishida
IPC分类号： H01L21322
CPC分类号： H01L21/31155 , H01L21/26513 , H01L21/2652 , H01L21/26526
摘要： Transient enhanced diffusion (TED) of ion implanted dopant impurities within a silicon semiconductor substrate is eliminated or substantially reduced by displacing “knocked-on” oxygen atoms from an overlying oxygen-containing layer into the substrate by ion implantation. The “knocked-on” oxygen atoms getter silicon interstitial atoms generated within the substrate by dopant implantation, which are responsible for TED.
摘要翻译：通过离子注入将“敲入”的氧原子从上覆的含氧层置换到衬底中，消除或基本上减少硅半导体衬底内离子注入的掺杂杂质的瞬态增强扩散（TED）。 “敲入”氧原子通过掺杂剂注入在衬底内产生的硅间隙原子，这是负责TED的。

10. 发明授权

US06277712B1 Multilayered wafer with thick sacrificial layer using porous silicon or porous silicon oxide and fabrication method thereof 有权
标题翻译：使用多孔硅或多孔氧化硅的具有厚牺牲层的多层晶片及其制造方法
公开(公告)号：US06277712B1
公开(公告)日：2001-08-21
申请号：US09540552
申请日：2000-03-31
申请人： Sung-gyu Kang , Ki Bang Lee , Jae-joon Choi , Hee-moon Jeong
发明人： Sung-gyu Kang , Ki Bang Lee , Jae-joon Choi , Hee-moon Jeong
IPC分类号： H01L21322
CPC分类号： G01P15/0802 , B81C1/0019 , B81C1/00507 , B81C2201/0115 , H01L21/76251 , H01L21/76262
摘要： A multilayered wafer with a thick sacrificial layer, which is obtained by forming a sacrificial layer of oxidized porous silicon or porous silicon and growing an epitaxial polysilicon layer on the sacrificial layer, and a fabrication method thereof are provided. The multilayered wafer with a thick sacrificial layer adopts a porous silicon layer or an oxidized porous silicon layer as a sacrificial layer such that a sufficient gap can be obtained between a substrate and a suspension structure upon the manufacture of the suspension structure of a semiconductor actuator or a semiconductor inertia sensor. Also, in a fabrication method of the wafer according to the present invention, a p+-type or n+-type wafer doped at a high concentration is prepared for, and then a thick porous silicon layer can be obtained simply by anodic-bonding the surface of the wafer. Also, when polysilicon is grown on a porous silicon layer by an epitaxial process, it is grown faster than when single crystal silicon is grown.
摘要翻译：提供了通过在牺牲层上形成氧化的多孔硅或多孔硅的牺牲层并生长外延多晶硅层而获得的具有厚牺牲层的多层晶片及其制造方法。具有厚牺牲层的多层晶片采用多孔硅层或氧化多孔硅层作为牺牲层，使得在制造半导体致动器的悬架结构时可在衬底和悬架结构之间获得足够的间隙，或者半导体惯性传感器。此外，在根据本发明的晶片的制造方法中，制备以高浓度掺杂的p +型或n +型晶片，然后可以简单地通过阳极结合表面获得厚的多孔硅层的晶片。而且，当通过外延工艺在多孔硅层上生长多晶硅时，其生长比单晶硅生长时更快。

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