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1. 发明授权

US06642128B1 Method for high temperature oxidations to prevent oxide edge peeling 有权
标题翻译：高温氧化防止氧化皮边缘剥落的方法
公开(公告)号：US06642128B1
公开(公告)日：2003-11-04
申请号：US10140396
申请日：2002-05-06
申请人： Ching-Shan Lu , Kuo-Bin Huang , Jih-Churng Twu
发明人： Ching-Shan Lu , Kuo-Bin Huang , Jih-Churng Twu
IPC分类号： H01L21322
CPC分类号： H01L21/76224
摘要： A method for preventing oxide layer peeling in a high temperature annealing process including providing a plurality of spaced apart stacked semiconductor wafers for carrying out a high temperature annealing process including ambient nitrogen gas the plurality of spaced apart stacked semiconductor wafers stacked such that a process surface including an oxide layer of at least one semiconductor wafer is adjacent to a backside surface of another semiconductor wafer said backside surface having a layer of silicon nitride formed thereon prior to carrying out the high temperature annealing process; and, carrying out the high temperature annealing process.
摘要翻译：一种用于防止在高温退火过程中氧化层剥离的方法，包括提供多个间隔堆叠的半导体晶片，用于执行包括环境氮气的高温退火工艺，所述多个间隔堆叠的半导体晶片被堆叠，使得处理表面包括在进行高温退火处理之前，至少一个半导体晶片的氧化物层与另一半导体晶片的背面相邻，所述背面具有形成在其上的氮化硅层; 并进行高温退火处理。

2. 发明授权

US06777251B2 Metrology for monitoring a rapid thermal annealing process 失效
标题翻译：用于监测快速热退火过程的计量
公开(公告)号：US06777251B2
公开(公告)日：2004-08-17
申请号：US10175702
申请日：2002-06-20
申请人： Ching Shan Lu , Fu-Su Lee , Wei-Ming You , Jih-Churng Twu , Yu-Chien Hsiao
发明人： Ching Shan Lu , Fu-Su Lee , Wei-Ming You , Jih-Churng Twu , Yu-Chien Hsiao
IPC分类号： H01L2166
CPC分类号： H01L21/67253 , H01L21/67098 , H01L22/20
摘要： A method including operating an ion implanted to implanting ions in a semiconductor wafer at a first ion dose level; performing a first thermal wave measurement to obtain the first thermal wave value; placing the semiconductor wafer in a rapid thermal annealing furnace and operating the furnace to rapidly heat the semiconductor wafer at a first rate for a first time period and so that the wafer is heated with intent of achieving a wafer temperature of 500° C.; performing a second thermal wave measurement to obtain a second thermal wave value; comparing the difference between the first thermal wave value and the second thermal wave value to a target range of 376.5-382.5 and rejecting the wafer as being outside of an acceptable specification if the difference is outside of the target range.
摘要翻译：一种方法，包括操作注入的离子以在第一离子剂量水平下在半导体晶片中注入离子; 执行第一热波测量以获得第一热波值; 将半导体晶片放置在快速热退火炉中并操作炉子以第一速率第一时间段快速加热半导体晶片，并且旨在实现晶片温度为500℃的晶片被加热; 执行第二热波测量以获得第二热波值; 将第一热波值和第二热波值之间的差值与376.5-382.5的目标范围进行比较，并且如果差异在目标范围之外，则拒绝晶片超出可接受规范。

3. 发明授权

US06722949B2 Ventilated platen/polishing pad assembly for chemcial mechanical polishing and method of using 失效
标题翻译：用于化学机械抛光的通风压板/抛光垫组件及其使用方法
公开(公告)号：US06722949B2
公开(公告)日：2004-04-20
申请号：US09813238
申请日：2001-03-20
申请人： Tien-Chen Hu , Jih-Churng Twu
发明人： Tien-Chen Hu , Jih-Churng Twu
IPC分类号： B24B100
CPC分类号： B24B37/16 , B24B37/26 , B24D7/10
摘要： A ventilated platen/polishing pad assembly for chemical mechanical polishing copper conductors on a semiconductor wafer is disclosed. The ventilated platen is constructed by a platen having a multiplicity of apertures through a thickness of the platen, and a polishing pad that has a multiplicity of apertures for fluid communication with the multiplicity of apertures in the platen such that a gas can flow through the ventilated platen and the ventilated polishing pad to mix with a polishing slurry solution dispensed on top of the polishing pad. When an oxidizing gas is mixed with the slurry solution, the mass transfer process during the chemical mechanical polishing can be improved and thus improving the polishing uniformity of the copper surface. The invention further discloses a method for chemical mechanical polishing copper conductors on a semiconductor wafer by dispensing a polishing slurry/oxidizing gas mixture onto a top surface of a polishing pad for engaging a wafer surface and thus improving the polishing uniformity and preventing corrosion or erosion of the fresh copper surface by the acidic or basic components contained in the slurry solution.
摘要翻译：公开了一种在半导体晶片上用于化学机械抛光铜导体的通风压板/抛光垫组件。通风压板由具有穿过压板的厚度的多个孔的压板构成，抛光垫具有多个孔，用于与压板中的多个孔流体连通，使得气体可以流过通风的压板和通风的抛光垫与分配在抛光垫顶部的抛光浆液混合。当将氧化性气体与浆料溶液混合时，可以提高化学机械研磨过程中的传质过程，从而提高铜表面的研磨均匀性。本发明还公开了一种通过将抛光浆料/氧化气体混合物分配到抛光垫的顶表面上用于接合晶片表面从而提高抛光均匀性并防止腐蚀或腐蚀的方法，用于化学机械抛光半导体晶片上的铜导体新鲜的铜表面由浆液中所含的酸性或碱性成分溶液组成。

4. 发明授权

US06647998B2 Electrostatic charge-free solvent-type dryer for semiconductor wafers 有权
公开(公告)号：US06647998B2
公开(公告)日：2003-11-18
申请号：US09885772
申请日：2001-06-20
申请人： Jih-Churng Twu , Ming-Dar Guo , Tsung-Chieh Tsai , Sheng-Hsiung Tseng , Wei-Ming You , Yao-Pin Huang , Chia-Chun Cheng , Chin-Hsiung Ho , Ming Te More
发明人： Jih-Churng Twu , Ming-Dar Guo , Tsung-Chieh Tsai , Sheng-Hsiung Tseng , Wei-Ming You , Yao-Pin Huang , Chia-Chun Cheng , Chin-Hsiung Ho , Ming Te More
IPC分类号： B08B310
CPC分类号： H01L21/67034 , Y10S134/902
摘要： An electrostatic charge-free solvent-type dryer for drying semiconductor wafers after a wet bench process is disclosed in a preferred embodiment and in an alternate embodiment. In the preferred embodiment, the electrostatic charge-free solvent-type dryer is constructed by a tank body, a wafer carrier, an elevator means, a tank cover and a conduit for feeding the flow of solvent vapor. At least one of the tank cover, the conduit for feeding the flow of solvent vapor and the plurality of partition plates is fabricated of a non-electrostatic material such that electrostatic charge is not generated in the flow of solvent vapor. In the alternate embodiment, a deionizer is further provided in the tank cavity for producing a flux of positive ions to neutralize any negative ions that are possibly produced in the flow of solvent vapor.

5. 发明授权

US06380056B1 Lightly nitridation surface for preparing thin-gate oxides 有权
标题翻译：用于制备薄栅氧化物的轻微氮化表面
公开(公告)号：US06380056B1
公开(公告)日：2002-04-30
申请号：US09177190
申请日：1998-10-23
申请人： Shau-Lin Shue , Jih-Churng Twu
发明人： Shau-Lin Shue , Jih-Churng Twu
IPC分类号： H01L213105
CPC分类号： H01L21/28185 , H01L21/28202 , H01L21/3144 , H01L21/3185 , H01L29/518
摘要： A method for forming a dielectric layer upon a silicon layer. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a silicon layer. There is then formed through use of a first thermal annealing method employing a nitrogen containing annealing atmosphere in absence of an oxidizing material or a reducing material silicon nitride containing layer upon a partially consumed silicon layer derived from the silicon layer. There is then oxidized through use of a second thermal annealing method employing an oxidizing material containing atmosphere the silicon nitride containing layer to form an oxidized silicon nitride containing layer upon a further consumed silicon layer derived from the partially consumed silicon layer. The method is particularly useful in forming a gate dielectric layer with enhanced hot carrier resistance properties and enhanced dopant diffusion barrier properties within a field effect transistor (FET).
摘要翻译：一种在硅层上形成电介质层的方法。首先提供了在微电子制造中使用的衬底。然后在衬底上形成硅层。然后通过在不存在氧化材料的情况下使用含氮退火气氛的第一热退火方法或者衍生自硅层的部分消耗的硅层上的还原材料氮化硅含有层形成第一热退火方法。然后通过使用含有含氮化硅的层的氧化材料的第二热退火方法，在从部分消耗的硅层衍生的进一步消耗的硅层上形成氧化的含氮化硅的层而进行氧化。该方法特别适用于在场效应晶体管（FET）中形成具有增强的热载流子电阻特性和增强的掺杂剂扩散阻挡特性的栅极介电层。

6. 发明授权

US06376377B1 Post chemical mechanical polish (CMP) planarizing substrate cleaning method employing enhanced substrate hydrophilicity 有权
标题翻译：后化学机械抛光（CMP）平面化基板清洗方法采用增强的基板亲水性
公开(公告)号：US06376377B1
公开(公告)日：2002-04-23
申请号：US09541487
申请日：2000-04-03
申请人： Weng Chang , Ying-Ho Chen , Jih-Churng Twu , Syun-Ming Jang
发明人： Weng Chang , Ying-Ho Chen , Jih-Churng Twu , Syun-Ming Jang
IPC分类号： H01L21302
CPC分类号： H01L21/76826 , H01L21/02074 , H01L21/3212 , H01L21/76801 , H01L21/76807 , H01L21/76825 , H01L21/76888
摘要： Within a method for removing from over a substrate a chemical mechanical polish (CMP) residue layer there is first provided a substrate. There is then formed over the substrate: (1) a chemical mechanical polish (CMP) substrate layer having an aperture formed therein; (2) a chemical mechanical polish (CMP) planarized patterned layer formed within the aperture within the chemical mechanical polish (CMP) substrate layer; and (3) a chemical mechanical polish (CMP) residue layer formed upon at least one of the chemical mechanical polish substrate layer and the chemical mechanical polish (CMP) planarized patterned layer, where at least one of the chemical mechanical polish (CMP) substrate layer and the chemical mechanical polish (CMP) planarized patterned layer has a first aqueous contact angle. There is then treated the at least one of the chemical mechanical polish (CMP) substrate layer and the chemical mechanical polish (CMP) planarized patterned layer having the first aqueous contact angle to provide at least one of a hydrophilic chemical mechanical polish (CMP) substrate layer and a hydrophilic chemical mechanical polish (CMP) planarized patterned layer having a second aqueous contact angle less than the first aqueous contact angle. Finally, there is then removed the chemical mechanical polish (CMP) residue layer from the at least one of the hydrophilic chemical mechanical polish (CMP) substrate layer and the hydrophilic chemical mechanical polish (CMP) planarized patterned layer with an aqueous cleaner composition.
摘要翻译：在用于从衬底上除去化学机械抛光（CMP）残留层的方法中，首先提供衬底。然后在衬底上形成：（1）其中形成有孔的化学机械抛光（CMP）衬底层; （2）化学机械抛光（CMP）平面化图案层，其形成在化学机械抛光（CMP）衬底层内的孔内; 化学机械抛光（CMP）残留层形成在至少一个化学机械抛光衬底层和化学机械抛光（CMP）平面化图案层上，其中化学机械抛光（CMP）衬底层和化学机械抛光（CMP）平面化图案层具有第一水接触角。然后，处理具有第一水接触角的化学机械抛光（CMP）衬底层和化学机械抛光（CMP）平坦化图案化层中的至少一个以提供亲水化学机械抛光（CMP）衬底中的至少一个层和亲水化学机械抛光（CMP）平面化图案层，其具有小于第一水接触角的第二水接触角。最后，用水性清洁剂组合物从亲水化学机械抛光（CMP）衬底层和亲水化学机械抛光（CMP）平坦化图案化层中的至少一个去除化学机械抛光（CMP）残留层。

7. 发明授权

US06211098B1 Wet oxidation method for forming silicon oxide dielectric layer 有权
标题翻译：用于形成氧化硅介电层的湿式氧化法
公开(公告)号：US06211098B1
公开(公告)日：2001-04-03
申请号：US09252337
申请日：1999-02-18
申请人： Jih-Churng Twu , Syun-Ming Jang , Chen-Hua Yu
发明人： Jih-Churng Twu , Syun-Ming Jang , Chen-Hua Yu
IPC分类号： H01L2126
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： A method for forming a silicon oxide gate oxide dielectric layer upon a silicon semiconductor substrate employed within a microelectronics fabrication. There is provided a silicon semiconductor substrate. There is then formed upon the silicon semiconductor substrate, empolying thermal annealing of the silicon semiconductor substrate at an elevated temperature in a gas mixture of oxygen, hydrogen and a diluent gas, a silicon oxide gate oxide dielectric layer with enhanced dielectric properties and more precise control of the silicon oxide dielectric layer thickness.
摘要翻译：一种在微电子学制造中使用的硅半导体衬底上形成氧化硅栅极氧化物电介质层的方法。提供硅半导体衬底。然后形成在硅半导体衬底上，在氧气，氢气和稀释气体的气体混合物中，在升高的温度下对硅半导体衬底进行热退火，具有增强介电特性和更精确控制的氧化硅栅氧化物介电层的氧化硅介电层厚度。

8. 发明授权

US06878578B1 Method for forming a high quality chemical oxide on a freshly cleaned silicon surface as a native oxide replacement 失效
标题翻译：在新鲜清洁的硅表面上形成高质量化学氧化物作为天然氧化物替代物的方法
公开(公告)号：US06878578B1
公开(公告)日：2005-04-12
申请号：US10134823
申请日：2002-04-26
申请人： Jih-Churng Twu , Tsung-Chieh Tsai , Roung-Hui Kao , Chia-Chun Cheng
发明人： Jih-Churng Twu , Tsung-Chieh Tsai , Roung-Hui Kao , Chia-Chun Cheng
IPC分类号： H01L21/28 , H01L21/306 , H01L21/336 , H01L21/8238 , H01L29/51
CPC分类号： H01L21/28211 , H01L21/02052 , H01L21/823857 , H01L29/51 , H01L29/6659
摘要： A continuous and integrated cleaning/preparation process is described to condition a silicon surface for the formation of a high quality ultra thin gate oxide described. The process is conducted with the wafer surface immersed in an aqueous solution the composition of which is varied continuously according to the steps of the process. The process includes the initial removal of contaminants and particulates followed by the removal of a native oxide. Next the silicon surface is dressed in the present of both HF and ozone by removing a thin surface layer. Any interfacial contamination or surface structural defects which lay under the native oxide are thereby removed. Next a high quality chemical oxide is grown by the action of the ozone in the aqueous bath. The chemical oxide is found to be of higher purity and structural quality than native oxide and provides a superior passivation of the active surface prior to gate oxidation. The chemical oxide is incorporated into the final gate oxide and, because of it's high quality, results in improved device performance of the final gate oxide.
摘要翻译：描述了连续且集成的清洁/制备方法以调节硅表面以形成所述的高质量超薄栅极氧化物。该工艺是将晶片表面浸入水溶液中进行的，该水溶液的组成根据该方法的步骤连续变化。该方法包括初始去除污染物和微粒，然后除去天然氧化物。接下来，通过去除薄的表面层，将硅表面穿过HF和臭氧的现在。由此除去在天然氧化物之下的任何界面污染物或表面结构缺陷。接下来，通过臭氧在水浴中的作用生长高质量的化学氧化物。发现化学氧化物具有比天然氧化物更高的纯度和结构质量，并且在栅极氧化之前提供优异的活性表面钝化。化学氧化物被结合到最终的栅极氧化物中，并且由于其高质量，导致最终栅极氧化物的器件性能的提高。

9. 发明授权

US06589356B1 Method for cleaning a silicon-based substrate without NH4OH vapor damage 有权
标题翻译：无NH4OH蒸汽损坏的硅基衬底的清洗方法
公开(公告)号：US06589356B1
公开(公告)日：2003-07-08
申请号：US09676746
申请日：2000-09-29
申请人： Juin-Jie Chang , Jih-Churng Twu , Rong-Hui Kao
发明人： Juin-Jie Chang , Jih-Churng Twu , Rong-Hui Kao
IPC分类号： C23G102
CPC分类号： H01L21/02046 , H01L21/02052
摘要： A method for cleaning a silicon-based substrate in an ammonia-containing solution without incurring any damages to the silicon surface by NH4OH vapor is described. The method can be conducted by first providing a silicon-based substrate that has a silicon surface, then forming a silicon oxide layer of very small thickness, i.e. less than 10 Å, on the silicon surface. The silicon-based substrate can then be cleaned in an ammonia-containing solution without incurring any surface damage to the silicon, i.e. such as the formation of silicon holes. The present invention novel method can be carried out by either adding an additional oxidation tank before the SC-1 cleaning tank, or adding an oxidant to a quick dump rinse tank prior to the SC-1 cleaning process.
摘要翻译：描述了一种在含氨溶液中清洗硅基底物而不会由NH 4 OH蒸气对硅表面造成任何损害的方法。该方法可以通过首先提供具有硅表面的硅基衬底，然后在硅表面上形成非常小的厚度（即，小于）的氧化硅层来进行。然后可以在含氨溶液中清洗硅基基材，而不会对硅造成任何表面损伤，例如形成硅孔。本发明的新方法可以通过在SC-1清洗槽之前添加另外的氧化槽，或在SC-1清洗过程之前向快速倾倒冲洗槽中加入氧化剂来进行。

10. 发明授权

US06500753B2 Method to reduce the damages of copper lines 有权
标题翻译：减少铜线损坏的方法
公开(公告)号：US06500753B2
公开(公告)日：2002-12-31
申请号：US09838209
申请日：2001-04-20
申请人： Syun-Ming Jang , Ying-Ho Chen , Jih-Churng Twu , Chen-Hua Yu
发明人： Syun-Ming Jang , Ying-Ho Chen , Jih-Churng Twu , Chen-Hua Yu
IPC分类号： H01L218238
CPC分类号： H01L21/7684 , H01L21/76838 , H01L23/53228 , H01L2924/0002 , H01L2924/00
摘要： The invention teaches the addition of copper lines, these copper lines to be added to isolated copper lines or to selected copper lines within a collection of copper lines. The invention also teaches the addition of copper end caps to isolated copper lines or to selected copper lines within a collection of copper lines. The invention further teaches the widening of copper lines for isolated copper lines or selected copper lines within a collection of copper lines.
摘要翻译：本发明教导了铜线的添加，这些铜线被添加到隔离铜线或铜线集合内的选定铜线。本发明还教导了将铜端盖添加到铜线集合中的隔离铜线或铜线。本发明进一步教导了铜线集合中用于隔离铜线或选定铜线的铜线的扩大。

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