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    • 3. 发明授权
    • Three-dimensional nanoscale crossbars
    • 三维纳米级横条
    • US07786467B2
    • 2010-08-31
    • US11114307
    • 2005-04-25
    • R. Stanley WilliamsPhilip J. Kuekes
    • R. Stanley WilliamsPhilip J. Kuekes
    • H01L31/00
    • H04L49/40B82Y10/00G11C13/02G11C2213/71G11C2213/77G11C2213/81H04L49/101Y10S977/762Y10S977/767
    • Various embodiments of the present invention include three-dimensional, at least partially nanoscale, electronic circuits and devices in which signals can be routed in three independent directions, and in which electronic components can be fabricated at junctions interconnected by internal signal lines. The three-dimensional, at least partially nanoscale, electronic circuits and devices include layers, the nanowire or microscale-or-submicroscale/nanowire junctions of each of which may be economically and efficiently fabricated as one type of electronic component. Various embodiments of the present invention include nanoscale memories, nanoscale programmable arrays, nanoscale multiplexers and demultiplexers, and an almost limitless number of specialized nanoscale circuits and nanoscale electronic components.
    • 本发明的各种实施例包括三维,至少部分纳米级的电子电路和装置,其中信号可以在三个独立的方向上布线,并且其中电子部件可以在通过内部信号线互连的连接点处制造。 三维,至少部分纳米级的电子电路和器件包括层,其中每一个的纳米线或微米级或亚微米级/纳米线结可以经济地和有效地制造为一种类型的电子部件。 本发明的各种实施例包括纳米级存储器,纳米尺度可编程阵列,纳米级多路复用器和解复用器,以及几乎无限数量的专用纳米尺度电路和纳米级电子部件。
    • 8. 发明授权
    • Patterned nanowire articles on a substrate and methods of making the same
    • 在衬底上形成图案的纳米线制品及其制造方法
    • US07416993B2
    • 2008-08-26
    • US10936119
    • 2004-09-08
    • Brent M. SegalThomas RueckesClaude L. Bertin
    • Brent M. SegalThomas RueckesClaude L. Bertin
    • H01L21/302
    • H01L51/0048B82Y10/00H01L51/0023H01L2924/0002Y10S977/724Y10S977/762Y10S977/767Y10S977/856H01L2924/00
    • Nanowire articles and methods of making the same are disclosed. A conductive article includes a plurality of inter-contacting nanowire segments that define a plurality of conductive pathways along the article. The nanowire segments may be semiconducting nanowires, metallic nanowires, nanotubes, single walled carbon nanotubes, multi-walled carbon nanotubes, or nanowires entangled with nanotubes. The various segments may have different lengths and may include segments having a length shorter than the length of the article. A strapping material may be positioned to contact a portion of the plurality of nanowire segments. The strapping material may be patterned to create the shape of a frame with an opening that exposes an area of the nanowire fabric. Such a strapping layer may also be used for making electrical contact to the nanowire fabric especially for electrical stitching to lower the overall resistance of the fabric.
    • 公开了纳米线制品及其制造方法。 导电制品包括沿着制品限定多个导电通路的多个接触接触的纳米线段。 纳米线段可以是半导体纳米线,金属纳米线,纳米管,单壁碳纳米管,多壁碳纳米管或与纳米管缠结的纳米线。 各个片段可以具有不同的长度,并且可以包括长度短于制品的长度的片段。 捆扎材料可以被定位成接触多个纳米线段的一部分。 捆扎材料可以被图案化以产生具有暴露纳米线织物的区域的开口的框架的形状。 这种捆扎层也可以用于与纳米线织物的电接触,特别是用于电缝合以降低织物的整体阻力。
    • 9. 发明申请
    • Semiconductor device and a method for manufacturing the same
    • 半导体装置及其制造方法
    • US20060175638A1
    • 2006-08-10
    • US11328163
    • 2006-01-10
    • Hiroshi Ohki
    • Hiroshi Ohki
    • H01L27/10
    • H01L27/105H01L27/101Y10S977/767Y10S977/938
    • The difficulty of miniaturization of large-scale integrated circuits in electric devices based on the conventional techniques involving three-dimensional device structures or the introduction of novel materials is solved. Wires 2 and 3 are disposed to intersect one another in midair in a matrix. The ends of the wires 2 and 3 in midair are designed to be in direct contact with the insides of a package which contains a semiconductor device so that electrical connection and/or physical support can be acquired. Cross point 1 where wires 2 and 3 are in contact with each other is a region which has current switching function similar to the function of a channel of a common MOSFET. Cross point 1 is a region where base wire 2 functioning as a substrate and gate electrode wire 3 functioning as a control electrode (gate electrode) intersect in contact with one another, or a region where base wire 2 and a lead wire 4 overlap. The diameter and length of the wires as well as the distance therebetween can be designed as desired based on desired device specifications. The semiconductor device is insulated by gas (which is sealed with resin e.g. as the case may be) or vacuum except for an isolation region formed in base wire 2.
    • 解决了基于涉及三维器件结构的常规技术或引入新材料的电子设备中的大型集成电路的小型化困难。 电线2和3设置成在矩阵中的空中彼此相交。 电线2和3在空中的端部被设计成与包含半导体器件的封装的内部直接接触,使得可以获得电连接和/或物理支撑。 电线2和3彼此接触的交叉点1是具有类似于公共MOSFET的通道的功能的电流开关功能的区域。 交叉点1是用作基板的基线2和用作控制电极(栅电极)的栅极电极线3彼此相交或者基线2和引线4重叠的区域。 线的直径和长度以及它们之间的距离可以根据期望的装置规格进行设计。 半导体器件由形成在基线2中的隔离区域以外的气体(根据情况可根据情况而被密封)或真空绝缘。