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1. 发明授权

US08999840B2 Method of forming fine patterns of semiconductor device 有权
标题翻译：形成半导体器件精细图案的方法
公开(公告)号：US08999840B2
公开(公告)日：2015-04-07
申请号：US13939664
申请日：2013-07-11
申请人： Samsung Electronics Co., Ltd.
发明人： Cha-won Koh
IPC分类号： H01L21/027 , H01L21/308 , H01L21/02 , H01L21/311 , G03F7/09
CPC分类号： H01L21/0274 , G03F7/091 , H01L21/0206 , H01L21/02271 , H01L21/0271 , H01L21/0276 , H01L21/0332 , H01L21/3081 , H01L21/3088 , H01L21/31144 , H01L21/32139 , Y10S438/948 , Y10S438/949 , Y10S438/952
摘要： A method of forming a micro pattern of a semiconductor device may include forming an acid-extinguisher containing film on a substrate, forming a photoresist film containing a potential acid on the acid-extinguisher containing film, forming an exposed area containing acids by exposing a portion of the photoresist film to light, forming an insoluble polymer thin film between the acid-extinguisher containing film and the exposed area by extinguishing the acids of the exposed area at an interface between the acid-extinguisher containing film and the exposed area, developing the photoresist film to form a space exposing the insoluble polymer thin film in the exposed area and a photoresist pattern integrally connected to the insoluble polymer thin film, exposing the acid-extinguisher containing film through the space by removing the insoluble polymer thin film, and removing the acid-extinguisher containing film exposed through the space.
摘要翻译：形成半导体器件的微图案的方法可以包括在基板上形成含有灭火器的膜，在含有灭火器的膜上形成含有电位酸的光致抗蚀剂膜，通过暴露部分的光致抗蚀剂膜发光，通过在含灭火剂的膜和暴露区域之间的界面处灭灭暴露区域的酸而在含灭火器的膜和暴露区域之间形成不溶性聚合物薄膜，膜以形成暴露区域中的不溶性聚合物薄膜的空间和与不溶性聚合物薄膜一体连接的光致抗蚀剂图案，通过除去不溶性聚合物薄膜使含有灭火剂的膜暴露于该空间，并除去酸 - 含有灭火剂的薄膜暴露在空间内。

2. 发明授权

US08153991B2 Direct write lithography system 有权
标题翻译：直写光刻系统
公开(公告)号：US08153991B2
公开(公告)日：2012-04-10
申请号：US11149893
申请日：2005-06-10
申请人： Pieter Kruit
发明人： Pieter Kruit
IPC分类号： H01J3/14
CPC分类号： B82Y10/00 , B82Y40/00 , G03F7/70375 , H01J37/3174 , H01J37/3177 , H01J2237/31774 , H01J2237/31777 , H01J2237/31779 , Y10S438/942 , Y10S438/949 , Y10T428/24802
摘要： A direct write lithography system. The system includes a converter having an array of light controllable electron sources, each field emitter being arranged for converting light into an electron beam, the field emitters having an element distance between each two adjacent field emitters, each filed emitter having an activation area. A plurality of individually controllable light sources, each light source arranged for activating one field emitter. A controller controls each light source individually. Each electron beam is focused from the field emitters with a diameter smaller than the diameter of a light source on an object plane.
摘要翻译：直写光刻系统。该系统包括具有光可控电子源阵列的转换器，每个场发射器布置成用于将光转换成电子束，场发射器在每两个相邻的场发射器之间具有元件距离，每个场发射器具有激活区域。多个可单独控制的光源，每个光源被布置用于激活一个场发射器。控制器分别控制每个光源。每个电子束从场发射器聚焦，其直径小于物平面上光源的直径。

3. 发明申请

US20110294266A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110294266A1
公开(公告)日：2011-12-01
申请号：US13152492
申请日：2011-06-03
申请人： Hideto Ohnuma , Ichiro Uehara
发明人： Hideto Ohnuma , Ichiro Uehara
IPC分类号： H01L21/336
CPC分类号： H01L27/1288 , H01L21/28114 , H01L21/32136 , H01L21/32139 , H01L27/1214 , H01L29/42384 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L2029/7863 , Y10S438/949
摘要： Formation of LDD structures and GOLD structures in a semiconductor device is conventionally performed in a self aligning manner with gate electrodes as masks, but there are many cases in which the gate electrodes have two layer structures, and film formation processes and etching processes become complex. Further, in order to perform formation of LDD structures and GOLD structures only by processes such as dry etching, the transistor structures all have the same structure, and it is difficult to form LDD structures, GOLD structures, and single drain structures separately for different circuits. By applying a photolithography process for forming gate electrodes to photomasks or reticles, in which supplemental patterns having a function of reducing, the intensity of light and composed of diffraction grating patterns or translucent films, are established, GOLD structure, LDD structure, and single drain structure transistors can be easily manufactured for different circuits through dry etching and ion injection process steps.
摘要翻译：通常以半导体器件中的LDD结构和GOLD结构的形式，以栅电极作为掩模进行自对准，但是栅电极具有两层结构的情况很多，成膜工艺和蚀刻工艺变得复杂。此外，为了仅通过诸如干蚀刻的工艺来形成LDD结构和GOLD结构，晶体管结构都具有相同的结构，并且难以分别形成用于不同电路的LDD结构，GOLD结构和单个漏极结构。通过对光栅掩模或掩模版形成栅极电极的光刻工艺，建立了具有降低光的强度并由衍射光栅图案或半透明膜构成的功能的补充图案，GOLD结构，LDD结构和单漏极通过干蚀刻和离子注入工艺步骤可以容易地为不同的电路制造结构晶体管。

4. 发明申请

US20110171815A1 PATTERNING METHOD FOR HIGH DENSITY PILLAR STRUCTURES 有权
标题翻译：高密度支柱结构的方法
公开(公告)号：US20110171815A1
公开(公告)日：2011-07-14
申请号：US12686217
申请日：2010-01-12
申请人： Natalie NGUYEN , Paul Wai Kie Poon , Steven J. Radigan , Michael Konevecki , Yung-Tin Chen , Raghuveer Makala , Vance Dunton
发明人： Natalie NGUYEN , Paul Wai Kie Poon , Steven J. Radigan , Michael Konevecki , Yung-Tin Chen , Raghuveer Makala , Vance Dunton
IPC分类号： H01L21/30
CPC分类号： H01L21/0274 , H01L21/0337 , H01L27/1021 , Y10S438/947 , Y10S438/948 , Y10S438/949
摘要： A method of making a device includes forming a first photoresist layer over a sacrificial layer, patterning the first photoresist layer to form first photoresist features, rendering the first photoresist features insoluble to a solvent, forming a second photoresist layer over the first photoresist features, patterning the second photoresist layer to form second photoresist features, forming a spacer layer over the first and second photoresist features, etching the spacer layer to form spacer features and to expose the first and second photoresist features, forming third photoresist features between the spacer features, removing the spacer features, and patterning the sacrificial layer using the first, second and third photoresist features as a mask to form sacrificial features.
摘要翻译：制造器件的方法包括在牺牲层上形成第一光致抗蚀剂层，图案化第一光致抗蚀剂层以形成第一光致抗蚀剂特征，使得第一光致抗蚀剂特征不溶于溶剂，在第一光致抗蚀剂特征上形成第二光致抗蚀剂层，第二光致抗蚀剂层以形成第二光致抗蚀剂特征，在第一和第二光致抗蚀剂特征上形成间隔层，蚀刻间隔层以形成间隔物特征并暴露第一和第二光致抗蚀剂特征，在间隔物特征之间形成第三光致抗蚀剂特征，去除间隔物特征，并且使用第一，第二和第三光致抗蚀剂特征作为掩模来图案化牺牲层以形成牺牲特征。

5. 发明授权

US07977247B2 Field effect transistor device including an array of channel elements 有权
标题翻译：场效应晶体管器件包括沟道元件阵列
公开(公告)号：US07977247B2
公开(公告)日：2011-07-12
申请号：US11873316
申请日：2007-10-16
申请人： Charles T. Black , Ricardo Ruiz
发明人： Charles T. Black , Ricardo Ruiz
IPC分类号： H01L21/302 , H01L21/461 , G03F1/00 , G03F7/00
CPC分类号： H01L29/785 , H01L29/0673 , H01L29/66795 , H01L29/78681 , H01L29/78684 , Y10S438/945 , Y10S438/947 , Y10S438/948 , Y10S438/949
摘要： The present invention relates to a semiconductor structure such as a field effect transistors (FETs) in which the channel region of each of the FETs is composed of an array of more than one electrically isolated channel. In accordance with the present invention, the distance between each of the channels present in the channel region is within a distance of no more than twice their width from each other. The FETs of the present invention are fabricated using methods in which self-assembled block copolymers are employed in forming the channel.
摘要翻译：本发明涉及诸如场效应晶体管（FET）的半导体结构，其中每个FET的沟道区域由多于一个的电隔离沟道的阵列组成。根据本发明，存在于通道区域中的每个通道之间的距离在彼此宽度不超过其两倍的距离内。使用自组装嵌段共聚物形成通道的方法制造本发明的FET。

6. 再颁专利

USRE41426E1 Manufacturing methods of liquid crystal displays 有权
标题翻译：液晶显示器的制造方法
公开(公告)号：USRE41426E1
公开(公告)日：2010-07-13
申请号：US11141675
申请日：2005-05-31
申请人： Woon-Yong Park , Won-Hee Lee
发明人： Woon-Yong Park , Won-Hee Lee
IPC分类号： H01L27/14
CPC分类号： G02F1/13458 , G02F1/13439 , G02F1/136227 , Y10S438/949
摘要： An ITO (indium tin oxide) layer and a negative photoresist are deposited sequentially on the substrate 100 having a gate wire, a storage wire, a data wire and a storage electrode. The negative photoresist is developed through front exposure and the ITO layer is etched to form a pixel electrode. Because the portions of negative photoresist exposed to light remain after development, pixel defects due to particles placed between pixel regions are reduced. Both the rear exposure and the front exposure may be used. In the rear exposure, it is difficult to remain the portions of the ITO layer at the positions corresponding to the contact portion of the drain electrode and the pixel electrode, the storage line, the gate pads and the data pads. Accordingly, the front exposure is then executed by using the first mask having openings thereon. The negative photoresist is developed, and the ITO layer is patterned. After etching the ITO layer, because the portion of the ITO layer outside the display region remains as a whole, the portions of the ITO layers on the gate pads and the data pads remains through front exposure using a positive photoresist.
摘要翻译：在具有栅极线，存储线，数据线和存储电极的基板100上依次沉积ITO（氧化铟锡）层和负性光致抗蚀剂。通过正面曝光显影负性光致抗蚀剂，蚀刻ITO层以形成像素电极。因为暴露于光的负性光致抗蚀剂的部分在显影之后保留，所以像素区域之间的颗粒所引起的像素缺陷减少。可以使用后曝光和前曝光。在后曝光中，难以将ITO层的部分保持在与漏电极和像素电极，存储线，栅极焊盘和数据焊盘的接触部分对应的位置。因此，通过使用其上具有开口的第一掩模来执行前曝光。显影负性光致抗蚀剂，并对ITO层进行图案化。在蚀刻ITO层之后，由于显示区域外部的ITO层的部分保持整体，所以栅极焊盘和数据焊盘上的ITO层的部分通过使用正性光致抗蚀剂的正面曝光而保持。

7. 发明授权

US07491647B2 Etch with striation control 失效
标题翻译：蚀刻与条纹控制
公开(公告)号：US07491647B2
公开(公告)日：2009-02-17
申请号：US11223363
申请日：2005-09-09
申请人： S. M. Reza Sadjadi , Peter Cirigliano , Ji Soo Kim , Zhisong Huang , Eric A. Hudson
发明人： S. M. Reza Sadjadi , Peter Cirigliano , Ji Soo Kim , Zhisong Huang , Eric A. Hudson
IPC分类号： H01L21/311
CPC分类号： H01L21/0273 , H01L21/0274 , H01L21/31144 , H01L21/76802 , Y10S438/942 , Y10S438/949
摘要： A method for etching a feature in an etch layer is provided. A patterned photoresist mask is formed over the etch layer with photoresist features with sidewalls wherein the sidewalls of the photoresist features have striations forming peaks and valleys. The striations of the sidewalls of the photoresist features are reduced. The reducing the striations comprises at least one cycle, wherein each cycle comprises etching back peaks formed by the striations of the sidewalls of the photoresist features and depositing on the sidewalls of the photoresist features. Features are etched into the etch layer through the photoresist features. The photoresist mask is removed.
摘要翻译：提供了蚀刻蚀刻层中的特征的方法。在具有侧壁的光致抗蚀剂特征的蚀刻层上形成图案化的光致抗蚀剂掩模，其中光致抗蚀剂特征的侧壁具有形成峰和谷的条纹。光致抗蚀剂特征的侧壁的条纹减小。减小条纹包括至少一个周期，其中每个周期包括蚀刻由光致抗蚀剂特征的侧壁的条纹形成的峰，并沉积在光致抗蚀剂特征的侧壁上。通过光致抗蚀剂特征将特征蚀刻到蚀刻层中。去除光致抗蚀剂掩模。

8. 发明申请

US20090039275A1 Processing method, manufacturing method of semiconductor device, and processing apparatus 失效
标题翻译：半导体装置的加工方法，制造方法以及加工装置
公开(公告)号：US20090039275A1
公开(公告)日：2009-02-12
申请号：US12216228
申请日：2008-07-01
申请人： Tomoyuki Takeishi , Kenji Kawano , Hiroshi Ikegami , Shinichi Ito , Riichiro Takahashi
发明人： Tomoyuki Takeishi , Kenji Kawano , Hiroshi Ikegami , Shinichi Ito , Riichiro Takahashi
IPC分类号： G01T1/24
CPC分类号： H01L23/544 , B23K26/066 , B23K26/364 , B23K26/40 , B23K2103/172 , G03F7/2026 , G03F7/70341 , G03F9/7076 , G03F9/708 , G03F9/7084 , G21K5/10 , H01J2237/30438 , H01L2223/54453 , H01L2924/0002 , Y10S438/949 , H01L2924/00
摘要： A processing method for selectively reducing or removing the region to be exposed with energy ray in a film formed on a substrate, comprising relatively scanning a first exposure light whose shape on the substrate is smaller than the whole first region to be exposed against the whole first region to be exposed to selectively remove or reduce the first region to be exposed, and exposing a whole second region to be exposed inside the whole first region to be exposed with a second exposure light to selectively expose the whole second region to be exposed.
摘要翻译：一种处理方法，用于在形成在基板上的膜中选择性地减少或去除待曝光的区域，该方法包括相对地扫描基板上的形状比整个第一区域要暴露的整个第一区域的第一曝光灯区域，以选择性地去除或减少要暴露的第一区域，并且用第二曝光光将待暴露的整个第一区域暴露在整个第一区域内的整个第二区域，以选择性地暴露待暴露的整个第二区域。

9. 发明授权

US07473321B2 Laser treatment apparatus 失效
标题翻译：激光治疗仪
公开(公告)号：US07473321B2
公开(公告)日：2009-01-06
申请号：US11213705
申请日：2005-08-30
申请人： Norihisa Koga , Shinji Koga , Naoto Yoshitaka , Akira Nishiya
发明人： Norihisa Koga , Shinji Koga , Naoto Yoshitaka , Akira Nishiya
IPC分类号： B05C11/00 , B05C13/02 , B05C1/28 , B05B5/00
CPC分类号： H01L21/67034 , B23K26/146 , B23K26/147 , H01L21/67051 , Y10S438/949
摘要： A drain port and an exhaust port arranged at the bottom of a cup surrounding a substrate holding unit. A drainage tray is arranged below the cup so as to cover the moving area of the drain port when the substrate holding unit and the cup move in X-directions and Y-directions. An exhaust unit is arranged at a position corresponding to the position of the exhaust port of the cup when the substrate holding unit is in its spin-drying position. The exhaust unit is connected to the exhaust port to suck the interior of the cup when the spin-drying of the substrate is executed. The use of a flexible tube which is always connected to the exhaust port is no longer necessary.
摘要翻译：排水口和排气口，布置在围绕衬底保持单元的杯的底部。当基板保持单元和杯子沿X方向和Y方向移动时，排水盘布置在杯下方以覆盖排水口的移动区域。当衬底保持单元处于其脱水位置时，排气单元布置在与杯的排气口的位置相对应的位置处。当执行基板的旋转干燥时，排气单元连接到排气口以吸收杯的内部。始终连接到排气口的柔性管的使用不再需要。

10. 发明授权

US07384810B2 Image display device and method for manufacturing the same 有权
标题翻译：图像显示装置及其制造方法
公开(公告)号：US07384810B2
公开(公告)日：2008-06-10
申请号：US11441021
申请日：2006-05-26
申请人： Mitsuharu Tai , Mutsuko Hatano , Takeshi Sato , Seongkee Park , Kiyoshi Ouchi
发明人： Mitsuharu Tai , Mutsuko Hatano , Takeshi Sato , Seongkee Park , Kiyoshi Ouchi
IPC分类号： H01L21/00
CPC分类号： H01L21/02691 , H01L21/02675 , H01L21/2026 , H01L27/1285 , H01L27/1296 , Y10S438/949
摘要： Only a region where TFTs constituting a high-performance circuit will be disposed in a precursor semiconductor film PCS on an insulating substrate GLS with an insulating layer UCL serving as an undercoat is irradiated with a first energy beam LSR so as to be poly-crystallized while growing crystal grains laterally. Further a second rapid thermal treatment is performed all over the panel so as to reduce defects in the crystal grains in a region PSI poly-crystallized by the aforementioned energy beam. Thus, a high-quality polycrystalline semiconductor thin film serving as TFTs for a high-performance circuit and having a high on-current, a low threshold value, a low variation and a sharp leading edge characteristic is obtained. Concurrently, the precursor semiconductor layer in the other region is poly-crystallized by the second rapid thermal treatment so as to obtain a low-quality polycrystalline semiconductor thin film serving as pixel circuit TFTs and having a low on-current and properties of a low leak current and a high withstand voltage due to its high resistance. Accordingly, it is possible to form polycrystalline semiconductor TFTs high in driving performance and TFTs having properties of a low leak current and a high withstand voltage concurrently on one and the same insulating substrate.
摘要翻译：用作为底涂层的绝缘层UCL的绝缘基板GLS上的前体半导体膜PCS中，仅配置构成高性能电路的TFT的区域，用第一能量束LSR照射多晶化，横向生长晶粒。此外，在整个面板上进行第二快速热处理，以便减少通过上述能量束多晶化的区域PSI中的晶粒的缺陷。因此，获得了用作高性能电路的TFT并具有高导通电流，低阈值，低变化和尖锐前沿特性的高质量多晶半导体薄膜。同时，通过第二快速热处理，另一区域中的前体半导体层被多晶化，以获得用作像素电路TFT的低品质多晶半导体薄膜，并且具有低导通电流和低泄漏性由于其高电阻，电流和高耐压。因此，可以在同一绝缘基板上同时形成具有高驱动性能的多晶半导体TFT和具有低漏电流和高耐受电压的特性的TFT。

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