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    • 5. 发明授权
    • Method for calibrating frequency of gm-C filter and devices using the method
    • 使用该方法校准gm-C滤波器和器件的频率的方法
    • US08762094B2
    • 2014-06-24
    • US12984223
    • 2011-01-04
    • Yun-Cheol Han
    • Yun-Cheol Han
    • G06F19/00H03H11/12
    • H03H11/1291H03H11/0472H03H2210/023H03H2210/04
    • A method of calibrating the frequency of a gm-C filter is provided. The method includes generating, by a frequency calibration circuit, a calibration code capable of tuning a cut-off frequency of the gm-C filter according to a frequency of an oscillation signal that is output from a gm-C oscillator and indicates a process distribution and a reference code, determining, by the frequency calibration circuit, whether the calibration code exists within a range of a reference code, and outputting, by the frequency calibration circuit, the calibration code to the gm-C filter or generating a variable current to simultaneously tune transconductance of the gm-C oscillator and transconductance of the gm-C filter, according to a result of the determination.
    • 提供了一种校准gm-C滤波器频率的方法。 该方法包括通过频率校准电路产生能够根据从gm-C振荡器输出的振荡信号的频率来调谐gm-C滤波器的截止频率的校准码,并指示处理分布 以及参考码,通过频率校准电路确定校准代码是否存在于参考码的范围内,并且通过频率校准电路将校准码输出到gm-C滤波器或产生可变电流 根据测定结果同时调节gm-C振荡器的跨导和gm-C滤波器的跨导。
    • 9. 发明申请
    • Bias circuit, and gm-C filter circuit and semiconductor integrated circuit each including the same
    • 偏置电路和gm-C滤波电路及半导体集成电路各自包含
    • US20100188143A1
    • 2010-07-29
    • US12591815
    • 2009-12-02
    • Teisuke Kishikawa
    • Teisuke Kishikawa
    • H03K5/00
    • H03H11/0472H03F3/45475H03F2203/45134H03F2203/45138H03H11/0433H03H2210/021
    • A bias circuit, includes: a first positive channel Metal Oxide Semiconductor transistor forming a first current source; a second positive channel Metal Oxide Semiconductor transistor composing a current mirror circuit of the first positive channel Metal Oxide Semiconductor transistor and forming a second current source; a first negative channel Metal Oxide Semiconductor transistor having a drain to which a current is supplied from the first current source; a second negative channel Metal Oxide Semiconductor transistor composing a current mirror circuit together with the first negative channel Metal Oxide Semiconductor transistor, and having a drain to which a current is supplied from the second current source; and a resistor connected between a source of the second negative channel Metal Oxide Semiconductor transistor and a ground; wherein a resistance component for gm adjustment is connected between a source of the first negative channel Metal Oxide Semiconductor transistor and the ground.
    • 偏置电路包括:形成第一电流源的第一正通道金属氧化物半导体晶体管; 构成第一正通道金属氧化物半导体晶体管的电流镜电路并形成第二电流源的第二正通道金属氧化物半导体晶体管; 第一负沟道金属氧化物半导体晶体管,具有从第一电流源供给电流的漏极; 与第一负沟道金属氧化物半导体晶体管一起构成电流镜电路的第二负沟道金属氧化物半导体晶体管,具有从第二电流源供给电流的漏极; 以及连接在第二负极沟道金属氧化物半导体晶体管的源极与地之间的电阻器; 其中用于调整gm的电阻分量连接在第一负极沟道金属氧化物半导体晶体管的源极与地之间。